With Reference Voltage Circuitry Patents (Class 323/281)
  • Patent number: 8624568
    Abstract: A voltage regulator controls a regulated output voltage (Vout) by feeding it back to a differential input stage (13) receiving a reference voltage (Vref) and applying an output (3) to a control electrode of a follower transistor (M4) that is coupled to an output stage (15) which generates the output voltage (Vout). The output stage operates pull-up (M7B) and pull-down (M5B) transistors in response to a signal (6A) produced by the follower transistor (M4) during normal regulation operation, and provides fast settling of the output voltage by turning on a transient pull-up transistor (M7A) or transient pull-down transistor (M5A) in response to the signal (6A) produced by the follower transistor (M4) during a fast increasing or decreasing transition, respectively, of the load current (IL). A filtering resistor (RFLT) is coupled between the output voltage and a common electrode of the transient pull-up and pull down transistors.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: January 7, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Vadim V. Ivanov, Harish Venkataraman
  • Publication number: 20140002041
    Abstract: A low drop-out regulator circuit includes a control circuit and a switching device. The control circuit has an output node. The switching device has a first terminal coupled with the output node of the control circuit. The switching device is configured to receive an input voltage at a second terminal of the switching device and provide an output voltage at a third terminal of the switching device. The control circuit is configured to provide a digital signal at the output node of the control circuit based on a feedback voltage of the output voltage at the third terminal of the switching device.
    Type: Application
    Filed: March 15, 2013
    Publication date: January 2, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Eric SOENEN, Alan ROTH
  • Patent number: 8618780
    Abstract: A multimode voltage regulator comprises an output for providing a regulator output voltage Vdd and an output current to a load and a low power reference voltage source having a reference voltage output providing the regulator output voltage Vdd, when in a first low power mode the output current is not greater than a threshold value. It may comprise a buffer amplifier having an output providing the regulator output voltage Vdd, when the output current is greater than the threshold value and a first bias voltage input being connected in a second low power mode to the reference voltage output when the output current is greater than the threshold value for less than a predefined time. And it may comprise a mode controller for automatically determining the output current and automatically switching from first low power mode to second low power mode.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: December 31, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Philippe Mounier, Estelle Huynh, David Lopez, Thierry Sicard
  • Patent number: 8593121
    Abstract: The present disclosure discloses a voltage regulator including a trimming circuit. The present disclosure also discloses a method for trimming an output voltage of a voltage regulator. In one embodiment the voltage regulator may include a power conversion module, a feedback and trimming module and a control module. The voltage regulator may be able to provide an output voltage that could be regulated to a plurality of output values, the feedback and trimming module may be able to trim the plurality of output values to their desired values successively and independently.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: November 26, 2013
    Assignee: Chengdu Monolithic Power Systems Co., Ltd.
    Inventors: Yike Li, Jiangyun Zhou
  • Patent number: 8587286
    Abstract: One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: November 19, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Inoue, Kiyoshi Kato, Shuhei Nagatsuka, Koichiro Kamata, Tsutomu Murakawa, Takahiro Tuji, Kaori Ikada
  • Patent number: 8581562
    Abstract: The present invention relates to a Single Inductor Double Output (SIDO) power converter, which includes a power-stage circuit, a current detector, a slope compensation device, at least two error amplifiers, a comparing unit, a mode exchange circuit, a logical device and a driver. The SIDO current converter achieves an optimal SIDO power converting efficiency by controlling a full-current mode. Furthermore, different power transferring modes, under a variety of loadings, are used to address the issue of cross regulation and at meanwhile solving output voltage ripples and transient response to ensure the SIDO power converter a more flexible usage environment and better output performance.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: November 12, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ke-Horng Chen, Yu-Huei Lee, Shih-Jung Wang, Yao-Yi Yang, Ying Hsi Lin
  • Patent number: 8575905
    Abstract: A voltage regulator includes a regulator input connected to a reference voltage; a regulator output that outputs a regulated voltage to an electrical load; a first loop, the first loop configured to receive the reference voltage, the first loop outputting a bias voltage; a second loop, the second loop configured to receive the bias voltage as an input; and a bias voltage capacitor connected to a node between the first loop and the second loop.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: November 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: John Bulzacchelli, Paul D. Muench, Michael A. Sperling, Zeynep Toprak-Deniz
  • Patent number: 8559558
    Abstract: In various embodiments, a reference voltage (Vref) generator for a single-ended receiver in a communication system is disclosed. The Vref generator in one example comprises a cascoded current source for providing a current, I, to a resistor, Rb, to produce the Vref voltage (I*Rb). Because the current source isolates Vref from a first of two power supplies, Vref will vary only with the second power supply coupled to Rb. As such, the Vref generator is useful in systems employing signaling referenced to that second supply but having decoupled first supplies. For example, in a communication system in which the second supply (e.g., Vssq) is common to both devices, but the first supply (Vddq) is not, the disclosed Vref generator produces a value for Vref that tracks Vssq but not the first supply.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: October 15, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Timothy M. Hollis
  • Patent number: 8547135
    Abstract: A self-modulated voltage reference circuit may generate a reference voltage by receiving an internal reference voltage of a programmable device at a first input of a comparator block of the programmable device, receiving a feedback voltage at a second input of the comparator block, generating a pulse density modulated (PDM) signal based on a difference between the reference voltage and the feedback voltage, outputting the PDM signal at a digital output pin of the programmable device, and filtering the PDM signal to generate the output reference voltage.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: October 1, 2013
    Assignee: Cypress Semiconductor Corporation
    Inventors: Archana Yarlagadda, Dave Van Ess, Jeffrey Dahlin
  • Publication number: 20130234684
    Abstract: An immediate response low dropout regulation system includes a low dropout regulation unit, a tracking voltage generation unit, and a self-driving unit. The low dropout regulation unit is used for generating and outputting an inner output voltage according to a reference voltage. The tracking voltage generation unit is used for generating and outputting a tracking voltage according to the reference voltage. The self-driving unit is coupled to the low dropout regulation unit and the tracking voltage generation unit. When a voltage difference between the tracking voltage and the inner output voltage is greater than a constant times threshold voltage, the self-driving unit provides a compensation current to an output terminal of the low dropout regulation unit.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 12, 2013
    Applicant: Etron Technology, Inc.
    Inventors: Yen-An Chang, Kuang-Fu Teng, Der-Min Yuan
  • Patent number: 8497667
    Abstract: A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: July 30, 2013
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Sang Thanh Nguyen, Anh Ly, Hung Q. Nguyen, Wingfu Aaron Lau, Nasrin Jaffari, Thuan Trong Vu, Vishal Sarin, Loc B. Hoang
  • Patent number: 8476880
    Abstract: One embodiment of the invention includes regulation voltage system for a power supply system. The system includes a current sense system configured to generate a sense signal that represents an output current of the power supply system that is supplied to a load. The system also includes a positive voltage droop controller configured to provide a regulation voltage to the power supply system, the positive voltage droop controller setting the regulation voltage to one of a predetermined fixed reference voltage or a variable reference voltage based on the sense signal. The variable reference voltage can be less than the predetermined fixed reference voltage.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: July 2, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Wei Dong, Xiao Xu, Wenkai Wu
  • Patent number: 8456148
    Abstract: One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: June 4, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Inoue, Kiyoshi Kato, Shuhei Nagatsuka, Koichiro Kamata, Tsutomu Murakawa, Takahiro Tuji, Kaori Ikada
  • Publication number: 20130113447
    Abstract: A low dropout (LDO) regulator includes a voltage regulation loop for providing an output voltage to an output terminal, where the output voltage is proportional to a reference voltage. The voltage regulation loop includes a current bias input for receiving a bias current. The LDO regulator also includes a bias current control circuit for providing the bias current at a first value when the reference voltage is greater than a feedback voltage and at a second value higher than the first value when the reference voltage is less than the feedback voltage.
    Type: Application
    Filed: November 8, 2011
    Publication date: May 9, 2013
    Inventor: Petr Kadanka
  • Patent number: 8426924
    Abstract: An area efficient distributed device for integrated voltage regulators comprising at least one filler cell coupled between a pair of PADS on I/O rail of a chip and at least one additional filler cell having small size replica of said device is coupled to said I/O rails for distributing replicas of said device on the periphery of said chip. The device is coupled as small size replica on the lower portion of said second filler cell for distributing said device on the periphery of said chip and providing maximal area utilization.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: April 23, 2013
    Assignee: STMicroelectronics Pvt. Ltd.
    Inventors: Joshipura Jwalant, Nitin Bansal, Amit Katyal, Massimiliano Picca
  • Patent number: 8421427
    Abstract: A reference voltage generation circuit for outputting a reference voltage from an input voltage includes a specific voltage output unit for outputting a specific voltage from the input voltage; a first circuit section for outputting the reference voltage with a positive temperature property from the specific voltage output from the specific voltage output unit; and a second circuit section for setting a level of the reference voltage output from the first circuit section. The specific voltage output unit is formed of a regulator circuit having a first terminal connected to a power source. The first circuit section is formed of a bi-polar transistor element connected to a second terminal of the regulator circuit. The second circuit section is formed of a resistor connected to the second terminal of the regulator circuit, a collector terminal of the bi-polar transistor element, and an emitter terminal of the bi-polar transistor element.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: April 16, 2013
    Assignee: Oki Data Corporation
    Inventor: Akira Nagumo
  • Publication number: 20130082671
    Abstract: A voltage regulator controls a regulated output voltage (Vout) by feeding it back to a differential input stage (13) receiving a reference voltage (Vref) and applying an output (3) to a control electrode of a follower transistor (M4) that is coupled to an output stage (15) which generates the output voltage (Vout). The output stage operates pull-up (M7B) and pull-down (M5B) transistors in response to a signal (6A) produced by the follower transistor (M4) during normal regulation operation, and provides fast settling of the output voltage by turning on a transient pull-up transistor (M7A) or transient pull-down transistor (M5A) in response to the signal (6A) produced by the follower transistor (M4) during a fast increasing or decreasing transition, respectively, of the load current (IL). A filtering resistor (RFLT) is coupled between the output voltage and a common electrode of the transient pull-up and pull down transistors.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 4, 2013
    Inventors: Vadim V. Ivanov, Harish Venkataraman
  • Patent number: 8412479
    Abstract: Memory power estimation by means of calibrated weights and activity counters are generally presented. In this regard, in one embodiment, a memory power is introduced to read a value from a memory activity counter, to determine a memory power estimation based at least in part on the value and a calibration, and to store the memory power estimation to a register. Other embodiments are also described and claimed.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: April 2, 2013
    Assignee: Intel Corporation
    Inventors: Howard S. David, Eugene Gorbatov, Ulf R. Hanebutte, Minh Le, Rahul Khanna
  • Publication number: 20130076323
    Abstract: A power supply uses a power converter to generate a regulated voltage by referencing to a first DC voltage, a low dropout (LDO) regulator to generate an output voltage from the regulated voltage by referencing to a second DC voltage, and a reference voltage generator to dynamically adjust the first DC voltage according to the input voltage and the control voltage of the output transistor of the LDO regulator. The dropout voltage of the LDO regulator can be minimized to maintain the high efficiency of the power supply at different loading or selected output voltages.
    Type: Application
    Filed: September 10, 2012
    Publication date: March 28, 2013
    Inventors: Tsung-Wei HUANG, Shui-Mu Lin
  • Patent number: 8405376
    Abstract: A low noise reference voltage circuit without using an amplifier inside is capable of transforming a current IPTAT in positive proportion to absolute temperature into a voltage VPTAT in positive proportion to absolute temperature, and outputting it to a ring oscillator. The low noise reference voltage circuit improves a degradation of noise performance compared with a conventional band-gap reference voltage circuit and is in characteristic of low noise and higher PSRR.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: March 26, 2013
    Assignee: FCI Inc.
    Inventors: In-chul Hwang, Myung-woon Hwang, Je-cheol Moon, Hyun-ha Jo
  • Publication number: 20130063111
    Abstract: A method is provided. A first reference voltage during an idle mode is selected, and the first reference voltage is applied to a switched-mode converter. A first output voltage is then generated by the switched-mode converter from a power supply, and a capacitor is overcharged with the first output voltage. The first output voltage is regulated to generate a second output voltage during the idle mode. Then, a second reference voltage during a quiet mode, where the second reference voltage to the buck converter. During the quiet mode, a third output voltage is generated from the switched-mode converter and from discharging the overcharged capacitor, and the third output voltage is regulated to generate the second output voltage.
    Type: Application
    Filed: September 13, 2011
    Publication date: March 14, 2013
    Applicant: Texas Instruments Incorporated
    Inventors: Vadim V. Ivanov, Harish Venkataraman, Daniel A. King
  • Publication number: 20130063110
    Abstract: A method is provided. A low dropout regulator (LDO) is disabled during a first mode, and a first reference voltage is selected and applied to a switched-mode converter during the first mode. Also during the first mode, a first output voltage is generated by the switched-mode converter from a power supply, and a first capacitor is overcharged with the first output voltage. The LDO is then enabled during a second mode. During a first portion of a startup period for the second mode, a second capacitor is charged from the first capacitor, and a second reference voltage is selected and applied to the switched-mode converter. Then, during a second portion of the startup period for the second mode, the second capacitor is charged with the switched-mode converter.
    Type: Application
    Filed: September 13, 2011
    Publication date: March 14, 2013
    Applicant: Texas Instruments Incorporated
    Inventors: Vadim V. Ivanov, Harish Venkataraman, Daniel A. King
  • Patent number: 8395347
    Abstract: In an induction motor group control system, magnetic energy recovery switches (3) are connected in series to an induction motor (2) directly driven by a commercial power supply, and a plurality of induction motor control devices (10) enabling voltage control and reactive power control of the induction motor 2 are employed to control generation of reactive power so as to maximize a power factor of the entire plurality of AC loads including the induction motor or compensate variations in voltage of an AC power supply (1).
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: March 12, 2013
    Inventors: Kazuhiko Fukutani, Hideo Narisawa, Ryuichi Shimada, Takanori Isobe, Tadayuki Kitahara
  • Patent number: 8390965
    Abstract: An over-current protection device for multiple high-voltage motive devices is provided. The over-current protection device includes a comparison module and a logic operation module. The comparison module receives a plurality of voltages generated from a plurality of operating currents of a plurality of high-voltage motive devices and respectively compares the voltages with at least one reference voltage to generate a plurality of comparison results, wherein the high-voltage motive devices are solenoids, electronic clutches, or a combination of solenoids and electronic clutches. The logic operation module receives the comparison results and generates at least one control signal for a plurality of high-voltage motive device driving circuits according to the comparison results. The high-voltage motive device driving circuits respectively drive the high-voltage motive devices according to the control signal.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: March 5, 2013
    Assignees: Cal-Comp Electronics & Communications Company Limited, Kinpo Electronics, Inc.
    Inventors: Chih-Ming Chang, Ju-Chou Chen
  • Patent number: 8390264
    Abstract: A differential reference voltage generator generates a first differential reference voltage and a second differential reference voltage. The differential reference voltage generator includes a first operational amplifier, a first transistor, a first resistor, and a second resistor. The first operational amplifier has a negative terminal adapted to receive a reference voltage. The first transistor has a source receiving a power supply voltage and has a gate electrically connected to an output terminal of the first operational amplifier. The first resistor has a first terminal electrically connected to a drain of the first transistor, and has a second terminal electrically connected to a positive terminal of the first operation amplifier. The second resistor has a first terminal electrically connected to the second terminal of the first resistor, and a second terminal electrically connect to a current mirror.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: March 5, 2013
    Assignee: Himax Technologies Limited
    Inventor: Wen-Sheng Lin
  • Publication number: 20130049722
    Abstract: A low-dropout linear voltage stabilizing circuit includes a power source terminal, a reference voltage terminal, an outputting terminal, a load and a grounding terminal, a fast channel circuit connected between the power source terminal and the load for adjusting voltage values outputted by the outputting terminal and a slow channel circuit connected between the power source terminal and the load for stabilizing the voltage values outputted by the outputting terminal The fast channel circuit and the slow channel circuit are connected to the outputting terminal The slow channel circuit is connected to the reference voltage terminal. The fast channel circuit comprises a first FET and a controlling subcircuit. The slow channel circuit comprises an operational amplifier connected to the reference voltage terminal, a first resistance, a second resistance connected to the first resistance and the first FET. A low-dropout linear voltage stabilizing system is further provided.
    Type: Application
    Filed: May 17, 2012
    Publication date: February 28, 2013
    Inventor: Junwei Huang
  • Patent number: 8373395
    Abstract: A power source apparatus includes: a switch circuit to receive an input voltage; a control circuit to switch the switch circuit from a second state to a first state at a timing corresponding to a comparison result between a feedback voltage generated based on a first voltage corresponding to an output voltage and a reference voltage generated based on a standard voltage set in accordance with the output voltage; and a voltage generation circuit to add a compensation voltage generated by voltage-converting a time period in which the switch circuit switches from the second state to the first state to one of the first voltage and the standard voltage, to generate the feedback voltage, to add a slope voltage which changes at a slope to one of the first voltage and the standard voltage, and to generate the reference voltage.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: February 12, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Makoto Yashiki
  • Publication number: 20130033245
    Abstract: The invention provides a bandgap circuit for providing stable reference voltages. The bandgap circuit comprises a core circuit and an output branch. The core circuit comprises: a first transistor, coupled between a supplied working voltage and a first node, and having a gate coupled to the first node; a second transistor, coupled between the supplied working voltage and a second node, and having a gate coupled to the first node; a third transistor, coupled between the first node and a ground voltage, and having a gate coupled to a third node; a fourth transistor, coupled between the third node and the ground voltage, and having a gate coupled to the second node; and a first resistor, coupled between the second and third nodes. The output branch is coupled to the core circuit to receive an output of the core circuit, and arranged to output a reference voltage at an output node.
    Type: Application
    Filed: October 14, 2011
    Publication date: February 7, 2013
    Applicant: MEDIATEK SINGAPORE PTE. LTD.
    Inventor: KianTiong Wong
  • Patent number: 8368367
    Abstract: The invention provides a voltage regulator including a voltage divider and a power supply. The voltage divider circuit includes a first, second, third PMOS transistors, a first NMOS transistor, a pull down circuit, and a switching capacitor circuit. The pull down circuit includes a plurality of switches controlled by a pull down control signal. The switching capacitor circuit controlled by a first control pulse includes a capacitor and provides the capacitor connected to the dividing voltage for a short period while the power supply starts up to provide the input voltage. The power supply includes a comparator and a power voltage switch. The comparator compares the dividing voltage and a reference voltage and outputs a comparison result correspondingly. The power voltage switch is controlled by the comparison result to provide the input voltage from a power voltage.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: February 5, 2013
    Assignee: Elite Semiconductor Memory Technology Inc.
    Inventor: Yi-Heng Liu
  • Publication number: 20130015828
    Abstract: An integrated circuit, including: a low dropout regulator configured to output regulated power to a device that can be in standard mode drawing power from the regulator or in idle mode during which it substantially does not draw power from the regulator; a capacitor in parallel to the regulator's output configured to be charged when the regulator is enabled and to provide power instead of the regulator when the regulator is disabled; a control configured to disable and enable the regulator; wherein the control is configured to disable the regulator when the device is in idle mode and enable the regulator when the device is in standard mode; and wherein during idle mode the control enables the regulator at various times to prevent the charge of the capacitor from decreasing more than a pre-selected amount.
    Type: Application
    Filed: July 12, 2011
    Publication date: January 17, 2013
    Applicant: DSP Group Ltd.
    Inventor: Eran AMIR
  • Patent number: 8344719
    Abstract: One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: January 1, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Inoue, Kiyoshi Kato, Shuhei Nagatsuka, Koichiro Kamata, Tsutomu Murakawa, Takahiro Tuji, Kaori Ikada
  • Patent number: 8339871
    Abstract: Herein, a voltage sensing circuit, which is capable of controlling a pumping voltage to be stably generated in a low voltage environment, is provided. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: December 25, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Woo-Seung Han, Khil-Ohk Kang
  • Publication number: 20120299564
    Abstract: A low dropout voltage regulator circuit that dynamically adjusts its output voltage has a voltage adjustment circuit in communication with a dynamic voltage controlling circuit for modifying the output voltage of the low dropout voltage regulator. A first amplification circuit is connected to receive an adjusted reference voltage from the voltage adjustment circuit and compare it with a feedback signal from the output voltage to provide a drive signal to a signal input terminal of a follower output transistor. An output terminal of the follower output transistor provides the output voltage of the regulation circuit. An adjustable internal load circuit applies a load current to the output terminal of the follower output transistor to increase the bandwidth of the output of the voltage regulation circuit that is sensed by a dynamic biasing sensing circuit to generate a dynamic biasing signal that modifies the bandwidth of the first amplification circuit.
    Type: Application
    Filed: June 10, 2011
    Publication date: November 29, 2012
    Inventors: Rupert Howes, Alexandre Tavares, Anthony Clowes, Mark Childs
  • Patent number: 8314597
    Abstract: A load driving apparatus is provided. The load driving apparatus is configured to output an electrical signal to a load. The load driving apparatus includes a driver and an average voltage/current detector. The driver receives an input voltage and a control signal. The driver tunes the electrical signal according to the control signal. The average voltage/current detector receives the electrical signal outputted to the load and generates the control signal by comparing the electrical signal and a reference signal.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: November 20, 2012
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chih-Yuan Hsieh, Wei-Jen Lai, Chih-Jen Yen
  • Patent number: 8315588
    Abstract: A receiver circuit is provided on an integrated circuit. The receiver circuit includes first and second power supply terminals, a ground supply terminal, a resistive element coupled between the first and second power supply terminals, and a receiver biased between the second power supply terminal and the ground supply terminal. The receiver draws a bias current through the resistive element, which varies as a positive function with a voltage on the second power supply terminal. The voltage on the second power supply terminal varies as an inverse function of the bias current.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: November 20, 2012
    Assignee: LSI Corporation
    Inventor: Todd A. Randazzo
  • Patent number: 8294442
    Abstract: A low dropout regulator (LDO) circuit without external capacitors rapidly responding to load change includes a slow pathway and a fast pathway for controlling voltage, wherein the slow pathway for providing precise output voltage includes an operational amplifier I0, a driving transistor MPR, a resistor RF1 and a resistor RF2 forming an operational amplifier loop, and the fast pathway for responding to rapid load change includes a comparator I1, a comparator I2, a field effect transistor MN1, a field effect transistor MN2, a driving transistor MPR, a resistor RF1 and a resistor RF2 forming a comparator loop. The circuit is capable of controlling the output voltage by the slow operational amplifier loop and fast comparator loop, so that the load response speed of the LDO is greatly improved without the increase of the system power consumption and external big capacitors.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: October 23, 2012
    Assignee: IPGoal Microelectronics (Sichuan) Co., Ltd.
    Inventor: Guojun Zhu
  • Patent number: 8237376
    Abstract: A method and a circuit may have an ability to provide constant currents of a certain set value, the rising and falling edges of which may be shorter than the design minimum on-phase. Essentially, these results may be obtained by keeping an operational amplifier that controls the output power switch in an active state during off-phases of an impulsive drive signal received by the current source circuit in order to maintain the output voltage of the operational amplifier at or just below the voltage to be applied to the control terminal of the output power switch during a successive on-phase of a received drive pulse signal.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: August 7, 2012
    Assignee: STMicroelectronics S.R.L.
    Inventor: Pasquale Franco
  • Publication number: 20120194150
    Abstract: Systems and methods may include a low-dropout (LDO) voltage regulator for portable communication devices. The systems and methods may include a comparator having first and second inputs and generating a control voltage, the first input receiving a battery voltage from a battery source, the second input receiving a fixed voltage independent from the battery voltage, and a power management circuit that receives the control voltage and provides a regulated voltage based upon the control voltage, wherein when the received battery voltage is above the fixed voltage, the control voltage is provided at a high constant voltage, thereby resulting in the regulated voltage being at a first voltage, and wherein when the battery voltage is below the fixed voltage, the control voltage is provided at a low constant voltage, thereby resulting in the regulated voltage being at a second voltage less than the first voltage.
    Type: Application
    Filed: February 1, 2011
    Publication date: August 2, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS COMPANY
    Inventors: Jaejoon Chang, Ki Seok Yang, Jeonghu Han, Woonyun Kim, Chang-Ho Lee
  • Patent number: 8232785
    Abstract: A programmable AC/DC or DC/DC power supply adapted to compensate for voltage drop in a cable extending to a portable electronic device. The invention reduces the number and size of cable wires and tip components needed to remotely control an output voltage level and an output current limit. The voltage and current programming components are outside the compensation feedback loop.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: July 31, 2012
    Assignee: IGO, Inc.
    Inventor: Liming Sun
  • Patent number: 8217638
    Abstract: A linear regulator and methods of regulation are provided. In one implementation, a linear regulator is provided. The linear regulator can receive an input voltage, generate an internal bias voltage in response to the received input voltage. The linear regulator can determine if the input voltage meets one or more first criteria and second criteria, and adjust an output voltage based on the internal bias voltage if the input voltage meets the one or more first criteria. The linear regulator also can supply the input voltage directly to the load if the input voltage meets the one or more second criteria. In some implementations, the linear regulator can generate an internal bias voltage that is clamped within a desired operating range if the input voltage meets the one or more first criteria, and adjusts one or more electronic circuits using the internal bias voltage to provide the adjusted output voltage.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: July 10, 2012
    Assignee: Marvell International Ltd.
    Inventors: Ying Tian Li, Sakti P. Rana, Kuong Hoo, legal representative
  • Patent number: 8183711
    Abstract: A power extractor suitable for locations proximate to the sink of a signal channel is disclosed. The power extractor can generate power from the signal channel without substantially disturbing a quality of signals within the channel. In one embodiment, the power extraction circuit can include: a current source coupled to a sink side of a signal channel, where the signal channel is independent of any power supply signal, the current source being high impedance to maintain signal quality within the signal channel; a first regulator configured to generate a first regulated supply from a current derived from the signal channel using the current source; and a second regulator coupled to the first regulator, where the second regulator is configured to generate a second regulated supply from the first regulated supply.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: May 22, 2012
    Assignee: Quellan, Inc.
    Inventors: Georgios Asmanis, Faouzi Chaahoub
  • Patent number: 8179115
    Abstract: A bandgap circuit is provided, which includes a current source, a voltage boost circuit, a voltage input circuit, a voltage equalizer circuit, and a voltage output circuit. The current source provides a first current, a second current, and a third current, which are equal to one another. The voltage boost circuit provides a boost voltage by a single current path. The voltage input circuit receives the first and the second currents, and provides a first input voltage and a second input voltage based on the boost voltage. The voltage equalizer circuit receives the first and the second input voltages and equalize the two input voltages. The voltage output circuit provides a bandgap reference voltage according to the third current.
    Type: Grant
    Filed: July 15, 2009
    Date of Patent: May 15, 2012
    Assignee: Aicestar Technology (SuZhou) Corporation
    Inventor: Ling Wang
  • Publication number: 20120112718
    Abstract: The invention proposes a low-dropout voltage regulator comprising an output terminal for providing an output voltage (Vout) regulated as a function of a reference voltage, and for providing an output current (Iout), and additionally comprising an output current limiting unit (LIMIT3), with said unit comprising:—replication means for replicating the output current (T31) to provide a mirror current of the output current (Imirror),—comparison means (COMP31, COMP32) for comparing the mirror current with a reference current (Iref),—feedback means for supplying feedback (COMP31, COMP32, R35, REGUL3) to the regulator in order to limit the output current when the mirror current is greater than the reference current, and the mirror current is injected into the output terminal.
    Type: Application
    Filed: July 15, 2010
    Publication date: May 10, 2012
    Inventor: Alexandre Pons
  • Patent number: 8148962
    Abstract: Systems and methods providing for improved voltage regulation of a supply voltage for an integrated circuit are described herein. The voltage regulator circuit includes a feedback circuit coupled to a first current path and adapted to maintain a gate voltage of a feedback transistor substantially constant. A pass device is coupled to a second current path and adapted to receive a signal with a magnitude based on first and second currents supplied by first and second current sources to the second current path. In an embodiment, the first current is a substantially constant current and the second current has a magnitude based on a magnitude of the voltage at the feedback transistor gate and a magnitude of a voltage at an output of the voltage regulator circuit coupled to the pass device.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: April 3, 2012
    Assignee: SanDisk IL Ltd.
    Inventor: Tomer Shaul Elran
  • Patent number: 8134355
    Abstract: A semiconductor device monitors a voltage between a reference potential and an input potential and obtains a constant output potential regardless of a value of the voltage, after the voltage exceeds a predetermined threshold voltage in such a manner that the semiconductor device divides a voltage between the reference potential and the input potential using a plurality of first non-linear elements and at least one linear element to constantly generate a first bias voltage regardless of a value of the voltage, divides a voltage between the reference potential and the input potential using a plurality of second non-linear elements with reference to the first bias voltage to constantly generate a second bias voltage regardless of a value of the voltage, and determines the output potential with reference to the second bias voltage.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: March 13, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Inoue, Kei Takahashi
  • Patent number: 8129977
    Abstract: A reference voltage generator includes a reference voltage generating circuit that outputs a second reference voltage; and a DA converter that DA-converts a digital signal from outside in accordance with the second reference voltage. The circuit includes a first constant voltage circuit that operates on a DC voltage and outputs a first constant voltage; a second voltage divider that divides the first constant voltage at a second dividing ratio and outputs a second partial voltage; an output transistor that operates on the DC voltage and allows current to flow therethrough according to a signal applied to its control electrode; a current-voltage converter that converts the current from the output transistor into a voltage and outputs the voltage (second reference voltage); and a second op-amplifier that operates on the first constant voltage and controls the output transistor so that the second reference voltage equals to the second partial voltage.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: March 6, 2012
    Assignee: Ricoh Company, Ltd.
    Inventor: Ippei Noda
  • Patent number: 8129968
    Abstract: The present invention discloses an integrated circuit for system calibration, applicable to a power supply, comprising: a comparison module, having a feedback input end coupled to a feedback signal and a reference input end coupled to an analog reference signal for delivering a status signal; a detection and control module, for generating a reference signal and a calibration value according to the status signal, wherein the calibration value is derived from the reference signal at an instant when the status signal changes state, and the calibration value is stored into a calibration value register; a memory module, for receiving, storing and outputting the calibration value; and a reference signal generator, receiving the calibration value to provide the analog reference signal. The present invention can therefore be used to automatically calibrate a system with fewer external components to provide qualified systems.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: March 6, 2012
    Assignee: Grenergy Opto, Inc.
    Inventors: Yen-Hui Wang, Wei-Chun Hsiao
  • Patent number: 8102168
    Abstract: The invention relates to a regulator with an under-voltage lock-out (UVLO) circuit and a reference generator circuit (e.g., a band-gap reference). The UVLO circuit includes an internal band-gap reference circuit and a comparison circuit. The UVLO circuit compares an input voltage with the output of the internal band-gap reference circuit to selectively enable the regulator. The output of the internal band-gap reference circuit is also employed to power the reference generator circuit. The reference generator circuit provides a reference signal which is employed to control steady-state regulation. The regulator also includes an operational amplifier circuit for increasing the drive and/or voltage level of the internal band-gap reference circuit output.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: January 24, 2012
    Assignee: National Semiconductor Corporation
    Inventor: Kern Wai Wong
  • Publication number: 20120013318
    Abstract: A voltage down converter includes a voltage comparator for comparing a first reference voltage and an internal voltage to provide a first driving signal; a driving signal controller coupled with the voltage comparator, the driving signal controller configured to generate a second driving signal in response to an external voltage and selectively providing any one of the first and second driving signals; and a voltage supply coupled with the driving signal controller, the voltage supply configured to receive the selectively provided first and second driving signals, wherein the voltage supply is activated in accordance with the first or second driving signal, thereby providing the internal voltage.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 19, 2012
    Applicant: HYNIX SEMICONDUCTOR, INC.
    Inventor: Dong-Keum Kang
  • Patent number: 8093875
    Abstract: A method for cable resistance cancellation. A single remote sense line and a simple cable resistance cancellation network are leveraged in a power supply unit to compensate for the total cable voltage drop, while maintaining tight output accuracy. By completely compensating for the voltage drops, the wire gauge for the main power wires can be reduced, thereby allowing the use of smaller diameter cables.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: January 10, 2012
    Assignee: IGO, Inc.
    Inventor: Liming Sun