Abstract: Disclosed herein are ultrasonic transducer systems comprising: an ultrasonic transducer comprising a substrate, a diaphragm, and a piezoelectric element; a first electrical circuitry coupled to the ultrasonic transducer, the first electrical circuitry configured for driving the ultrasonic transducer or detecting motion of the diaphragm; a plurality of electrical ports coupled to the ultrasonic transducer; and a second electrical circuitry connected to two or more of the plurality of electrical ports, the electrical circuitry comprising one or more of: a resistor, a capacitor, a switch, and an amplifier, wherein the second electrical circuitry is independent from the first electrical circuitry, and wherein the second electrical circuitry is configured to dampen the motion of the diaphragm.

Abstract: Apparatuses and methods for providing internal power voltages are described. An example apparatus includes a first, second, and third clamp circuits, and a clamp control circuit. The first clamp circuit is configured to receive a first external power voltage and provide a first voltage drop to provide a first internal power voltage. The second clamp circuit is configured to receive the first external power voltage and provide a second voltage drop to provide a second internal power voltage, wherein the first voltage drop is greater than the second voltage drop. The third clamp circuit is configured to receive a second external power voltage and provide the second external power voltage as the second internal power voltage when the second external power voltage is activated. The clamp control circuit is configured to activate the third clamp circuit when the second external power voltage reaches a trigger voltage level.

Abstract: A load test apparatus includes: a first resistance unit that has a plurality of first resistors and a first holding part holding the plurality of first resistors; and a first cooling part that includes a cooling device sending cooling air to the plurality of first resistors; a control part that includes a power source terminal part connected to a power source to be tested and an operation part; and a relay part that includes a switching device connected to the power source terminal part and the first resistance unit. The cooling device in the first cooling part faces one first opening in the first holding part. The first cooling part and the first resistance unit are arranged in a third direction (z direction) orthogonal to a first direction (x direction) and a second direction (y direction), and a first load test part.

Abstract: A method, an apparatus, and a computer program product are provided. The apparatus may be a regulator circuit. The regulator circuit includes a first voltage regulator to regulate a first input voltage to the first voltage regulator, the first voltage regulator including a P-type metal-oxide-semiconductor (PMOS), a second voltage regulator to regulate a second input voltage to the second voltage regulator, and a switch circuit to selectively activate at least one of the first voltage regulator or the second voltage regulator. In one aspect, the second voltage regulator includes an N-type metal-oxide-semiconductor (NMOS). In one aspect, the second voltage regulator comprises a two-stage operational transconductance amplifier (OTA) circuit. In an aspect, the first voltage regulator is coupled to the second voltage regulator.

Abstract: Provided is a semiconductor device capable of detecting an abnormal state in which two fuses are both short-circuited or cut. The semiconductor device includes: a trimming circuit having a first fuse and a second fuse connected in series; a current source circuit configured to supply current to the trimming circuit; and a determination circuit configured to determine whether a connection state or disconnect state of the first fuse and the second fuse are abnormal or not based upon signals derived from an output signal of the trimming circuit.

Abstract: A system and method of detecting defects in an analog circuit is provided. A method includes identifying a channel connected block (CCB) from a netlist, creating defect for the CCB to be injected during a simulation, obtaining a first measurement of an output node of the CCB by performing a first analog circuit simulation for the CCB based on providing excitations as inputs to the CCB and obtaining a second measurement of the output node of the CCB by performing a second analog circuit simulation for the CCB based on providing the excitations as the inputs to the CCB and injecting the defect. The method can further include determining a defect type based on the first measurement and the second measurement.

Abstract: A programmable impedance element consists of a plurality of nominally identical two-port elements, each two-port element having an impedance element and two switches, the two-port elements arranged in a chain fashion with a structured set of switches such that a range of impedances can be obtained from each cell by dynamically changing the connections between the impedance elements in the cell. The common cell is constructed by connecting the nominally identical two-port impedance elements in a way that the number of possible combinations of the impedance elements is reduced to the subset of all possible combinations that uses the minimum possible number of connections. This structure allows the creation of matched impedances using industry standard devices. The connections between impedance elements are switches that may be “field-programmable,” i.e., that may be set on the chip after manufacture and configured during operation of the circuit, or alternatively may be mask programmable.

Abstract: In one embodiment, an active stylus includes a transmitter configured to transmit electrical signals to a device through a touch sensor of the device. The active stylus also includes a receiver configured to receive electrical signals from the device through the touch sensor of the device. Furthermore, the active stylus includes a controller configured to determine a strength of an electrical signal received by the receiver from the touch sensor of the device and instruct the transmitter to transmit electrical signals to the device at a voltage based at least on the determined strength of the electrical signal received by the receiver.

Abstract: A charger control circuit (CC) comprises a first charger terminal (CT1) and a system terminal (ST) and is configured to assign a voltage applied at the first charger terminal (CT1) to one of at least three voltage ranges by performing at least one voltage comparison. The charger control circuit (CC) is configured to determine and distinguish, based on the assignment, whether an external charger (EXC1) or a secondary battery (SBAT) is connected to the first charger terminal (CT1). Furthermore, the charger control circuit (CC) is configured to, depending on a predetermined operating state of the first charger terminal (CT1), supply power from the secondary battery (SBAT) or the external charger (EXC1) to a portable electronic device via the system terminal (ST) when the secondary battery (SBAT) or the external charger, respectively, is connected to the first charger terminal (CT1).

Abstract: A test system and test techniques for accurate high current parametric testing of semiconductor devices. In operation, the test system supplies a current to the semiconductor device and measures a voltage on the device. The testing system may use the measured voltage to compute an ON resistance for the high-current semiconductor device. In one technique, multiple force needles contact a pad in positions that provide equi-resistant paths to one or more sense needles contacting the same pad. In another technique, current flow through the force needles is regulated such that voltage at the pad of the device under test is representative of the ON resistance of the device and independent of contact resistance of the force needle. Another technique entails generating an alarm indication when the contact resistance of a force needle exceeds a threshold.

Abstract: A rotary pulser for transmitting information in a mud pulse telemetry system of a drilling operation. The pulser has two rotors mounted adjacent each other so that obstruction of the passages formed between the blades in one pulser by the blades of the other pulser creates pressure pulses in the drilling fluid. Each rotor is separately controlled and can be rotated continuously in one direction or oscillated. The ability to rotate each rotor separately provides flexibility in the pulser's operating mode, so as to allow more efficient generation of pulses, and also enhances the ability of the pulser to clear debris that would otherwise jam or obstruct the pulser.

Abstract: Embodiments of modular-based power supply systems to support welding or cutting operations are disclosed. One embodiment includes a module rack having multiple slots configured to accept electrical input power from a single power drop within a welding or cutting environment. Multiple power supply modules are provided that are configured to be inserted into and withdrawn from the multiple slots. Each power supply module is configured to accept an electrical AC input derived from the electrical input power and provide an electrical DC output. The module rack is configured to support reconfigurable parallel electrical connections of subsets of the power supply modules. Each subset is configured to electrically connect to an output power supply stage to provide a dynamic waveform-controlled welding or cutting electrical signal to support generation of a single arc between an electrode and a workpiece.

Abstract: An RC voltage divider includes a primary part and a secondary part. The secondary part includes at least two equivalent output circuits that are connected in series.

Abstract: An ultrasound device, including a profile generator, an encoder configured to receive a profile signal from the profile generator, and an attenuator configured to receive a signal representing an output of an ultrasound sensor and coupled to the encoder to receive a control signal from the encoder, the attenuator including a plurality of attenuator stages, the attenuator configured to produce an output signal that is an attenuated version of the input signal.

Abstract: An active damper and a power supply according to exemplary embodiments include: a damper resistor coupled to an input voltage; a damper switch coupled in parallel with the damper resistor; and a capacitor to which a reset current generated by a leading edge of the input voltage flows. The damper switch is turned off by the reset current.

Abstract: A switchable voltage regulation circuit includes a power supply chip and a voltage regulation module. The voltage regulation module includes first and second resistors and first and second switch units. A first terminal of the first resistor is electrically coupled to a power supply and a first output pin of the power supply chip. A first terminal of the second resistor is electrically coupled to the second terminal of the first resistor. The first switch unit is electrically coupled between the first terminal of the first resistor and the second terminal of the first resistor. The second switch unit is electrically coupled between the first terminal of the second resistor and the voltage output. By manual switching, or by transistors under control of a baseboard management unit, the resistances can be switched in or switched out to regulate the voltage.

Abstract: Conductive strips are stacked, insulated, folded, and formed into geometric shapes to provide a low resistance, low inductance, shunt, wherein the geometric shape readily enables cooling to reduce changes in resistance due to self-heating effects. One such geometric shape is attained by winding the conductive strips into a spiral. Another geometric shape is a shape resembling a wave. Both geometric shapes allow cooling by directing airflow from a fan across their surface portions. A variable-speed cooling-fan is controlled in response to measured temperature of the shunt, or in response to a measurement of the current through the shunt. Differential cooling may be employed by means of changing the amount of airflow across various portions of the shunt in response to measured temperature of the shunt.

Abstract: Provided is a maximum power extraction devices including: a battery; a voltage control unit adjusting a size of a first power outputted from the battery according to a resistor selected from a plurality of resistors, and generating a compare signal according to a size difference between an operating voltage adjusting the size of the first power depending on the selected resistor and a reference voltage; a switching unit connected between the battery and a load and adjusting a size of the operating voltage according to a size difference of the compare signal in response to first and second switching control signals; a switching control unit generating the first and second switching control signals to allow a size between the operating voltage according to the compare signal and the reference voltage to be within an error range; and a maximum power control unit measuring the number of first operations obtained by counting the occurrence number of the first or second switching control signals for a predetermined

Abstract: A semiconductor circuit includes a control signal generation circuit configured to generate control signals in response to a voltage characteristic determination signal and a reference voltage generation circuit configured to output a main reference voltage, having one of a first characteristic of being proportional to temperature, a second characteristic of being constant irrespective of temperature, and a third characteristic of being inversely proportional to temperature, in response to the control signals.

Abstract: A voltage regulator includes a voltage generation unit, a first resistor section, and a second resistor section. The voltage generation unit compares a reference voltage level with a voltage level of a first node and generates an output voltage. The first resistor section includes a first sub-resistor and a second sub-resistor between the first node and a ground voltage node, and controls a connection between the first sub-resistor and the second sub-resistor to change a resistance value of the resistors. The second resistor section includes a reference resistor, a plurality of unit resistors, and a plurality of step resistors, and controls connections of the unit resistors and the step resistors to change a resistance value of the resistors.

Abstract: A current generator includes an op-amp having a negative terminal arranged to be coupled to an input voltage, a resistance selection circuit having at least one tunable resistor connected with each other, and at least one power transistor. A gate of the at least one power transistor is coupled to an output of the op-amp, and a drain of the at least one power transistor is coupled to the at least one tunable resistor or a load. The resistance selection circuit is configured to select a node of the at least one tunable resistor based on the input voltage for coupling from a positive terminal of the op-amp. The at least one tunable resistor is configured to adjust a resistance setting to control a current level of the current generator based on a power supply voltage or a current of a reference resistor.

Abstract: A switched mode power supply unit realized by an integrated circuit comprising a control circuit controlling the operation of the switched mode power supply unit, wherein the control circuit is configured to provide a plurality of different circuit configurations for different operating environments. The circuit configuration for the control circuit is defined by a control signal received by the control circuit.

Abstract: Multiple characteristics of a DC-DC converter, such as its mode of operation (e.g., either forced continuous conduction mode, or discontinuous conduction mode), and an operational parameter (such as the dead-time between switching times of the output switching devices (upper and lower MOSFETs) of the converter, whose associated driver integrated circuit has a pin usage that leaves only a single pin available for auxiliary purposes, are programmed by a single pin-based digital and analog information extracting circuit that couples both digital information and analog information within the same control signal to the driver IC by way of only the one available pin.

Abstract: Simple and compact structures for an attenuator or resistor ladder can be implemented in a standard integrated circuit process as well as hybrid, thick or thin film ceramic processes, which allows metallization along with resistive components. The structure has the mathematical property that it attenuates an applied reference voltage logarithmically/exponentially along its length because of the natural solution of the Laplace equation for this type of geometry and contact configuration.

Abstract: A trimming circuit which comprises a shunt circuit having two shunt resistors and two shunt ON/OFF switches and connected in parallel with a series resistor circuit. The middle point of the shunt circuit is connected to a connection point of the series resistor circuit, the resistance ratio thereof with respect to the connection point being equal to the resistance ratio of the shunt resistors.

Abstract: A variable resistor network has a coarse resistance network and a fine resistance network connected in series with the coarse network. The coarse resistance network comprises a chain of series-connected resistors any one or more of which may be switched out of the series by individual parallel-connected relays. The fine network comprises a shunt resistor together with a fixed resistor and a series-connected adjustable resistor together connected in parallel with the shunt resistor. A control circuit is arranged to control the relays for the switching of the resistors of the coarse network and also to control adjustment of the adjustable resistor. A chosen resistance value can be set by appropriate switching of the coarse network and adjustment of the adjustable resistor.

Abstract: A digital multilevel memory system includes a charge pump and a voltage regulator for generating regulated high voltages for various memory operations. The charge pump may include a plurality of boost circuits to boost the output of the charge pump during a fast start up. Afterwards, the boost circuits are disabled to allow the charge pump to generate high voltages without boosting. The boost circuits may be successively enabled to boost the voltage. The boost circuits may be loadless. The voltage regulator may operate in an open loop and may include a resistive divider as a reference voltage for regulating the high voltage from the charge pump. The charge pump may include spread spectrum pump clocking to reduce electromagnetic inference for capacitor or inductor on-chip charge pumping.

Abstract: A converter control circuit applicable to various topologies of converters each employing two switching devices is disclosed. The converter control circuit includes an oscillator for generating a pulse signal and triangle-wave signal of a certain frequency, a switching control signal output unit for outputting a switching control signal to control ON/OFF of a plurality of switching devices based on a duty ratio determined from a feedback signal which is applied to a feedback terminal, a mode select signal generator for generating a mode select signal for determination of a control mode of a converter in response to the feedback signal applied to the feedback terminal, and a mode selecting unit for selecting the control mode in response to the mode select signal.

Abstract: A current source is provided with two resistor banks, and digital potentiometers are used to control how much each resistor bank affects the resulting output current. Furthermore, when the digital potentiometers are at a particular setting such that a particular resistor bank does not affect the resulting output current (i.e., the resistor bank is “inactive”), the resistance of that resistor bank can be switched without affecting the output current, thus minimizing or eliminating discontinuities in the output current during a current sweep operation. Thus, for example, when a resistor bank meets its threshold and becomes inactive, the resistance of the inactive resistor bank may be switched, and then the digital potentiometer setting may be changed to facilitate smoothly reactivating that resistor bank, with the new resistance.

Abstract: A dynamic braking load analyzer that determines the proper resistance value for a dynamic braking load resistor to be used in combination with a variable frequency drive or servo-drive to accommodate the power dissipated from an induction motor when it is being reduced in speed. The analyzer includes a resistor bank having a plurality of resistors electrically coupled in parallel. Switches are provided between the resistors, and a resistor selector switch determines which resistors are switched into the resistor bank circuit. A heat sensing resistor in the resistor bank measures the heat generated by the resistors and provides a signal that is read by a heat meter. The combination of the temperature measurement and the resistance of the resistors in the circuit gives the proper braking resistance value for the deceleration of the induction motor.

Abstract: A resistance compensation circuit and a method thereof for tuning frequency, includes several resistors serially connected to one another, several transistors, each of which connects across one of the corresponding resistances, and a register electrically connected to the gates of the transistors. A control signal controls the switching of the transistors either to compensate the process variation of the resistance through the register or to tune the working frequency of the Integrated circuit.

Abstract: A variable resistor array adapted to make a resistance value between a first terminal and a second terminal variable, includes a plurality of resistors connected in series, first through nth MOS transistors selectively connected to the resistors, and first through nth switches having one input terminal connected to the source of the ith MOS transistor, another input terminal connected to a predetermined voltage, and an output terminal connected to a back gate of the ith MOS transistor, and connecting either one of the one input terminal and the other input terminal to the output terminal under control of the ith control signal. The ith switch connects the other input terminal to the output terminal, and the ith switch also connects the one input terminal to the output terminal.

Abstract: A load calculation control method and apparatus for load characteristic tests of electric generator and the like is provided, which enables continuous and precise following of a load control value and maintaining the value without using industrial water. In this apparatus, a resistor bank ?, which is to be connected to a load apparatus provided with a power supply apparatus (G), a ground relay (GR), a voltmeter (V), an electric power meter (P), an ampere meter (A), and main circuit breakers (CB, CBH), is divided into two or more (2-N). A switch (CL/CH) and a controller (CV) are connected to each resistor bank (?1-?N). each of which is assigned and maintained at a power capacity obtained by dividing, based on binary number, the maximum power capacity of resistor bank groups (?L, ?H) by two through (2n?1).

Abstract: Multiple characteristics of a DC-DC converter, such as its mode of operation (e.g., either forced continuous conduction mode, or discontinuous conduction mode), and an operational parameter (such as the dead-time between switching times of the output switching devices (upper and lower MOSFETs) of the converter, whose associated driver integrated circuit has a pin usage that leaves only a single pin available for auxiliary purposes, are programmed by a single pin-based digital and analog information extracting circuit that couples both digital information and analog information within the same control signal to the driver IC by way of only the one available pin.

Abstract: Multiple characteristics of a DC-DC converter, such as its mode of operation (e.g., either forced continuous conduction mode, or discontinuous conduction mode), and an operational parameter (such as the dead-time between switching times of the output switching devices (upper and lower MOSFETs) of the converter, whose associated driver integrated circuit has a pin usage that leaves only a single pin available for auxiliary purposes, are programmed by a single pin-based digital and analog information multiplexing circuit that couples both digital information and analog information within the same control signal to the driver IC by way of only the one available pin.

Abstract: A voltage regulator and a method of manufacturing the voltage regulator, which can provide a desired output voltage of the voltage regulator using a plurality of metal wires, arranged in regular patterns, and conductive metal wiring patterns, configured to activate the metal wires by selectively connecting them to each other when a voltage regulator having various output voltage patterns is produced through a single chip, thus reducing the costs of manufacturing the voltage regulator by simplifying the manufacturing process while reducing the size of the chip of the voltage regulator.

Abstract: Disclosed is a controller for driving current of a semiconductor device having an over-driving function, the controller comprising: a load means supplied with an internal voltage; a plurality of switching means, each of which has a first terminal connected to an external voltage and a second terminal connected to the load means, wherein at least one of the plurality of switching means is selectively turned on/off according to an voltage level of the external voltage.

Abstract: An optical pointing device and a power supply semiconductor device therefore are provided. The optical pointing device includes: an optical unit for irradiating light to an object using a light source and receiving light reflected by the object to output an optical image; a motion sensor for receiving the optical image, sensing image data, and calculating a motion value to output the motion value; a moving velocity sensor for receiving the motion value and calculating a moving velocity of the optical pointing device to output the moving velocity; and a variable power supply for generating a different power supply voltage according to the moving velocity. The optical pointing device can generate different optimum power supply voltages required for respective internal blocks and variably apply a power supply voltage according to the moving velocity. Thus, the supply of unnecessary power is cut off, thereby preventing waste of power.

Abstract: An alterable DC power supply circuit includes a regulator, a resistor, and an adjustable load resistance. The regulator includes a voltage input pin, a voltage output pin, and an adjusting pin. The resistor is coupled between the voltage output pin and the adjusting pin. The adjustable load resistance is coupled between the adjusting pin and ground. The output voltage of the alterable DC power supply is adjustable by adjusting the adjustable load resistance. Using this alterable DC power supply to test the voltage stability of a chipset improves testing efficiency.

Abstract: The control precision of one or more parameters of an integrated circuit (IC), for example the output voltage of a voltage regulator comprised in the IC, may be improved even when using inaccurate components external to the IC. Control of the output voltage, or any parameter, using components external to the IC may include coupling a resistor to the IC and measuring the actual resistance value of the resistor, and based on the measured value, selecting a nominal resistance value from a set of resistance values previously specified by the user. The output voltage, or parameter, may be generated according to the nominal resistance value instead of the actual resistance value, thereby reducing the error that may be incurred due the actual resistance value of the resistor not matching the expected nominal value of the resistor.

Abstract: A two-wire communication protocol between a controller device and a controlled device, wherein both devices are coupled by a clock line and a data line. The controller device sends control signals comprising N bits, N being greater than or equal to two, to the controlled device via the data line. Each bit of said control signals is latched onto the controlled device on consecutive edges of a clock signal sent by the controller device to the controlled device on the clock line.

Abstract: A system, method and computer program for configuring power supply apparatus to supply a voltage optimized to tolerate a range about a nominal operating voltage of a device comprises a tester to test and communicate to a comparator a present utility voltage value. The comparator compares the present utility voltage with a present nominal operating voltage of the device. A configurator responds to the present utility voltage falling within an upper half of a first range having a centre point higher than the present nominal operating voltage and lower than an upper out-of-tolerance voltage of the device or within a lower half of a second range having a centre point lower than the present nominal operating voltage and higher than a lower out-of-tolerance voltage of the device, by configuring the power supply apparatus to supply a voltage respectively within the first range or the second range.

Abstract: A power regulator has an output for regulated power that is connected to supply power to a load. The load can have various electrical characteristics, including requiring a rapid transient response. The transient response amplitude for the power regulator is decreased by adding capacitance at the output, but that slows the response time of the power regulator by lowering the crossover frequency and the phase margin at the crossover frequency. An adjustable gain element imbedded in the feedback network provides an input to permit a builder or user of the power regulator to vary the effective value of impedance elements in the feedback network. The builder or user selectively connects an impedance to the input of the adjustable gain element to thereby adjust the frequency characteristics of the feedback network to thereby adjust output characteristics of the power regulator to compensate for the effects of capacitance added to the power regulator output.

Abstract: Fuse circuit designs and the use thereof are disclosed. In one example, a fuse circuit providing predictable total resistances for multiple rounds of programming comprises a predetermined number of fuse stages coupled in series. Each stage comprises a first and a second connecting nodes, a fuse connected between the first and second connecting nodes, a first resistor with its first end connected to the first connecting node, and a second resistor with its first end connected to the second connecting node, wherein the first and second resistors connect to a third and a fourth connecting nodes, which are the first and second connecting nodes of a next fuse stage respectively, through their second ends.

Abstract: An adjustable regulated power device includes, for example, an electronic potential device, a regulated device and a control device. The electronic potential device includes an electronic potentiometer having a plurality of potentiometers. The regulated device includes a voltage regulator connected to an input power and at least one first potentiometer of the potentiometers. The first potentiometer forms a variable resistor used for adjusting an output voltage from the voltage regulator. The control device includes a microprocessor and a control input device used for receiving an input setting value. The microprocessor is connected to the control input device and the electronic potentiometer for receiving the setting value and controlling the electronic potentiometer according to the setting value.

Abstract: A reference voltage generation circuit includes first to third resistance ladder circuits. The first resistance ladder circuit has at least one variable resistance circuit in which a resistance value between both ends is variable, and outputs multi-valued reference voltages. The second resistance ladder circuit has series-connected resistance circuits each of which has a fixed resistance value, and outputs a plurality of reference voltages. The third resistance ladder circuit has at least one variable resistance circuit in which a resistance value between both ends is variable, and outputs multi-valued reference voltages. The first to third resistance ladder circuits are connected in series between first and second power supply lines. The resistance values of the variable resistance circuits in the first and third resistance ladder circuits are variably controlled by a given command or a variable control signal input through an external input terminal.

Abstract: A digital potentiometer is disclosed that includes first, second, and third signal terminals. A chain of series-connected impedance elements with multiple tap points is connected between the first and second signal terminals. A plurality of first switching devices are each connected to a respective one of the multiple tap points and to an internal wiper node. A configurable output stage is connected between the internal wiper node and the third signal terminal. The configurable output stage includes a buffer and a second switching device. The second switching device is operable to bypass the buffer. A switching circuit controls switching of the first switching devices. The switching circuit includes a Gray-code counter, a Gray-code decoder, and a make-before-break circuit that controls the timing of the switching of the wiper switches.

Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit has a voltage regulator and a clock divider that may be used to adjust the operational frequency and/or voltage potential of the integrated circuit to reduce the power consumption of the integrated circuit while in operation.

Abstract: An impedance network. The network includes a plurality of impedance elements, at least one end terminal, and a wiper terminal. The network also includes a first plurality of switching elements selectively providing tap positions to the at least one end terminal, selectable at a first specified increment of impedance elements in the plurality of impedance elements. The network further includes a second plurality of switching elements selectively providing a tap positions to the wiper terminal, selectable at a second specified increment of impedance elements in the plurality of impedance elements.

Abstract: A power supply apparatus includes an output voltage generator, a reference voltage generator, a voltage divider, and a voltage control circuit. An input voltage is supplied from a direct current power source. The output voltage generator generates a constant output voltage based on the input voltage. The reference voltage generator generates a reference voltage. The voltage divider divides the constant output voltage into a divided voltage in accordance with a voltage dividing ratio variable in response to an externally-input control signal. The voltage control circuit controls the output voltage generator to regulate the constant output voltage such that the divided voltage from the voltage divider is equalized to the reference voltage.