By Resistance Or Impedance Measuring Patents (Class 324/525)
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Publication number: 20020097055Abstract: In a method and system for assessing the stability of an electric power transmission network, where at least one pair of measurements comprising a first and a second measurement point (P1,P2), each measurement point comprising a voltage and a current phasor, is processed and where a Thévenin impedance (Zt) and a present stability margin (dS(k)) value are computed, a validity indicator (v) is computed which depends on whether there is a difference between the first and second measurement points and whether there is a difference between corresponding estimated first and second load impedances (Za). From all validity indicators (v) associated with all of the at least one pair of measurements a quality indicator (q) is computed that is associated with the Thévenin impedance value (Zt) and with the present stability margin (dS(k)). The invention allows to continuously compute and output a present stability margin (dS(k)) value and to provide a measure (q) of its quality.Type: ApplicationFiled: November 26, 2001Publication date: July 25, 2002Inventors: Christian Pinzon, Joachim Bertsch, Christian Rehtanz
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Patent number: 6425025Abstract: A bus includes at least a pair of terminators interposed between a pair of connectors. A first one of the terminators is located within a predetermined distance from a first one of the connectors. A second one of the terminators is located within the predetermined distance from a second one of the connectors. The second terminator is selectively disabled in response to the second terminator being interposed between the first terminator and a third terminator of the bus.Type: GrantFiled: June 3, 1999Date of Patent: July 23, 2002Assignee: Dell USA, L.P.Inventor: Srinivas Rao Kamepalli
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Publication number: 20020093340Abstract: A device for detecting load impedance having an analog circuit portion for detecting the impedance value of a load, and a digital circuit portion adapted to provide load impedance type information. The analog circuit portion having two power MOS transistors connected in series to each other and between a supply voltage and the ground, and a pair of mirror MOS transistors common-connected with their respective gate terminals to the gate terminals of the power MOS transistors. The digital circuit portion includes a first comparitor to determine whether the output current of an audio amplifier is higher or lower than a threshold value and a second comparitor to determine whether the output voltage of the amplifier is higher than a threshold voltage, a memory to store output signals of the first and second comparitors, and a logic circuit arranged in cascade with the memory to output a load-type indication signal.Type: ApplicationFiled: August 23, 2001Publication date: July 18, 2002Applicant: STMicroelectronics S.r.l.Inventors: Giorgio Chiozzi, Sandro Storti
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Patent number: 6420877Abstract: A method and apparatus for detecting and determining discontinuities in a load under test. The apparatus is preferably a digital continuity analyzer that determines, by time duration of a discontinuity signal, discontinuities in a resistive load under test and displays a total count thereof. Circuit characteristics allow for adjustable time periods for determining discontinuities as required by various tests. During the discontinuity determination, the circuit automatically resets when the discontinuity ceases. Total discontinuities are displayed for the length of the test.Type: GrantFiled: April 14, 1999Date of Patent: July 16, 2002Assignee: Group Dekko Services, LLCInventor: Gavin L. Replogle
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Patent number: 6410352Abstract: A voltage is applied across a control resistor, and the voltage is caused to decay. The decay is monitored by a testing circuit such as a comparator. When the voltage across the control resistor has decayed to a value less than or equal to a reference voltage in the comparator, a switch time period is established. Fuses in a memory device are tested against the established switch time period. The fuses are tested in a similar fashion: a voltage is applied across the fuse being tested, and the voltage is caused to decay. The comparator monitors the decay of the voltage across the fuse. If the resistance value of a fuse being tested is within specification, the comparator changes its state at a time equal to or less than the switch time period established for the control resistor. Testing time for fuses can further be minimized by having an external access to the reference in the comparator.Type: GrantFiled: May 14, 2001Date of Patent: June 25, 2002Assignee: Micron Technology, Inc.Inventors: Tim Damon, Phillip E. Byrd
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Patent number: 6407893Abstract: An arc fault detector comprised as a stand alone unit and in combination with a ground fault circuit interrupter (GFCI) functions to provide protection from potentially dangerous arc fault conditions. When combined with a GFCI, the combination arc fault/ground fault circuit interrupter (AFCI/GFCI) provides protection from both arc fault and ground fault conditions. A single transformer is used to detect faults between neutral and ground and arc faults. An impedance splits the current flow into two portions so as to generate differential current proportional to the current flowing through the conductors. An early arcing detector periodically tests the AC line for high impedance between the device and a main breaker panel. The AFCI/GFCI device detects both AC line frequencies and high frequencies associated with arcing. Both average and instantaneous values of both AC line frequency and high frequency arcing signals are processed to generate an arc fault signal.Type: GrantFiled: October 2, 2000Date of Patent: June 18, 2002Assignee: Leviton Manufacturing Co., Inc.Inventors: Benjamin B. Neiger, Roger M. Bradley, James N. Pearse, William J. Rose
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Patent number: 6396284Abstract: A permanently mounted AC powered control/display unit and a remote sensor for use in measuring ground resistance. The sensor is permanently mounted around the earth grounding cable. The control display unit generates a 1953 Hz, 5 Vac sine wave which is sent via a cable to a 100:1 ratio drive transformer in the remote sensor. The transformer induces a 0.05 Vac sine wave in the ground cable. The resulting current is detected by a 100:1 turns ratio sense transformer. The current is returned via the cable to the control display unit and converted to a voltage, filtered, amplified and rectified by a synchronous rectifier. The rectified voltage is again filtered and presented to an analog to digital converter. A microprocessor reads the output of the analog to digital converter and the ground resistance is computed by using Ohm's Law (R=E/I), the result being shown on a display.Type: GrantFiled: June 9, 2000Date of Patent: May 28, 2002Assignee: Ramcom Systems, Inc.Inventors: Ralph C. Tisdale, Emanuel H. Hirsch
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Publication number: 20020057090Abstract: A device for the automatic control of joints 5 in electrical high voltage lines is disclosed. It comprises a first support 1, a first wheel 2, for lying on a line 4, a driving means for driving said first wheel 2, at least one second wheel 3 for lying on said line 4, a measurement unit 11, in contact with means for measurement of physical data at said joint. These means comprise at least one pointed element 7, 8, 9 for electrical contact with the line 4. The device is especially characterized in that at least one wheel 2, 3 is provided electrically connected to said measurement unit.Type: ApplicationFiled: January 7, 2002Publication date: May 16, 2002Inventor: Jonas Ormin
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Patent number: 6389109Abstract: A method detects a fault in a subscriber line having two wires with separate input impedances. The method includes driving the subscriber line from one end with an alternating voltage, making one-ended electrical measurements on the driven liner and determining from the measurements a quantity proportional to the phase difference of the two input impedances. The method also includes identifying a fault in response to the phase difference having a signature associated with presence of a fault in the line.Type: GrantFiled: September 30, 1999Date of Patent: May 14, 2002Assignee: Teradyne, Inc.Inventors: Kurt E. Schmidt, Roger Faulkner
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Publication number: 20020053912Abstract: The present invention relates to a method for location of a fault which has occurred on one of a plurality of lines in a power distribution network where the location is performed with the said of measured values of the common supply voltage of the said plurality of lines and the currents of the said plurality of lines after the occurrence of a fault; calculating the equivalent positive-sequence impedance Z1kf and zero-sequence impedance ZZ0kf of the network in a pre-fault steady state for all M nodes based on knowledge of the configuration and topology of the network, and obtaining, via a superordinate protection system, which of said plurality of lines has become faulty and which type of fault has occurred.Type: ApplicationFiled: July 11, 2001Publication date: May 9, 2002Inventors: Murari Saha, Eugeniusz Rosolowski
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Patent number: 6385297Abstract: A method and automatic test system for determining qualification of a twisted pair transmission line to propagate data signals. The method includes measuring phase imbalance in the twisted pair transmission line. The phase imbalance is determined by resistance imbalance in the twisted pair transmission line. The resistance imbalance is determined by applying a common mode voltage to the twisted pair transmission line; and, determining phase imbalance in the twisted pair in response to the applied common mode voltage. The method includes applying a common mode voltage to the twisted pair transmission line; determining phase imbalance if the twisted pair in response to the applied common mode voltage; detecting a peak in the determined phase imbalance; determining a frequency of the detected peak; determining line qualification in accordance with the determined frequency.Type: GrantFiled: April 2, 1999Date of Patent: May 7, 2002Assignee: Teradyne, Inc.Inventors: Roger Faulkner, Kurt E. Schmidt, Yun Zhang
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Publication number: 20020050826Abstract: A method of testing a high-side driver and a low-side driver in an airbag squib circuit includes preliminary testing of squib resistance and squib leakage for a plurality of trials. Next, one of the drivers is turned on while keeping the other one of the drivers off. A current-limited power supply supplies an intermediate voltage to a squib terminal and the voltage at the terminal is continuously compared with a predetermined voltage range which includes the intermediate voltage. The one driver is turned off in response to the voltage at the point being outside the predetermined voltage range, thereby detecting that the one driver is operating properly. If the voltage at the point remains in the predetermined voltage range for a predetermined time period, then the one driver is turned off and an indication is made that the one driver has failed. If the first driver passed, then the other driver is tested in the same manner.Type: ApplicationFiled: October 31, 2001Publication date: May 2, 2002Inventors: Colm Peter Boran, Paul Douglas Bingham, Steven John Bigham, David Matthew Mantey
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Patent number: 6332738Abstract: A fiber optic cable (10) is buried below ground, either by direct burial, or by being pulled through a previously buried duct. During cable burial, the instantaneous resistance between the sheath and ground (the sheath-to-ground resistance) is continuously monitored. If the instantaneous sheath-to-ground resistance drops below a prescribed value, an alarm is generated, signaling a sheath fault. During burial, the length of cable paid out and placed underground is monitored, thus providing an indication of the relative location of the sheath fault.Type: GrantFiled: March 6, 2000Date of Patent: December 25, 2001Assignee: AT&T Corp.Inventors: Hossein Eslambolchi, John Sinclair Huffman
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Publication number: 20010052777Abstract: The resistance value and the leakage current of a load can be measured simultaneously. A load current is fed, mirrored by electrical power supplies (1, 3, 36), into a resistance measuring circuit (13, 30) and a leakage current measuring circuit (14 to 16). This permits rapid, precise measurement of a plurality of loads by a single measuring circuit connected via one multiplexer. The firing transistors can be distributed among different ASICs or provided jointly for a plurality of firing caps.Type: ApplicationFiled: March 9, 2001Publication date: December 20, 2001Inventors: Horst Belau, Stefan Hermann, Marten Swart
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Patent number: 6320399Abstract: The present invention concerns a method for measuring a chip integrated structure (1) including at least one coil (5) having a plurality of turns (6). The present invention is characterized on the following steps: measuring the resistance across the terminals of first and second portions of said coil (5), corresponding to two different numbers of turns of the coil; computing the ratio of the measured resistances across the terminals of first and second portions of the coil (5); comparing the ratio to a constant measured from a sample of resistance measurements made on coils of identical geometry; and determining the presence or the absence of a short circuit between at least two turns of one of said portions of said coil (5), when the ratio is different from or equal to said constant respectively. The present invention further concerns an integrated circuit which is able to allow implementation of the above mentioned measuring method.Type: GrantFiled: March 20, 1998Date of Patent: November 20, 2001Assignee: EM Microelectronic-Marin SAInventors: Pascal Kunz, Antal Banyai
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Patent number: 6292944Abstract: A method and apparatus for locating the source of noise ingress into a CATV system return path by coupling a filter having a passband in the noise frequency bandwidth to the nodes between adjacent return path amplifiers. The filter is sequentially coupled to the nodes, working away from the CATV system headend. A signal level meter or the like monitors the effect on the noise of coupling the filter to the nodes. When a node is reached at which coupling of the filter to the node no longer has any effect on the signal level in the node, the source of the noise is isolated in the node immediately preceding the node under test.Type: GrantFiled: July 29, 1997Date of Patent: September 18, 2001Assignee: Trilithic, Inc.Inventor: James E. Harris
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Patent number: 6288551Abstract: In an arrangement that can be implemented with a simple circuit, the load is connected in parallel to an additional resistor. The primary-side input resistance of the transformer is measured, and when the input resistance differs from a predefined value, a load malfunction is signaled.Type: GrantFiled: February 18, 1998Date of Patent: September 11, 2001Assignee: Robert Bosch GmbHInventors: Erich Zabler, Anton Dukart
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Patent number: 6288553Abstract: The invention relates to a method for determining the loop resistance of a power supply network with a neutral conductor (called N), a phase or external conductor (called L1), a ground or protective earth conductor (called PE), and a fault current breaker (called FI) based on the differential quotient Ri=dU/dI≈(U1−U2)/(I1−I2); whereby U1 is the measured, unloaded network voltage, I1 is the zero current without load, U2 is the measured, loaded network voltage, and I2 is the calculated load current. According to one aspect of the invention, the following steps are provided: Loading of a L1-N loop and determining the resistance RL1 according to equation (1), loading of a N-PE loop with a measuring current IM under a measuring voltage UM which is small enough to avoid triggering of the fault current circuit breaker, and determining the resistance RPE according to the following equation (2): RPE=UM/IM (2) and determining the loop resistance as RL1+RPE.Type: GrantFiled: October 14, 1998Date of Patent: September 11, 2001Assignee: Ch. Beha GmbH Technische NeuentwicklungenInventors: Christoph Hofstetter, Frank Henninger
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Patent number: 6281685Abstract: A system and method for locating flaws in cable shields and electromagnetic tubing (shield conduit) without disconnection of the cable or conduit under test is described. The fault location method, using a unique sensor array and fault detection circuit, supplements capabilities of earlier inductance/resistance tester. Previous inductance/resistance testers allow the user to measure very small resistances at cable/connector joints, usually without disconnecting the circuit under test.Type: GrantFiled: August 29, 1995Date of Patent: August 28, 2001Assignee: The United States of America as represented by the Secretary of the ArmyInventor: John E. B. Tuttle
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Patent number: 6265880Abstract: Apparatus and method to identify chafing of a conduit, thereby reducing the failure of any system which would be damaged or whose function would be impaired by abrasion of the conduit. Such a system may carry electrical power, fuel, other fluid, hydraulics, pneumatics, optical, or electromagnetic signals. Wear caused by rubbing against external structures is detected by wrapping the conduit with a sensing element, which may be a conductive wire, waveguide, fiber optic cable, or a tube (wound around the conduit or enclosing it) that holds a fluid under pressure. The sensing element is positioned so that chafing on the conduit electrically contacts, breaks, or punctures the sensing element well before the conduit fails.Type: GrantFiled: June 15, 1999Date of Patent: July 24, 2001Assignee: The United States of America as represented by the Secretary of the Air ForceInventors: Frank H. Born, Roy F. Stratton, Lamar R. Harris
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Patent number: 6256592Abstract: In a fault location system, selected information concerning the power signal is obtained at each terminal location on a multi-ended power line. Typically, protective relays are positioned at the terminal locations. The selected information includes the magnitude value of the negative sequence current and the magnitude and angle of the negative sequence impedance of the power signal, at approximately mid-fault in time. An automatic calculation circuit is provided for calculating from the negative sequence values a fractional value m of the total line length representing the point on the line where the fault has occurred, and a system for calculating the distance to the fault from the fault location calculation terminal using the value m and the total distance between the two terminals.Type: GrantFiled: February 24, 1999Date of Patent: July 3, 2001Assignee: Schweitzer Engineering Laboratories, Inc.Inventors: Jeffrey B. Roberts, Gabriel Benmouyal, Demetrios Tziouvaras
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Patent number: 6252408Abstract: In an arrangement for monitoring the resistance between adjacent rail-ends of a section of railway track, the usual insulating end-post between the ends of adjacent rails is a molded component provided with an embedded conductive mesh or perforated plate situated roughly halfway between the rail-ends. The resistance between each rail-end and the conductive part is monitored to detect any significant decrease in resistance between either rail and the conductive part. When a sufficiently large resistance drop is detected, the normal track signaling circuits associated with the section of line involved are still able to function normally, since the insulation on the other side of the mesh is still unaffected at this stage. Railway personnel are now able to effect a repair to the affected part of the track at their (and the passengers') convenience before the whole end-post fails, disrupting normal service.Type: GrantFiled: April 22, 1999Date of Patent: June 26, 2001Assignee: Alstom UK LimitedInventor: Damian Mounsey Poole
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Patent number: 6242924Abstract: The size of an internal void in an electrically conductive lead is measured by determining its electrical resistance at a plurality of A.C. frequencies, ranging from D.C. to a frequency on the order of 50 to 100 GHz at which the majority of current flows along the skin of the lead. The test data is compared with reference data for an electrically conductive reference lead having characteristics which are essentially similar to the test lead. The difference between the two sets of data increases with the size of an internal void in the test lead. The difference will be greatest at D.C. because the current will flow through substantially the entire cross-section of the lead and the cross-sectional area will be reduced by the internal void. The test data will approach the reference data as the frequency increases because the majority of the current will flow through the skin of the test lead and will be less affected by the internal void.Type: GrantFiled: January 25, 1999Date of Patent: June 5, 2001Assignee: Advanced Micro DevicesInventors: Tsui Ting Yiu, Yow Juang W. Liu, Young-Chang Joo, Sunil N. Shabde
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Patent number: 6225810Abstract: A loop resistance tester (LRT) for shield integrity testing comprising three elements: a “drive” current coupler, a “sense” current coupler, joint probes, and an instrument assembly. A low-power excitation current is sent from the instrument into the drive coupler, which is essentially a transformer. This induces a current in the electrical cable under test, as long as that cable and the connected structure form a continuous current path, or loop. This induced loop current is detected by the “sense” current coupler (transformer) and is measured by the instrument. The ratio of the loop voltage to loop current, as phasor values, gives the complex loop impedance, the real part of which is the loop resistance.Type: GrantFiled: February 12, 1998Date of Patent: May 1, 2001Assignee: The Boeing CompanyInventors: Erik L. Godo, Bruce Van Deventer, Mervin E. Eaton, John F. Gonder
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Patent number: 6215313Abstract: A method and apparatus for diagnosing excessive resistance in an electrical harness of an internal combustion engine. Voltage is applied from a power source (24) through contacts (30a, 30b, 32a, 32b, 34a, 34b, 36a, 36b) and harness leads (26 and 28) to an electrical assembly (20). Electrical assembly (20) includes the load of a first electrical component (23), and by switching means (25) includes the electrical load of a second electrical component (21). An electronic control module (22 or 38) controls switching means (25) and compares the voltage drop across electrical assembly (20) when the second electrical component (21) is switched in or out. By comparing the voltage drops ECM (22 or 38) can determine if there is excessive resistance in the contacts (30a, 30b, 32a, 32b, 34a, 34b, 36a, 36b) or leads (26 and 28).Type: GrantFiled: September 7, 1999Date of Patent: April 10, 2001Assignee: Cummins Engine CompanyInventors: Edward J. Lewandowski, Dennis M. King
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Patent number: 6185280Abstract: A system and method for determining the impedance of a telephone transmission line are disclosed. A test signal is transmitted through a telephone switch to the telephone line and corresponding echo signals are monitored. The test and echo signals are correlated to derive an impulse response. A transfer function for the system is calculated from the impulse response. Then, a transfer function for the transmission line is derived using the system transfer function and the transfer function of the telephone switch. Finally, the transmission line impedance is calculated from the transmission line transfer function. Once the transmission line impedance is known, an impedance matching circuit for the telephone switch can be modified to match the transmission line and the switch.Type: GrantFiled: February 12, 1998Date of Patent: February 6, 2001Assignee: InterVoice Limited PartnershipInventors: Steve Jarboe, Zhihong Lin
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Patent number: 6181141Abstract: A controller, having a microprocessor, a control potentiometer and a monitor interface circuit connected between the microprocessor and the potentiometer, operates to monitor the control potentiometer and monitor interface circuit for failures. The potentiometer along with its wiring terminals and its wiper are monitored for faults. In addition the monitor interface circuit itself is tested so that either a fault in the potentiometer or a fault in the monitor interface circuit will be detected. The monitoring includes three tests performed from time to time. First, voltages across the full potentiometer are measured and compared to a voltage determined at initial installation or commissioning. The measured voltage is compared against limits to detect whether the measured voltage is inside or outside the limits. Second, the voltage across the wiper selected portion of the control potentiometer is measured and compared against a threshold to detect a fault.Type: GrantFiled: January 22, 1999Date of Patent: January 30, 2001Assignee: Honeywell Inc.Inventors: Robert Dean Juntunen, James I. Bartels
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Patent number: 6154036Abstract: A ground fault location system is used in a multi-phase ungrounded or high-impedance grounded power network. A signal generator is coupled to the network at a first location and generates for each network phase an individual non-DC voltage signal between such phase and ground. A ground fault detector is coupled to the network at a second location and has a summing device and an annunciator. The summing device is coupled to all of the phases of the network at such second location, sums any current passing therethrough, and produces a sum signal. The annunciator receives the sum signal and provides an indication when such signal is non-zero. Each phase of the network at the second location has a distribution current passing therethrough, the sum thereof normally being substantially zero and resulting in a substantially zero sum signal and the lack of an indication from the annunciator based on such distribution currents.Type: GrantFiled: March 18, 1999Date of Patent: November 28, 2000Assignee: ABB Power T&D Company Inc.Inventor: Thomas L. Baldwin
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Patent number: 6143355Abstract: An improved method of making a multiple print thick film circuit wherein the alignment between successive conductor print steps is both optically inspectable and electrically testable. The first of two or more successive conductor print layers includes a pair of adjacent alignment features with a non-conductive gap therebetween, and the successive conductor print layer includes a pair of identical alignment features which are printed directly on top of the alignment feature pair of the first print layer. When the successive print layer is properly aligned with the first print layer, the non-conductive gap between the alignment features of the first print layer will be preserved, and test probes brought into contact with the features or associated probe pads will reveal a high or open-circuit impedance therebetween.Type: GrantFiled: February 16, 1999Date of Patent: November 7, 2000Assignee: Delphi Technologies, Inc.Inventors: James Edward Walsh, John Karl Isenberg, Frans Peter Lautzenhiser
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Patent number: 6128169Abstract: An arc fault detector comprised as a stand alone unit and in combination with a ground fault circuit interrupter (GFCI) functions to provide protection from potentially dangerous arc fault conditions. When combined with a GFCI, the combination arc fault/ground fault circuit interrupter (AFCI/GFCI) provides protection from both arc fault and ground fault conditions. A single transformer is used to detect faults between neutral and ground and arc faults. An impedance splits the current flow into two portions so as to generate differential current proportional to the current flowing through the conductors. An early arcing detector periodically tests the AC line for high impedance between the device and a main breaker panel. The AFCI/GFCI device detects both AC line frequencies and high frequencies associated with arcing. Both average and instantaneous values of both AC line frequency and high frequency arcing signals are processed to generate an arc fault signal.Type: GrantFiled: December 19, 1997Date of Patent: October 3, 2000Assignee: Leviton Manufacturing Co., Inc.Inventors: Benjamin B. Neiger, Roger M. Bradley, James N. Pearse, William J. Rose
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Patent number: 6084946Abstract: A telephone wire pair is qualified for digital signal transmission by central office testing. The tip-to-ring capacitance of the wire pair is measured while applying an test signal in the 20-30 Hz range to the wire pair. The tip-to-ring capacitance is used to compute a first length, and the first length is compared to a pre-determined length. If the first length exceeds the pre-determined length, then the wire pair is qualified based upon another comparison of the measured capacitance to a pre-determined capacitance. On the other hand, the first length is less than the pre-determined length, the tip-to-ring capacitance is measured at a frequency of, preferably, 600 Hz. The test signal at this frequency minimizes errors due to resistive and inductive components of the primary constants of the wire pair and/or a ringing device connected to the wire pair.Type: GrantFiled: November 30, 1998Date of Patent: July 4, 2000Assignee: Bell Atlantic Network Services, Inc.Inventor: John Beierle
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Patent number: 6072249Abstract: A power source device in which, even in case of mistaken connection of a source power supplying cable, the supply of source power can be halted before destruction of an electronic equipment or of the power source device itself at the time of supplying the source power. A micro-computer 8 is started when fed with the source power from a power source circuit 1, and controls a constant current circuit 2 for not impressing a load voltage across a resistor R1. A camera device 30 is fed with a dc current for load resistance detection via a resistor R2 and a diode D1. A comparator 3 sends to a port P1 of the micro-computer 8 a level signal specifying whether or not the resistance RL is higher than a pre-set value. The micro-computer 8 controls the constant current circuit 2 for supplying the source power to the camera device 30 if the level signal supplied to the port 1 is `1`, that is if the load resistance RL is higher than a pre-set value.Type: GrantFiled: August 14, 1997Date of Patent: June 6, 2000Assignee: Sony CorporationInventor: Katsumi Osawa
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Patent number: 6034601Abstract: A method and apparatus detect devices on a line in an alarm system that have been assigned a common or duplicate address, or that are located beyond the maximum allowable wiring distance on the line, or that are poorly connected to the line thus providing weak answers to communications from the control panel. The method and apparatus operate by polling suspect addresses of devices on the line while adjusting the sensitivity of the receiver. The sensitivity of the receiver is lowered by an amount corresponding to the test being performed. In duplicate address testing, the sensitivity of the receiver is lowered by an amount such that a single response from only one device having the polled address will not be sensed, but combined responses from more than one device having the same address are sensed.Type: GrantFiled: February 24, 1998Date of Patent: March 7, 2000Assignee: Simplex Time Recorder CompanyInventors: Mark P. Barrieau, Paul H. Maier, Jr., Mike A. Faulkner
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Patent number: 5998958Abstract: The resistance values of a stator and a rotor of an induction motor are estimated through the steps of (a) checking whether a control system of the induction motor reaches a normal state, (b) measuring normal state values of the values necessary for estimating resistance values of a stator and a rotor when the control system reaches a normal state, (c) estimating a stator resistance value based on the measured normal state values, (d) applying an AC component to a magnetic flux command input to the control system and calculating a first variable for estimating rotor resistance, (e) obtaining an AC component with respect to each variable by allowing the calculated first variable to pass through a band pass filter, (f) calculating a second variable for estimating rotor resistance based on the AC component with respect to the respective variables obtained above, and (g) estimating rotor resistance using the calculated second variable.Type: GrantFiled: January 14, 1999Date of Patent: December 7, 1999Assignee: Samsung Electronics Co., Ltd.Inventor: Sang-hoon Lee
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Patent number: 5999002Abstract: A contact resistance check circuit and method for verifying that a sufficient electrical connection is established between a source and a sense lead of a Kelvin connection. The circuit includes a microprocessor for driving a transformer that is connected to the source/sense probe (i.e., contact resistance) with an input pulse. The input pulse is altered in relation to the magnitude of the contact resistance to produce a check pulse. A comparator is used to compare the check pulse with a threshold voltage and for generating a fault indication signal. A flip flop then stores the fault indication signal so that the fault indication signal may be monitored by the microprocessor.Type: GrantFiled: October 10, 1997Date of Patent: December 7, 1999Assignee: Keithley Instruments, Inc.Inventors: Glenn Fasnacht, Wayne Goeke
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Patent number: 5978449Abstract: A telephone wire pair is qualified for digital signal transmission by central office testing. The tip-to-ring capacitance of the wire pair is measured while applying to the wire pair an AC test signal at 600 Hz. The test signal at this frequency minimizes errors due to line inductance and/or a ringing device connected to the wire pair. Reliable measurement of the length of the wire pair is achieved. Flaws in cable sheathing can also be detected based on measurement of tip-to-ground capacitance and/or ring-to-ground capacitance.Type: GrantFiled: December 21, 1998Date of Patent: November 2, 1999Assignee: Nynex Science & Technologies, Inc.Inventor: Jack Needle
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Patent number: 5969532Abstract: A method of inspecting a crack in a ceramic substrate that is not exposed on the surface. The method can detect all cracks and make objective judgement possible by expressing the inspection result as numerical data. Conductors are disposed on both faces of a ceramic substrate, wherein one of the conductors is a conductive liquid; the insulation resistance value or an electric property dependent on the insulation resistance is measured with the conductive liquid or other conductors electrically connected to the conductive liquid which are used as electrodes.Type: GrantFiled: April 30, 1997Date of Patent: October 19, 1999Assignees: Seiko Epson Corporation, NGK Insulators, Ltd.Inventors: Minoru Usui, Takahiro Katakura, Takaichi Wada, Motonori Okumura, Nobuo Takahashi, Natsumi Shimogawa, Keizo Miyata
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Patent number: 5937033Abstract: In a telephone system wherein a number of distant terminals are each connected to a remote terminal and in which a number of remote terminals are each connected to a central office, a distant terminal includes a drop testing circuit for making sequential measurements on a plurality of customer telephones. The drop test circuit is included in a measurement system for providing condition responsive signals describing parameters of the telephone system, The drop test circuit includes circuitry such as scaling resistors, voltage sources, switching elements, and a multiplexed analog to digital voltage-sensing converter for providing digital data for transmission to the remote terminal or other more central location. The remote terminal comprises a computer based analyzer for interpreting, processing, and storing the data transmitted to it.Type: GrantFiled: May 20, 1997Date of Patent: August 10, 1999Assignee: GTE Laboratories IncorporatedInventor: Alfred H. Bellows
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Patent number: 5883517Abstract: The invention relates to an apparatus for locating faults on subsea telecommunications links by determining the resistance of a conductor of the cable having a fault not being insulated from the sea. The apparatus is provided with two terminals, one for connection to one of the conductors of the subsea link and the other for being connected to the sea or to ground, through which terminals it is capable of delivering or receiving electrical power. The apparatus, on its own or together with another apparatus of the invention, is capable of automatically performing current and voltage measurements and it is capable of processing them automatically while making use of data from one or more databases concerning notably the resistance per unit length of the cable in order to locate the fault.Type: GrantFiled: June 5, 1997Date of Patent: March 16, 1999Assignee: ExcemInventors: Frederic Broyde, Evelyne Clavelier
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Patent number: 5872512Abstract: An apparatus and method for reducing errors in a battery powered sensing circuit uses two pull-up resistors. The first resistor has a value selected to minimize battery drain and the second resistor has a value selected to reduce dendrite or other parasitic parallel resistance. The resistors are selectively connected to the circuit based on a predetermined sequence and/or time interval.Type: GrantFiled: February 9, 1996Date of Patent: February 16, 1999Assignee: Interactive Technologies, Inc.Inventors: Gerald M. Kackman, Robert E. Brunius
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Patent number: 5864602Abstract: A telephone wire pair is qualified for digital signal transmission by central office testing. The tip-to-ring capacitance of the wire pair is measured while applying to the wire pair an AC test signal at 600 Hz. The test signal at this frequency minimizes errors due to line inductance and/or a ringing device connected to the wire pair. Reliable measurement of the length of the wire pair is achieved. Flaws in cable sheathing can also be detected based on measurement of tip-to-ground capacitance and/or ring-to-ground capacitance.Type: GrantFiled: April 28, 1997Date of Patent: January 26, 1999Assignee: Nynex Science & Technologies, Inc.Inventor: Jack Needle
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Patent number: 5839093Abstract: Both fault location and fault resistance of a fault are calculated by the present method and system. The method and system takes into account the effects of fault resistance and load flow, thereby calculating fault resistance by taking into consideration the current flowing through the distribution network as well as the effect of fault impedance. A direct method calculates fault location and fault resistance directly while an iterative fashion method utilizes simpler calculations in an iterative fashion which first assumes that the phase angle of the current distribution factor D.sub.s is zero, calculates an estimate of fault location utilizing this assumption, and then iteratively calculates a new value of the phase angle .beta..sub.s of the current distribution factor D.sub.s and fault location m until a sufficiently accurate determination of fault location is ascertained. Fault resistance is then calculated based upon the calculated fault location.Type: GrantFiled: December 31, 1996Date of Patent: November 17, 1998Assignee: ABB Transmit OyInventors: Damir Novosel, David Hart, Yi Hu, Jorma Myllymaki
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Patent number: 5824883Abstract: The present invention relates to a system for sensing leakage which comes from a battery and flows in a battery pack. The system comprises a electrical leakage sensor for sensing whether a battery is leaking and outputting the sensed result; a leakage display for displaying in response to the leakage sensor; a leakage communicator for receiving the sensed result from the leakage liquid sensor and transmitting it to a portable electronic equipment. The leakage sensor either utilizes a conductive glass mat or a pair of complementary interdigitated electrodes disposed on the surface of such sensor. The system senses a leakage occurring from a battery and collecting at the bottom of a battery pack and displays the sensed result together with transmitting the sensed result to a portable electronic equipment.Type: GrantFiled: May 22, 1997Date of Patent: October 20, 1998Assignee: Samsung Display Devices Co., Ltd.Inventors: Byung-Gyu Park, Kyung-Joon Park
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Patent number: 5825189Abstract: A method of locating the position of a fault on a power transmission line between first and second ends of the line is performed by calculating the complex fault impedance at each of a plurality of assumed fault positions along the length of the line, the fault impedance at each assumed position being calculated utilizing the measurement before and after fault occurrence of the voltage and current at the first end of the line, parameters of the line, and the impedance at the second end of the line; and selecting as the actual fault position the assumed fault position of the plurality of assumed fault positions for which the argument of the complex fault impedance most closely equals zero. The method may be used with single or multi-phase power transmission lines. There is also disclosed a method of determining the form of impedance network at a fault on a multi-phase power transmission line.Type: GrantFiled: August 13, 1996Date of Patent: October 20, 1998Assignee: GEC Alsthom LimitedInventor: Allan Thomas Johns
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Patent number: 5796258Abstract: A quadrilateral characteristic relay system for determining a fault associated with a multiple-phase electric power transmission system is disclosed. The system dynamically adapts one line of the quadrilateral trip region to account for the interaction of load current and fault resistance. As a result of the adaptation, the system exhibits better overreach and underreach performance characteristics. The system employs impedance and voltage plane quadrilateral characteristics using negative sequence current as a proxy for fault current. In the voltage plane, the fault determination is made through a series of comparisons, avoiding computationally inefficient mathematical divisions.Type: GrantFiled: January 30, 1997Date of Patent: August 18, 1998Assignee: ABB Power T&D Company, Inc.Inventor: Lifeng Yang
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Patent number: 5797114Abstract: A method and apparatus for resistivity mapping of semiconductor materials by causing currents to flow in a semiconductor body and measuring resultant potentials created between pairs of surface probes. A resistivity map is produced using the information gathered.Type: GrantFiled: January 26, 1996Date of Patent: August 18, 1998Assignees: The University of Sheffield, Bio-Rad Microscience LimitedInventors: John Roberts, Ian Leslie Freeston, Richard Charles Tozer, Anthony Charles Gorvin, Ian Christopher Mayes, Francois Jean Djamdjl, Stephen Richard Blight
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Patent number: 5787260Abstract: A delay gate is provided within a control unit to delay the reset signal by a predetermined period of time to monitor the time at which the reset signal passes through the busline. If the busline length exceeds a prescribed length, then an LED is turned on. Or a resistance proportional to the length of a duplex bus signal line is connected to each connecting portion, a reference resistance is provided internally of the control unit and one of the duplex signal buslines of the connecting portion is grounded while the other is connected through the reference resistance to a reference power supply to compare the potential difference between the reference resistance and the connecting point of the duplex signal busline with a reference signal so that, when the busline length exceeds a prescribed value, the LED is turned on.Type: GrantFiled: September 22, 1997Date of Patent: July 28, 1998Assignee: NEC CorporationInventor: Toshio Misaka
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Patent number: 5773980Abstract: A one-terminal process for locating a fault associated with a multi-phase electric power transmission system is disclosed. The process is based on the principle that the impedance in a fault can be determined by correcting errors due to the interaction of fault resistance and load current. The fault may be a phase-to-ground fault or a multiple-phase fault.Type: GrantFiled: January 30, 1997Date of Patent: June 30, 1998Assignee: ABB Power T&D Company, Inc.Inventor: Lifeng Yang
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Patent number: 5701645Abstract: A method for making an acoustic wave device. The method has steps of providing a substrate suitable for acoustic wave devices and processing the substrate to provide a patterned metallization thereon. The patterned metallization includes an acoustic wave filter pattern. The method also has steps of measuring a sheet resistance associated with the acoustic wave filter pattern, determining a resistance of a test pattern associated with the acoustic wave filter pattern to provide a measured resistance and computing an estimated average linewidth for the acoustic wave filter pattern from the measured resistance and the sheet resistance.Type: GrantFiled: June 2, 1995Date of Patent: December 30, 1997Assignee: Motorola, Inc.Inventors: Donald Eugene Allen, Steven Ray Stringer, Richard Dale Coyne, deceased
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Patent number: 5684408Abstract: A protective grounding jumper cable tester basically includes a housing, a direct current power supply, a pair of jumper attachment terminals, a pair of test probe terminals, a current applying circuit connected between the direct current power supply and the pair of jumper attachment terminals for applying a direct current through a jumper cable attached between the jumper attachment terminals, and a resistance sensing circuit connected to the test probe terminals for sensing resistance to the flow of the direct current through the jumper cable by using a pair of test probes connected to the test probe terminals.Type: GrantFiled: December 18, 1996Date of Patent: November 4, 1997Assignee: Hubbell IncorporatedInventor: Clayton C. King