With Comparison Or Difference Circuit Patents (Class 324/679)
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Patent number: 7109727Abstract: In a capacitive physical quantity sensor, a C-V converter converts a variation in a capacitance between a movable electrode and a fixed electrode into a voltage to output the converted voltage in a first operating mode. The C-V converter also outputs a constant voltage in a second operating mode. An amplifier amplifies the converted voltage to output a first voltage, and amplifies the constant voltage to output a second voltage. A first sample and hold circuit operates in the first operating mode to sample and hold the first voltage. A second sample and hold circuit operates in the second operating mode to sample and hold the second voltage. A first differential amplifier obtains a difference voltage between the first voltage held by the first sample and hold circuit and the second voltage held by the second sample and hold circuit.Type: GrantFiled: September 16, 2005Date of Patent: September 19, 2006Assignee: Denso CorporationInventors: Junji Hayakawa, Norio Kitao, Akinobu Umemura, Hirokazu Ito, Takaaki Kawai
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Patent number: 7102366Abstract: A proximity detection circuit. An oscillator circuit is adapted to provide charge to an antenna. An operational amplifier, operated as a unity gain follower, receives an antenna signal which is representative of an external capacitive load on the antenna. A detector circuit receives the antenna signal via the operational amplifier and outputs a detection signal in response to changes in the antenna signal. A comparator receives the detection signal and is adapted to generate an output signal in response thereto.Type: GrantFiled: February 20, 2004Date of Patent: September 5, 2006Assignee: Georgia-Pacific CorporationInventors: Dennis Joseph Denen, Gary Edwin Myers, Charles W. Groezinger, John J. Knittle
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Patent number: 7102358Abstract: A transistor may have degraded characteristics because of an overvoltage condition. The degraded characteristics may be sensed to determine that the transistor has previously been subjected to an overvoltage condition.Type: GrantFiled: June 29, 2004Date of Patent: September 5, 2006Assignee: Intel CorporationInventors: Ali Keshavarzi, Fabrice Paillet, Muhammad M Khellah, Dinesh Somasekhar, Yibin Ye, Stephen H Tang, Mohsen Alavi, Vivek K De
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Patent number: 7084645Abstract: A capacitance detecting circuit includes a code generator for generating code having orthogonality in chronological order. A column-line driver drives the plurality of column lines based on the code by dividing the column lines into a first column line group and a second column line group. A capacitance detector, which is connected to the row line, converts the total of currents generated in capacitances at the intersections with the driven column lines into a voltage signal and outputs the converted voltage signal. A decoding computation unit determines the voltages corresponding to the capacitances at the intersections for each of the column line groups by performing product sum computation between the measured voltages and the code. The column-line driver drives the first column line group and the second column line group by complementary voltages according to the code or information indicating the inversion of the code.Type: GrantFiled: November 10, 2004Date of Patent: August 1, 2006Assignee: Alps Electric Co., Ltd.Inventors: Yuichi Umeda, Junichi Saito
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Patent number: 7078918Abstract: In a capacitance detecting circuit, changes in capacitances at intersections between a plurality of row lines and a column line are detected as voltages. The capacitance detecting circuit includes a column-line driver for driving the column line. A code generator generates code having orthogonality in chronological order. A selection synthesizer selects a certain number of row lines from the plurality of row lines by using the code and synthesizes measured voltages at the intersections between the selected row lines and the driven column line so as to output the synthesized measured voltage. A decoding computation unit separates the measured voltages corresponding to the capacitances at the intersections by performing product sum computation between the synthesized measured voltage and the code.Type: GrantFiled: November 10, 2004Date of Patent: July 18, 2006Assignee: ALPS Electric Co., Ltd.Inventors: Yuichi Umeda, Junichi Saito
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Patent number: 7071711Abstract: A method and device for determining the ratio between the actual value of an RC time constant of an RC network embodied in an integrated circuit and a set value of the RC time constant includes first and second reference RC networks each having a resistor and a capacitor. The two RC networks may be oppositely connected in a circuit arrangement between first and second supply potentials, where the product of the resistance and capacitance values of the two RC networks may be equal. A normalized RC time constant may be defined for the two reference RC networks. Successive charge and discharge cycles are implemented during a predetermined evaluation period, the two capacitors being charged in a cycle during a charge time until the potential at a first node of the first reference RC network approximately corresponds to the potential at a second node of the second reference RC network. The two capacitors may be subsequently discharged for a discharge time.Type: GrantFiled: July 2, 2004Date of Patent: July 4, 2006Assignee: Micronas GmbHInventors: Achim Bauer, Martin Trojer, Ulrich Gaier
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Patent number: 7046018Abstract: A position sensor is provided comprising a coil (1) and an electric conductor (2) or magnetic (3) both arranged so that the size of their overlapping area (p) is varied as the position of an object to be examined changes, a resistor (6), a capacitor (4), a comparator (5) of an inverse output type, and a timing circuit (50a) arranged for uniformly restraining the period (T) of a continuous oscillating motion, herein a displacement of the object to be examined is detected as a change in the time duration (t) which extends from the leading end of the period (T) to a time when the output of the comparator (5) is turned to a high level as timed with substantially the trailing end of the period (T). The resistance of the resistor (6) is determined so that a change in the time duration (t) remains minimum when the resistance of the resistor (6) is varied and when the temperature is at a predetermined degree.Type: GrantFiled: April 16, 2003Date of Patent: May 16, 2006Assignee: Levex CorporationInventors: Seiji Toda, Naomasa Oshie
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Patent number: 7023222Abstract: The present invention provides a capacitive sensing technique that is advantageously useful for security applications wherein digital technology is used to measure frequency shifts caused by a conductive or grounded object moving within a capacitive sensing field. The system includes a floating reference to compensate for drifting or offsets caused by electrical noise or other environmental conditions. The system also includes a CPLD integrated circuit or microprocessor and operative to monitor changes in a sensing field signal and digitally compare a reference signal to the sensing field signal such that when a difference between the two signals exceeds a predetermined threshold, an object detection signal is generated by the monitor circuit which causes the activation of an alarm signal.Type: GrantFiled: September 5, 2003Date of Patent: April 4, 2006Assignee: Invisa, Inc.Inventor: Robert T. Fergusson
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Patent number: 6940294Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. The threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.Type: GrantFiled: June 16, 2004Date of Patent: September 6, 2005Assignee: Dialog Semiconductor GmbHInventor: Matthias Eberlein
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Patent number: 6940292Abstract: The circuit configuration includes a measuring capacitor having a variable capacitance, which is set by means of a physical measured quantity to be detected, a reference capacitor and a buffer amplifier. An input of the buffer amplifier is at least temporarily coupled to the measuring capacitor such that an output of the buffer amplifier supplies a signal voltage essentially proportional to a measurement voltage occurring on the measuring capacitor. At the beginning of each measuring cycle, the measuring capacitor is discharged to a predetermined residual charge, whereas the reference capacitor is charged to a predetermined reference charge. Afterwards, the reference charge is transferred as completely as possible from the reference capacitor to the measuring capacitor. To this end, the input and output of the buffer amplifier are temporarily coupled to one another via the first reference capacitor during operation.Type: GrantFiled: July 18, 2002Date of Patent: September 6, 2005Assignee: Endress + Hauser GmbH + Co. KGInventor: Robert Lalla
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Patent number: 6914438Abstract: A position sensor is provided comprising a coil (1) and an electric conductor (2) or magnetic (3) both arranged so that the size of their overlapping area (p) is varied as the position of an object to be examined changes, a resistor (6), a capacitor (4), a comparator (5) of an inverse output type, and a timing circuit (50a) arranged for uniformly restraining the period (T) of a continuous oscillating motion, herein a displacement of the object to be examined is detected as a change in the time duration (t) which extends from the leading end of the period (T) to a time when the output of the comparator (5) is turned to a high level as timed with substantially the trailing end of the period (T). The resistance of the resistor (6) is determined so that a change in the time duration (t) remains minimum when the resistance of the resistor (6) is varied and when the temperature is at a predetermined degree.Type: GrantFiled: April 16, 2003Date of Patent: July 5, 2005Assignee: Levex CorporationInventors: Seiji Toda, Naomasa Oshie
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Patent number: 6879056Abstract: A way of converting sensed signals to a desirable form of electrical signals is provided that includes providing an input signal to a common input terminal of a sensing block. The way comprises receiving a sensed signal from the sensing block in response to applying the input signal.Type: GrantFiled: December 29, 2000Date of Patent: April 12, 2005Assignee: Intel CorporationInventors: Christopher J. Kemp, Christoph P. Menzel
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Patent number: 6856143Abstract: A method for measuring a capacitance of a device under test is provided that includes selectively charging and discharging a first conductor with a first set of p and n element-pairs in response to a voltage potential applied to the first set of p and n element-pairs. The method further includes selectively charging and discharging a second conductor with a second set of p and n element-pairs in response to a voltage potential applied to the second set of p and n element-pairs. Currents are measured at drains associated with the first set of p element-pairs as the first and second conductors charge and discharge such that a capacitance associated with the first conductor may be determined that is based on the drain currents.Type: GrantFiled: June 14, 2002Date of Patent: February 15, 2005Assignee: Texas Instruments IncorporatedInventors: Michael J. McNutt, Robin C. Sarma, Yu-Sang Lin
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Publication number: 20040232921Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.Type: ApplicationFiled: June 16, 2004Publication date: November 25, 2004Applicant: DIALOG SEMICONDUCTOR GMBHInventor: Matthias Eberlein
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Publication number: 20040232922Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method. Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.Type: ApplicationFiled: June 16, 2004Publication date: November 25, 2004Applicant: DIALOG SEMICONDUCTOR GMBHInventor: Matthias Eberlein
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Publication number: 20040227528Abstract: A method for tracking the MOS oxide thickness by the native threshold voltage of a “native” MOS transistor without channel implantation for the purpose of compensating MOS capacitance variations is achieved. The invention makes use of the fact that in MOS devices the threshold voltage is proportionally correlated to the oxide thickness of said MOS device. Said threshold voltage can therefore be used to build a reference voltage Vx+Vth which accurately tracks the MOS capacitance variations in integrated circuits. Circuits are achieved to create a frequency reference and a capacitance reference using said method Additionally a method is introduced to create a capacitance reference in integrated circuits using said MOSFET capacitors.Type: ApplicationFiled: June 16, 2004Publication date: November 18, 2004Applicant: DIALOG SEMICONDUCTOR GMBHInventor: Matthias Eberlein
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Patent number: 6809527Abstract: First and second predetermined charging voltages are applied between the movable and fixed electrodes of a capacitive type of sensor to measure first and second capacitances between the movable and fixed electrodes, respectively. The first and second electrostatic capacitances are compared to obtain a characteristic of the sensor from a result of comparison. In measuring the first and second capacitances, first and second charging voltages are generated of which magnitudes are determined in accordance with the first and second capacitances, respectively. Equalization is made between the first output voltage when the first charging voltage is applied between the movable and fixed electrodes in a predetermined normal condition of the movable electrode and the second output voltage outputted when the second charging voltage is applied between the movable and fixed electrodes in the predetermined normal condition.Type: GrantFiled: July 8, 2002Date of Patent: October 26, 2004Assignee: Denso CorporationInventors: Seiichiro Ishio, Yasutoshi Suzuki, Hajime Ito, Yasuaki Makino, Norikazu Ohta, Keiichi Shimaoka, Hirofumi Funahashi
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Publication number: 20040207412Abstract: A CBCM circuit is capable of separately measuring each component of a measuring target capacitance. A node (N1) is electrically connected to a terminal (P2) between the drains of PMOS and NMOS transistors (MP2, MN2). As a target capacitance forming part, a coupling capacitance (Cc) is formed between the node (N1) and a node (N2). The node (N2) is connected to a pad (58) through the terminal (P2) and an NMOS transistor (MN3), and a node (N3) is connected to a terminal (P3) between the drains of PMOS and NMOS transistors (MP1, MN1). A reference capacitance (Cref) is formed at the node (N3) as a dummy capacitance. Currents (Ir, It) supplied from a power source to the nodes (N3, N1) are measured with current meters (61, 62), respectively and a current (Im) induced from the node (N2) and flowing to a ground level is measured with a current meter (63).Type: ApplicationFiled: January 21, 2004Publication date: October 21, 2004Applicants: Renesas Technology Corp., MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Tatsuya Kunikiyo, Tetsuya Watanabe, Toshiki Kanamoto, Kyoji Yamashita
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Publication number: 20040160234Abstract: Apparatus for dispensing paper from rolls which feeds continuously, roll to roll, and does not require extra procedure to bring stub roll into position. The apparatus has means for holding and positioning at least first and second rolls of paper with respect to each other; means for dispensing paper from the first roll; means for dispensing paper from the first and second rolls simultaneously when the first roll reduces to a predetermined diameter of paper, means for positioning the depleted first roll for replacement without the necessity of removing the second roll; and means for dispensing from the second and replacement rolls simultaneously when the second roll reduces to a predetermined diameter of paper. The apparatus also has a proximity sensor, which senses when a hand is placed near the dispenser, and thereupon dispenses a set amount of towel. The proximity sensor incorporates “static” and noise immunity circuitry.Type: ApplicationFiled: February 20, 2004Publication date: August 19, 2004Applicant: GEORGIA-PACIFIC CORPORATIONInventors: Dennis Joseph Denen, Gary Edwin Myers, Charles W. Groezinger, John J, Knittle
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Publication number: 20040145375Abstract: An input-output circuit sending and/or receiving a signal to and/or from an electronic device includes a driver for supplying a signal to the electronic device, a comparator provided parallel to the driver for receiving a signal from the electronic device, a relaying circuit provided between the comparator the electronic device in series with the comparator and the electronic device, a first transmission line for coupling the comparator and the relaying circuit electrically and a first switch for selecting either of short or open-circuited state of the first transmission line and the electronic device, wherein the impedance of the relaying circuit is larger than the impedance of the first transmission line.Type: ApplicationFiled: January 14, 2004Publication date: July 29, 2004Inventor: Takashi Sekino
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Publication number: 20040145380Abstract: A passive matching network is connected to an input/output line for an automatic test equipment drive channel to compensate for capacitances associated with a receiver circuit connected to the line, and also an optional current-mode driver circuit. The matching circuit preferably comprises a T-coil circuit that can include a bridging capacitor; separate T-coil circuits can be provided to separately compensate for receiver circuit and current-mode driver circuit capacitances. The driver and receiver circuits can be implemented on a common layer of an integrated circuit, with the T-coil windings implemented in a separate layer of the same integrated circuit that is spaced from the common layer by at least one dielectric layer.Type: ApplicationFiled: November 25, 2003Publication date: July 29, 2004Applicant: ANALOG DEVICES, INC.Inventors: Douglas W. Babcock, Robert A. Duris, Bruce Hecht
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Patent number: 6768319Abstract: Error in a process variable measurement due to leakage conductance in an industrial process control transmitter is compensated by identifying capacitance deviations &dgr;CH and &dgr;CL based on leakage conductance for each of the capacitive sensors.Type: GrantFiled: July 10, 2002Date of Patent: July 27, 2004Assignee: Rosemount Inc.Inventor: Rongtai Wang
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Publication number: 20040124857Abstract: The invention concerns a measurement device comprising at least a measuring probe (10), means (30) for sequentially applying a controlled supply voltage between the measuring probe (10) and a reference element (20) and means (50) for integrating the electric loads accumulated on the measuring probe (10). The invention is characterised in that it further comprises means (60) for correcting the integrating stage (50) input offset.Type: ApplicationFiled: January 9, 2004Publication date: July 1, 2004Inventors: Pascal Jordana, Claude Launay, Daniel Le Reste, William Pancirolii, Joaquim Da Silva, Philippe Parbaud
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Patent number: 6756792Abstract: The novel apparatus permits precise measurements of parasitic capacitances. The apparatus has a test structure and a reference structure, each with two conductor tracks. In the reference structure, the two conductor tracks are always at the same potential. In the test structure, one conductor track is coupled to ground potential and the other conductor track to a different potential. The test structure and the reference structure are connected to a voltage potential and the charge which builds up on the test structure and the reference structure is registered. The parasitic capacitance can be calculated precisely from the charge difference. The conductors of the test structure and of the reference structure are arranged in such a way that each conductor perceives a relationship to capacitive parasitic effects in the same environment.Type: GrantFiled: September 3, 2002Date of Patent: June 29, 2004Assignee: Infineon Technologies AGInventor: Hans-Ulrich Armbruster
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Patent number: 6683462Abstract: For measuring a capacitance with high accuracy, a capacitance measuring apparatus includes a voltage source with a current limiting function for applying different voltage values to the capacitance, and an integrator capable of continuous integrating operation for repeatedly integrating a current flowing through the capacitance at given periodic intervals. There is also disclosed a capacitance measuring method that is carried out by the capacitance measuring apparatus.Type: GrantFiled: November 2, 2001Date of Patent: January 27, 2004Assignee: Agilent Technologies, Inc.Inventor: Akira Shimizu
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Patent number: 6639414Abstract: Disclosed is a single-stage, switched capacitor circuit for measuring changes in a variable by measuring changes in a capacitor gap. The change in the capacitor gap corresponds directly to a change in a measurable variable, such as pressure and acceleration, and thus a change in voltage. The circuit includes at least one reference capacitor, a sensor capacitor, a plurality of switches responsive to a timing device, and a device for generating substantially constant reference voltages. The sensor circuit does not result in a DC offset value, but results in the AC component of the voltage being directly proportional to the change in the variable through a substantially constant voltage is supplied to a node near the sensor capacitance. The circuit may be trimmed using a digital to analog converter and/or capacitors coupled in parallel.Type: GrantFiled: December 19, 2001Date of Patent: October 28, 2003Assignee: Institute of MicroelectronicsInventor: Wee Liang Lien
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Patent number: 6633156Abstract: A device for monitoring the flow of a current in a load powered by a DC voltage source and a method for the implementation of the device. The device includes, series-connected with the load, a first device to detect the presence of an alternating current and a second device to interrupt the current flowing in the first device while keeping the current substantially direct in the load. Advantageously, the second device includes at least one first electronic switch series-connected with the load and with the first device, the first electronic switch being controlled so as to set up the alternating current in the first device. A method of implementing the device cyclically opens and closes the electronic switch while making the second device operable or inoperable, also cyclically, to keep the current substantially direct in the load and let the current flowing in the load pass through the second device only periodically.Type: GrantFiled: September 19, 2001Date of Patent: October 14, 2003Assignee: Thales Avionics S.A.Inventor: Joël Choisnet
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Patent number: 6630751Abstract: Embodiments of the present invention are directed to an uninterruptible power supply for providing AC power to a load having a capacitive element.Type: GrantFiled: March 19, 2001Date of Patent: October 7, 2003Assignee: American Power ConversionInventors: Jeffrey Curtis, David E. Reilly, Kevin White, Namwook Paik
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Publication number: 20030179003Abstract: A position sensor is provided comprising a coil (1) and an electric conductor (2) or magnetic (3) both arranged so that the size of their overlapping area (p) is varied as the position of an object to be examined changes, a resistor (6), a capacitor (4), a comparator (5) of an inverse output type, and a timing circuit (50a) arranged for uniformly restraining the period (T) of a continuous oscillating motion, herein a displacement of the object to be examined is detected as a change in the time duration (t) which extends from the leading end of the period (T) to a time when the output of the comparator (5) is turned to a high level as timed with substantially the trailing end of the period (T). The resistance of the resistor (6) is determined so that a change in the time duration (t) remains minimum when the resistance of the resistor (6) is varied and when the temperature is at a predetermined degree.Type: ApplicationFiled: April 16, 2003Publication date: September 25, 2003Applicant: Levex CorporationInventors: Seiji Toda, Naomasa Oshie
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Patent number: 6600333Abstract: A test circuit includes a wafer, an insulative layer formed on the wafer, and a plurality of test structures formed in the insulative layer. Each of the test structures comprises a first comb having a first plurality of fingers and a second comb having a second plurality of fingers. The first and second pluralities of fingers are interleaved to define a finger spacing between the first and second pluralities of fingers. The finger spacing in a first one of the test structures being different than the finger spacing in a second one of the test structures. A method for characterizing damage in a semiconductor device includes providing a wafer having an insulative layer and a plurality of test structures formed in the insulative layer. The test structures have different geometries. An electrical characteristic of first and second test structures of the plurality of test structures is determined. The electrical characteristics of the first and second test structures is compared.Type: GrantFiled: February 10, 2000Date of Patent: July 29, 2003Assignee: Advanced Micro Devices, Inc.Inventors: Jeremy I. Martin, Nicholas J. Kepler, Larry L. Zhao
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Patent number: 6504384Abstract: The present invention prevents from occurring a measurement error of electrical capacitance based on variance of a voltage applied to capacitors. An apparatus of measuring capacitance has a power supply for applying a voltage to capacitors, a voltmeter of measuring the voltage applied to the capacitors W, and an amperemeter of measuring a current flowing through the capacitors. A capacitance measuring part is connected to the voltmeter and the amperemeter, and measures electrical capacitance and electrical positive electrode of the capacitors based on the voltage and the current applied to the capacitor. A determining part determines whether or not the voltage deflects from the voltage between upper-limit and lower-limit values. When the determining part determines that the voltage changes, the warning part performs warning.Type: GrantFiled: August 8, 2000Date of Patent: January 7, 2003Assignee: Tokyo Weld Co., Ltd.Inventors: Masamichi Tsuchiya, Takamasa Nagasawa
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Patent number: 6501283Abstract: A circuit configuration for measuring the capacitance of structures in an integrated circuit having a test structure and a reference structure, includes first and second series circuits, each having two transistors connected in series and connected in parallel between supply terminals each providing one supply potential. The test structure is connected to a coupling node of the transistors of the first series circuit. The reference structure is connected to a coupling node of the transistors of the second series circuit. The supply terminals of the series circuits are connected to a controllable voltage source. A voltage-dependent differential capacitance measurement can be carried out on the test structure by using the circuit configuration.Type: GrantFiled: January 16, 2001Date of Patent: December 31, 2002Assignee: Infineon Technologies AGInventors: Jürgen Lindolf, Stefanie Schatt
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Patent number: 6501282Abstract: A capacitance comparison circuit determines the relative value of two capacitors, such as may be sensor elements, by monitoring voltage changes caused by charge redistribution between the capacitors when they are series connected and then connected alternately in a first and second polarity across a voltage. The direction of change of voltage at the junction of the capacitors with respect to the switching of polarity of their connection precisely reveals which capacitor is larger. Disconnecting the voltage monitor during the switching reduces switching induced errors.Type: GrantFiled: September 29, 2000Date of Patent: December 31, 2002Assignee: Rockwell Automation Technologies, Inc.Inventors: Ernst H Dummermuth, Patrick C Herbert, Steven M. Galecki
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Patent number: 6486683Abstract: A position sensor comprises a capacitive transducer and an inductor connected in series with the transducer. The transducer is a differential capacitor whose total admittance is essentially independent of changes in the sensed position. The total capacitance and inductance resonate at the fundamental frequency of a generator that provides a drive voltage and the resulting voltage across the sensor is thus substantially greater than the drive voltage. This increases the current through the transducer, and consequently increases the sensitivity of the sensor.Type: GrantFiled: December 30, 1999Date of Patent: November 26, 2002Assignee: GSI Lumonics, Inc.Inventor: Michael B. Nussbaum
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Patent number: 6483322Abstract: The clock signal for the sample and hold circuit for sampling the C-V conversion circuit output generated by the control signal generation circuit is different in period from the clock signal for switched capacitor filter circuit for filtering the sample and hold circuit output such that the clock signal for the switched capacitor filter circuit is unchanged in period between the measuring and self-diagnostic modes.Type: GrantFiled: July 11, 2001Date of Patent: November 19, 2002Assignee: Denso CorporationInventors: Seiki Aoyama, Shigenori Yamauchi
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Patent number: 6448792Abstract: The edge portion of an electro-conductive material inserted between a pair of the transmitting electrodes of triangular plate disposed flatly in opposite directions each other and the receiving electrode. The exciting signal source applies respectively the alternating voltage signal S1 with frequency f1 on one of the transmitting electrodes and the alternating voltage signal S2 with frequency f2 on the other transmitting electrode. The insertion extent of the strip edge of the electro-conductive material is evaluated with the ratio between the current I1 with frequency f1 and the current I2 with frequency f2 generated on the receiving electrode.Type: GrantFiled: May 30, 2000Date of Patent: September 10, 2002Assignee: Nireco CorporationInventors: Hirokazu Yoshida, Akira Shimotori
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Publication number: 20020113605Abstract: The present invention relates to a radio frequency circuit, comprising a differential input stage, which links up with a cascaded capacitive stage, wherein the input stage is formed by a pair of transistors and wherein the imaginary part of the input stage current is at least substantially faded out by the capacitive stage. The imaginary part of the input current of a transistor is provided by currents originating from capacitors which are connected between the input node and other nodes in the circuit which have a different phase than the input node. The invention obviates the requirement of very high quality inductors by using internal phase differences on different nodes in an active network and is particularly suited for wireless products such as pagers and mobile telephone.Type: ApplicationFiled: January 17, 2002Publication date: August 22, 2002Inventors: Lucas Maria Florentinus De Maaijer, Petrus Gerardus Maria Baltus
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Patent number: 6414498Abstract: A system, an IC chip, a test structure formed on the IC chip, and a corresponding method for modeling one or more target interconnect capacitances is disclosed. The test structure comprises an interconnect configuration comprising a test interconnect and one or more target interconnects. The interconnect configuration has, for each target interconnect, a corresponding target interconnect capacitance between the test interconnect and the target interconnect. The test structure also comprises a test interconnect charging circuit connected to the test interconnect. The test interconnect charging circuit is configured to place a test charge on the test interconnect. The test structure further comprises one or more target interconnect charging circuits. Each target interconnect charging circuit is connected to a corresponding target interconnect.Type: GrantFiled: January 8, 2001Date of Patent: July 2, 2002Assignee: Celestry Design Technologies, Inc.Inventor: James C. Chen
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Patent number: 6381860Abstract: To provide an electrostatic capacitor-type sensor that does not require regulation such as zero-point adjustment and temperature compensation, etc. A pair of semi-circular differential electrodes are positioned next to each other in the vertical direction with a common electrode arranged so as to face the differential electrodes, with a fixed gap therebetween. The pair of differential electrodes and the common electrode are housed within an airtight container, and a dielectric fluid is sealed within the airtight container. The differential electrode on an upper side and the common electrode form an upper variable capacitor, and the differential electrode on the lower side and the common electrode form a lower variable capacitor.Type: GrantFiled: September 14, 2001Date of Patent: May 7, 2002Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Tomohiko Yashiro, Morio Sato
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Patent number: 6353337Abstract: An output buffer includes a reference capacitor; a constant current source connected in series with the reference capacitor, for generating a reference voltage with a constant gradient by charging the reference capacitor; a first transistor having its source connected to a capacitive load, and its gate connected to the connecting point of the reference capacitor and the first constant current source to be supplied with the reference voltage; a second transistor connected between the drain of the first transistor and a voltage source; a third transistor connected between the capacitive load and the voltage source; and a fourth transistor connected to the control terminal of the second transistor and to the control terminal of the third transistor, for switching the second and third transistors from an OFF state to an ON state when the first transistor is turned on.Type: GrantFiled: December 19, 2000Date of Patent: March 5, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Koji Nasu, Kiyoshi Adachi
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Patent number: 6328934Abstract: A device for detection of when at test probe of conducting material contacts a liquid surface includes a test probe of conducting material. The test probe is electrically screened by an insulated screen, with a part of the test probe projecting in front of the screen. The test probe is connected to a first alternating voltage source via a first impedance and to one input of a differential amplifier, and the screen is connected to a second alternating voltage source via a second impedance and to another input of the differential amplifier. An output of the differential amplifier is connected to one input of a first multiplicator and to one input of a second multiplicator, and another input of the first multiplicator is connected to a third alternating voltage source, and another input of the second multiplicator is connected to a fourth alternating voltage source.Type: GrantFiled: January 5, 2000Date of Patent: December 11, 2001Assignee: Pharmacia ABInventors: Arne Ljung, Juhan Kivineeme
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Patent number: 6326795Abstract: A detection circuit which is capable of outputting a voltage proportional to a static capacitance of a sensor is provided, which comprises a voltage input terminal connected to receive an input voltage and an operational amplifier. The input voltage received at the voltage input terminal is changed between two different reference voltages. An inverting input terminal of the amplifier is connected to the voltage input terminal through a resistor, and a non-inverting input terminal of the amplifier is connected to the voltage input terminal through the sensor capacitance and to one of the reference voltages through a switch. An output voltage of the amplifier is connected to the inverting input terminal through a feedback circuit including a resistor and a switch. The switches are closed and the one of the reference voltages is supplied to the input terminal during an initialization cycle. The switches are opened and the other reference voltage is supplied to the input terminal during a measurement cycle.Type: GrantFiled: October 8, 1999Date of Patent: December 4, 2001Assignee: Sumitomo Metal Industries, Ltd.Inventors: Toshiyuki Matsumoto, Yoshihiro Hirota, Muneo Harada, Takaya Miyano
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Patent number: 6311406Abstract: To provide an electrostatic capacitor-type sensor that does not require regulation such as zero-point adjustment and temperature compensation, etc. A pair of semi-circular differential electrodes are positioned next to each other in the vertical direction with a common electrode arranged so as to face the differential electrodes, with a fixed gap therebetween. The pair of differential electrodes and the common electrode are housed within an airtight container, and a dielectric fluid is sealed within the airtight container. The differential electrode on an upper side and the common electrode form an upper variable capacitor, and the differential electrode on the lower side and the common electrode form a lower variable capacitor.Type: GrantFiled: February 17, 2000Date of Patent: November 6, 2001Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Tomohiko Yashiro, Morio Sato
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Publication number: 20010033177Abstract: A circuit configuration for measuring the capacitance of structures in an integrated circuit having a test structure and a reference structure, includes first and second series circuits, each having two transistors connected in series and connected in parallel between supply terminals each providing one supply potential. The test structure is connected to a coupling node of the transistors of the first series circuit. The reference structure is connected to a coupling node of the transistors of the second series circuit. The supply terminals of the series circuits are connected to a controllable voltage source. A voltage-dependent differential capacitance measurement can be carried out on the test structure by using the circuit configuration.Type: ApplicationFiled: January 16, 2001Publication date: October 25, 2001Inventors: Jurgen Lindolf, Stefanie Schatt
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Publication number: 20010026161Abstract: The invention provides a cell voltage measuring device for a cell module wherein component cells are theoretically divided into a plurality of (n) cell blocks 111 to 11n. A plurality of potential detecting lines extending from respective potential detecting points of each of the cell blocks are provided with potential holding means 12 having capacitor blocks each for holding the potentials of the potential detecting points of the cell block, and cell voltage measuring means 14 for measuring the voltage of the cells based on the potentials of the potential detecting points held by the potential holding means 12. Flying capacitors are provided for each cell block.Type: ApplicationFiled: April 2, 2001Publication date: October 4, 2001Applicant: SANYO ELECTRIC CO., LTD.Inventor: Kimihiko Furukawa
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Publication number: 20010026160Abstract: A wave reforming circuit for correcting the upward and downward asymmetry of and binary coding a data train signal modulated by EFM modulation or another modulation method giving a substantially equal rate of occurrence of “1” and “0”, which can output to a comparator outputting binary data a binary signal holding a predetermined temporal mean value regardless of fluctuation in the temporal mean value of the input signal and having superior symmetry compared with the related art using as a reference value three types of reference voltages (0 level, positive side, and negative side) generated by inputting an integrated value of the output of the comparator into a charge pump.Type: ApplicationFiled: February 22, 2001Publication date: October 4, 2001Inventor: Toshihiko Orii
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Patent number: 6215319Abstract: A measuring system for measuring a variable physical parameter by varying a reference signal above and below the magnitude of the physical parameter. The difference between the varying reference and the varying physical parameter is used to create an output signal representative of the magnitude of the parameter. A preferred embodiment of the invention uses a feedback-controlled system to vary the reference in such manner as to cause the time integral of the difference to be minimized. The reference is varied at a controlled rate, and the direction in which the reference is being varied is reversed when a function of the difference reaches some predetermined level. A function of the limits between which the reference has recently been varied is representative of the magnitude of the physical parameter.Type: GrantFiled: July 31, 1998Date of Patent: April 10, 2001Inventors: Kevin G. Hafer, L. Jonathan Kramer
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Patent number: 6198290Abstract: A method for detecting defective capacitors in a circuit and meters for that, based on passing alternative measuring current through capacitor to be tested. According to the first versions of the disclosed method, measuring signal is being applied between an envelop of the capacitor and one of its terminals to inject the measuring current inside the capacitor. That causes the current to flow through a dielectric between capacitor's plates and affect the current consumption depending on quality of the capacitor. An indicator of the meter displays one of voltage-current relationships that characterizes the capacitor. In this version the measuring current flows through a closed circuit.Type: GrantFiled: July 18, 1997Date of Patent: March 6, 2001Inventor: Mark Krinker
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Patent number: 6121781Abstract: A component support and mechanization machine, which is comprised of a set of units U.1 to U.n, each of which comprises a collection of arcs that form continuous arc-shaped trajectories along which may be moved a series of telescoping columns, equipped with workheads with double hinge joints and capacitative sensors. The arcs of each unit are mounted on rails and the different units U.1 to U.n are placed on main rails.Type: GrantFiled: October 14, 1997Date of Patent: September 19, 2000Inventor: Manuel Torres Martinez
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Patent number: 5955887Abstract: An ice detector includes a pair of electrodes connected by a pair of leads to a control unit which measures the total impedance between leads to thereby sense and detect the presence of ice and other contaminants formed on top thereof utilizing a comparator circuit. The electrodes are integrated into patch which can be placed at different locations on an aircraft.Type: GrantFiled: December 20, 1996Date of Patent: September 21, 1999Assignee: The B. F. Goodrich CompanyInventors: Gerald Willey Codner, Daniel A. Pruzan, Richard Lawrence Rauckhorst, III, Allen Donald Reich, David Bert Sweet