Abstract: A method is provided for determining a power noise histogram of a computer system. The computer system includes a skitter circuit with multiple skitter bins, each skitter bin of the multiple skitter bins being connected to a signal line at one or more clock cycles. The method includes: connecting each skitter bin to an individual counter circuit; and incrementing a counter when the respective skitter bin is enabled.

Abstract: A system and method for testing an integrated circuit including one or more circuit blocks, each containing an internal core, and a test access port connected to a set of boundary-scan cells includes a select register for receiving and holding the address of a circuit block to be accessed. One or more demultiplexers provide an interface between input test access port signals and the various individual circuit blocks, and one or more multiplexers provide an interface between the various individual circuit blocks and the output test access port signals. The address bits read into the select register act as the select signal(s) for the one or more demultiplexers and multiplexers, causing input test access port signals to be selectively routed to the circuit block having the appropriate address and causing output signals to be selected from the same circuit block as the output test access port signals.