Transistor-transistor Logic (ttl) Patents (Class 326/128)
  • Patent number: 10715086
    Abstract: An amplifier circuit includes a first transistor, a second transistor, a first pathway and a second pathway. The first transistor amplifies an external signal that is input from outside the amplifier circuit. The second transistor amplifies a detection signal that detects a level of the external signal. The first pathway is connected between a collector of the first transistor and a base of the second transistor to supply the detection signal that is output from the collector of the first transistor to the base of the second transistor. The second pathway is connected between an emitter of the first transistor and the base of the second transistor to supply a bias voltage from the emitter of the first transistor to the base of the second transistor.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: July 14, 2020
    Assignee: DENSO TEN LIMITED
    Inventors: Tetsuro Okano, Kenji Kawai, Masayoshi Hirai
  • Patent number: 8054266
    Abstract: A driving apparatus for a display device includes a gray voltage generator that generates a plurality of gray voltage sets, each including a plurality of gray voltages having different levels, and a signal converter that includes a first selector for selecting one gray voltage set among the plurality of gray voltage sets on the basis of a first portion of an image signal and a second selector for selecting one or more gray voltages among the plurality of gray voltages belonging to the selected gray voltage set on the basis of a second portion of the image signal to output and select gray voltages with a smaller size digital-analog converter.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Doo-Hyung Woo, Il-Gon Kim, Kee-Chan Park
  • Patent number: 7106093
    Abstract: A semiconductor device having a plurality of cascaded IC's (14, 15, 16), wherein the matching impedance between a signal transmission path (12) connected to an external signal transmission path and an input-side or output-side IC (14, 16) is set at 50 ohms which is equal to the characteristics impedance of the external signal transmission path. The matching impedance between a internal signal transmission path (13) and an input-side or output-side IC or intermediate IC is set at 200 ohms which is higher than the 50 ohms. The semiconductor device reduces the current dissipation and can operate at a higher speed.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: September 12, 2006
    Assignee: NEC Corporation
    Inventor: Yasuyuki Suzuki
  • Publication number: 20040021487
    Abstract: The invention concerns a switching circuit (20) adapted to generate a pulse when there occurs a rising edge of a signal applied on an input terminal (CTRL), comprising: a first NPN type bipolar transistor (TN2) whereof the transmitter is connected to the input terminal; a second transistor (TP2) whereof a control electrode is connected, through a first resistor (Re2), to the input terminal, the base of the first transistor being connected to a supply potential (VDD) by the second transistor in series with a second resistor (Rp2); and a third transistor (TN3) connecting an output terminal (22) of the switching circuit to a reference potential (GND) and whereof a control electrode is connected to the collector of the first transistor (TN2).
    Type: Application
    Filed: April 29, 2003
    Publication date: February 5, 2004
    Inventors: Franck Duclos, Olivier Ladiray, Jerome Heurtier
  • Patent number: 6400184
    Abstract: A transistor output circuit featuring a low power consumption, high speed and stabilized operation is realized.
    Type: Grant
    Filed: January 22, 2001
    Date of Patent: June 4, 2002
    Assignee: Sony Corporation
    Inventors: Norio Shoji, Hideyuki Nishioka
  • Patent number: 6002269
    Abstract: A bootstrap logic driver circuit operable from a low voltage power supply includes first and second bipolar transistors coupled between positive and negative voltage supplies and having a collector load comprising a first diode structure. A further transistor coupled between the voltage supplies has a collector load comprising a second diode structure. A bootstrap capacitor coupled between the diode structures stores charge when the circuit is in a first condition and is discharged when the circuit is in a second condition to provide an enhanced drive voltage for an output transistor.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: December 14, 1999
    Assignee: Northern Telecom Limited
    Inventors: Peter Dartnell, Joseph Chan
  • Patent number: 5408136
    Abstract: A TTL gate (26) with a Darlington output (14,14A,16) includes three circuits (28,30,32) to decrease the gate switching time during an output transition from a high to a low logic state and from a high impedance state to a low logic state. Each speedup circuit drives the gate input transistor (12) for a different length of time, ensuring that the lower output transistor (16) turns on rapidly and remains on until the output transition is complete. The circuits ensure, however, that the additional drive current (82) is time limited to avoid excessive power consumption.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: April 18, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Kevin M. Ovens, Jeffrey A. Niehaus, Dale C. Earl