With Slope Or Duration Control Patents (Class 327/134)
  • Patent number: 11881280
    Abstract: An integrated circuit includes a non-volatile memory, a charge pump that generates high voltages for programming operations of the non-volatile memory array, and a charge pump regulator that controls a slew rate of the charge pump. The charge pump regulator generates a sense current indicative of the slew rate and adjusts a frequency of a clock signal provided to the charge pump based on the sense current.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: January 23, 2024
    Assignee: STMicroelectronics International N.V.
    Inventors: Shivam Kalla, Vikas Rana
  • Patent number: 11791813
    Abstract: Disclosed are a Pulse Width Modulation (PWM) generation circuit, a processing circuit and a chip. The PWM generation circuit is used for controlling a rotation speed of an external motor system. The PWM generation circuit includes a second clock prescaler and a PWM signal generator. A frequency division output end of the second clock prescaler is connected to a data input end of the PWM signal generator. The PWM signal generator includes an output frequency divider and a comparator. A clock output end of the output frequency divider is connected to a comparison input end of the comparator. By means of the technical solution, PWM signals with different duty ratios.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: October 17, 2023
    Assignee: AMICRO SEMICONDUCTOR CO., LTD.
    Inventors: Zhanghui Li, Zaisheng He, Dengke Xu
  • Patent number: 11791806
    Abstract: A system and method is disclosed, to generate an AC signal having a positive and negative half-cycles, each comprising a plurality of PWM pulses each with an individually designated pulse width, the system comprising: a first clock circuit; a second, faster, clock circuit; clock ratio measurement circuitry configured to output a first measurement being a ratio of frequencies; a propagation delay circuit configured to measure a number of propagation elements through which a bit transition propagates within a second clock signal period; pulse data calculation element configured to determine pulse shaping data; and for each of the half-cycles, a respective pulse synthesis circuit configured to synthesise the respective plurality of PWM pulses, each pulse having a respective start defined by the first clock signal, and a pulse width defined by the pulse shaping data and synthesised from the second clock and an output pulse from the propagation delay circuit.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: October 17, 2023
    Assignee: NXP USA, Inc.
    Inventors: Michael Rohleder, Vaclav Halbich, Lukas Vaculik, Petr {hacek over (S)}pa{hacek over (c)}ek
  • Patent number: 11646651
    Abstract: A ramp generator for a constant on-time DC-DC converter, wherein the ramp generator is configured to reduce DC offset and smooth transitions between conduction modes. The ramp voltage generator includes a common voltage generator suitable for generating a common voltage; a first ramp voltage generation block suitable for generating a first ramp voltage responsive to a first switching signal and a control signal, wherein the first switching signal resets one or more valley points of the first ramp voltage to one or more valley points of the common voltage; and a second ramp voltage generation block suitable for generating a second ramp voltage responsive to a second switching signal, the first ramp voltage, and the control signal.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: May 9, 2023
    Assignee: Reed Semiconductor Corp.
    Inventors: Jiwei Fan, Yingqian Ma, Jingyuan Chen, Hal Chen, Jialun Du
  • Patent number: 11228314
    Abstract: A slew rate control circuit is disclosed. The slew rate control circuit includes an input port to receive an input signal, a transmitter to transmit the input signal to an output port and an impedance control circuit coupled between the transmitter and the output port. The impedance control circuit has an adjustable impedance that is configured to be adjusted during a rise and a fall of the input signal using a trim code and an one shot pulse.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: January 18, 2022
    Assignee: NXP B.V.
    Inventors: Siamak Delshadpour, Xueyang Geng
  • Patent number: 11206032
    Abstract: In an embodiment an analog-to-digital converter circuit has an input for receiving at least a first analog signal level, a ramp generator adapted to provide a ramp signal having a constant and adjustable starting level which splits into a first section which is rising and a second section which is falling concurrently to the first section's rising, wherein the starting level lies within an input range of the analog-to-digital converter circuit, a comparison unit which is coupled by its first input to the input of the analog-to-digital converter circuit and is coupled by its second input in a switchable manner to the ramp generator, a counter which is coupled to a control unit, and the control unit which is coupled to an output of the comparison unit, wherein the control unit is prepared to enable the counter depending on a comparison of the ramp signal with the first analog signal level and to determine a digital value as a function of a count of the counter reached at an intersection point of the ramp signal
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: December 21, 2021
    Assignee: AMS INTERNATIONAL AG
    Inventors: Rodolfo Rodrigues, Flavio Santos
  • Patent number: 10379182
    Abstract: A circuit arrangement for an MRT system and a method for operating an MRT system are disclosed. The circuit arrangement includes a gradient amplifier having a switch-mode output stage, a regulator device, and a modulator connected therebetween in the circuit. To ensure patient safety, a control path is integrated into a drive path of the circuit arrangement or the MRT system provided for driving a gradient coil, the gradient coil being connected to an output of the switch-mode output stage. The control path includes a limiter stage connected downstream of the regulator device, the modulator, the switch-mode output stage and its supply voltage. The limiter stage is connected in the circuit between the regulator device and an input of the modulator, to limit a control signal output by the regulator device and limit the voltage for the gradient coil provided by the switch-mode output stage at its output.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: August 13, 2019
    Assignee: SIEMENS HEALTHCARE GMBH
    Inventors: Helmut Lenz, Matthias Gebhardt, Dirk Schneiderbanger, Roland Werner
  • Patent number: 10109447
    Abstract: An apparatus, system, and method for performing electron beam modulation includes an input pulser to provide an electromagnetic pulse; a radio frequency (RF) filter to filter the electromagnetic pulse; a nonlinear transmission line to receive the electromagnetic pulse, and generate a backward wave RF oscillation of a predetermined frequency to travel in a direction opposite that of the electromagnetic pulse; and an electron beam generating device including an anode and a cathode, the electron beam generating device to receive a combined electromagnetic pulse from the RF filter and the backward wave RF oscillation from the nonlinear transmission line to cause excitation of a modulated voltage between the anode and cathode, and to cause the electron beam generating device to emit an electron beam that is modulated at the predetermined frequency of the backward wave RF oscillation.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: October 23, 2018
    Assignee: The United States of America as Represented by the Secretary of the Air Force
    Inventors: Brad W. Hoff, David H. Simon, James A. Schrock
  • Patent number: 9263952
    Abstract: A circuit for sensing gate voltage of a power FET. A switching circuit includes a switching FET having a high voltage rating, its drain coupled to the gate of the power FET, and its source coupled to an output node. A first feedback loop is coupled to the gate of the switching FET to facilitate sensing rising gate voltage. A second feedback loop is coupled to the gate of the switching FET to facilitate sensing falling gate voltage.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: February 16, 2016
    Assignee: Texas Instruments Incorporated
    Inventors: Zheng Li, Wai Cheong Chan
  • Patent number: 9093993
    Abstract: The present invention provides a power saving circuit for PWM circuit. The power saving circuit is utilized to control at least one internal circuit. The power saving circuit comprises a switching circuit which generates a switching signal. The power saving circuit controls the internal circuit in response to the switching. The power saving circuit disables the internal circuit for power saving when the switching signal is disabled.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: July 28, 2015
    Assignee: SYSTEM GENERAL CORP.
    Inventor: Wei-Hsuan Huang
  • Publication number: 20150076325
    Abstract: A ramp generator circuit includes: a reference signal generator circuit which generates a ramp waveform having a slope obtained by multiplication using a power of 2 according to a value of a higher order bit of a gain control signal; a clock control circuit which selectively outputs 2?m kinds of fractional-N clocks according to one of 2?m (natural number) areas obtained by dividing a code range represented by a lower order bit, when a negative gain is set; and a variable gain circuit which sets a ramp waveform according to the value of the gain control signal, and sets a ramp signal amplitude in each area so that a period ratio between ramp driving clocks for adjacent areas and a ratio between an amplitude of a ramp signal when the standard gain is set and a largest amplitude of a ramp signal are equal.
    Type: Application
    Filed: November 24, 2014
    Publication date: March 19, 2015
    Inventors: Masahiro HIGUCHI, Hiroshi FUJINAKA, Makoto IKUMA
  • Publication number: 20150054553
    Abstract: The frequency characteristic of a voltage-feedback class-D amplifier circuit for driving an output load is improved. A triangular-wave correction circuit which compensates a gradient of a triangular wave is provided to a triangular-wave signal generator which supplies a triangular wave signal used as a PWM carrier to a comparison circuit for performing PWM modulation of an input signal. In an area where a duty of a command value for an output circuit drive becomes about 50%, a slew rate (gradient) of the triangular wave is decreased.
    Type: Application
    Filed: October 1, 2014
    Publication date: February 26, 2015
    Inventor: Naoya ODAGIRI
  • Patent number: 8963589
    Abstract: An oscillator circuit selectively charges and discharges a capacitor with currents having variable magnitudes. A trimming circuit functions to measure a half period of the oscillator signal. The measured half period is compared to a reference period to generate an error signal. The variable magnitudes of one or the other or both of the current for sourcing or sinking at the capacitor are adjusted in response to the error signal.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: February 24, 2015
    Assignees: STMicroelectronics S,r.l., STMicoelectronics Asia Pafific Pte. Ltd.
    Inventors: Lorenzo Ferrario, Roberto Trabattoni
  • Publication number: 20150022249
    Abstract: An apparatus and method for generating a ramp signal includes applying a constant reference voltage to a reference capacitor and controlling charging or discharging of the reference capacitor with a programmable current generator to provide the ramp signal at a ramp signal node. The method can include, buffering the ramp signal to an output node to drive a load. When generating the ramp signal having a negative slope, the programmable current generator includes a programmable current sink coupled to the ramp signal node. When generating the ramp signal having a positive slope, the programmable current generator includes a programmable current source that is coupled between a positive power supply node and the ramp signal node. When generating the ramp signal having a bidirectional slope, the programmable current generator includes a programmable current source and a programmable current sink.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 22, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Martin Kinyua, Eric Soenen
  • Patent number: 8884674
    Abstract: An apparatus, comprising: a NFET current mirror having a first NFET and a second NFET; a PFET gate-coupled to the drain of the second NFET, wherein the PFET has a larger gain than the second NFET; a driver NFET having a gate that is coupled to the drain the PFET; wherein the second NFET is coupled through its source to the drain of the driver NFET.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: November 11, 2014
    Assignee: Texas Instruments Incorporated
    Inventor: Adam L. Shook
  • Patent number: 8860523
    Abstract: The frequency characteristic of a voltage-feedback class-D amplifier circuit for driving an output load is improved. A triangular-wave correction circuit which compensates a gradient of a triangular wave is provided to a triangular-wave signal generator which supplies a triangular wave signal used as a PWM carrier to a comparison circuit for performing PWM modulation of an input signal. In an area where a duty of a command value for an output circuit drive becomes about 50%, a slew rate (gradient) of the triangular wave is decreased.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: October 14, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Naoya Odagiri
  • Patent number: 8848851
    Abstract: An output signal adjustment system includes a signal adjustment unit, a reference slope generating unit, a slope detecting unit, a voltage-to-current conversion unit, and a control unit. The slope detecting unit compares the slope of the rising and falling edges of the output signal of the reference slope generating unit with that of the signal adjustment unit and outputs a voltage signal. The voltage-to-current conversion unit converts the voltage signal into a current signal. Based on the current signal, the control unit outputs a control signal for controlling the adjustment of the signal adjustment unit to the slope of the rising and falling edges of the output signal. The output signal adjustment system can automatically adjust the slope of the rising and falling edges of the output signal, so that the output signal is insensitive to the packaging, the printed circuit board, the transmission line and other sender loads.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: September 30, 2014
    Assignee: IPGoal Microelectronics (SIChuan) Co., Ltd.
    Inventors: Zhaolei Wu, Guosheng Wu
  • Patent number: 8841594
    Abstract: Disclosed are a ramp signal generator and an image sensor. The ramp signal generator includes: a comparator comparing a first bias voltage input to a first input terminal and a second bias voltage input to a second input terminal and outputting a ramp signal from an output terminal; a ramp signal adjustment unit including a plurality of switched capacitors made up of switches and capacitors connected in series, and connected in parallel between a first input terminal of the comparator and an output terminal of the comparator; and a controller switching the switches of the plurality of switched capacitors to adjust the ramp signal output from the comparator such that the ramp signal becomes nonlinear over time.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: September 23, 2014
    Assignee: SK Hynix Inc.
    Inventor: Hee Bum Lee
  • Patent number: 8823427
    Abstract: A method for generating a ramp comprises providing a voltage reference source, providing a summing amplifier, providing n switched capacitor elements coupled in parallel between the voltage reference source and the summing amplifier, and selectively activating a predetermined number of the switched capacitor elements to first store charge on each activated switched capacitor element and then to measure the sum of the charges on the activated capacitor switch elements in each of a fixed-integer number of time slots in a cyclical manner, the predetermined number being between 0 and n.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: September 2, 2014
    Assignee: Foveon, Inc.
    Inventor: Brian Jeffrey Galloway
  • Patent number: 8717076
    Abstract: An apparatus, comprising: a PMOS current mirror have a first PFET and a second PFET coupled at their respective gates; a first current source coupled to drain of the first PFET; a second current source configured to have a current that is greater than the first current source, coupled to the drain of the second PFET; a capacitor coupled to the gates of the PFET current mirror; a third PFET gate-coupled to the current mirror; a driver NFET having a gate coupled to the drain of the third PFET, wherein a drain of the driver NFET is coupled to the capacitor.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: May 6, 2014
    Assignee: Texas Instruments Incorporated
    Inventor: Adam L. Shook
  • Publication number: 20140117959
    Abstract: In various embodiments a controller for controlling the operation of a switched mode power supply is provided, the controller comprising: a first signal source configured to provide a first set of signals including a set signal and a clear signal, wherein the first set of signals may correspond to a first mode of operation of the switched mode power supply; a second signal source configured to provide a second set of signals including a set signal and a clear signal, wherein the second set of signals may correspond to a second mode of operation of the switched mode power supply; a selecting circuit coupled to the first signal source and to the second signal source, the selecting circuit being configured to select either the first set of signals or the second set of signals; a switching signal generating circuit coupled to the selecting circuit and configured to provide a switching signal to the switched mode power supply based on the set of signals received from the selecting circuit.
    Type: Application
    Filed: October 30, 2012
    Publication date: May 1, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventor: Pedro Costa
  • Patent number: 8664982
    Abstract: A buck-boost power converter includes a power stage to convert an input voltage to an output voltage, an error amplifier to generate an error signal according to a reference voltage and a feedback signal proportional to the output voltage, a ramp generator to provide two ramp signals, and two comparators to generate two control signals according to the error signal and the two ramp signals to drive the power stage. By using feed-forward technique, one of the two ramp signals has a peak varying with the input voltage and the other ramp signal has a valley varying with the input voltage, so that the power converter has fast line response.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: March 4, 2014
    Assignee: Richtek Technoloy Corp.
    Inventors: Ke-Horng Chen, Pin-Chin Huang, Hsin-Hsin Ho
  • Patent number: 8604845
    Abstract: Disclosed is a triangular wave generator which includes a square wave signal generating unit configured to output a first signal transitioning to a high level from a low level via an output terminal in response to a first transition of a clock signal and to transition the first signal to a low level from a high level in response to a reset signal; a resistance unit configured to adjust a voltage level of a the square wave signal; and a capacitance unit configured to receive an output signal of the resistance unit to generate a second signal rising to a high level from a low level with a slope, to provide the reset signal to the square wave signal generating unit, and to output a triangular signal by falling the second signal to a low level from a high level with a slope.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: December 10, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hui Dong Lee, Jaewon Nam, Young Kyun Cho, Jong-Kee Kwon, Yil Suk Yang, Jongdae Kim
  • Patent number: 8421431
    Abstract: A frequency-jitter-controller for a power-converter is provided, and which includes a first and a second capacitance units, a first and a second charge-discharge control units, a comparing unit and a control unit. Both capacitance units are charged to a crossing-voltage during a charging phase and discharged to a reference voltage and a clamp voltage respectively during a discharging-phase in response to operations of both charge-discharge control units. The comparing unit outputs a pulse signal, compares voltages of both capacitance units during the charging phase, and compares the voltage of the first capacitance unit and the reference voltage during the discharging phase. The control unit generates a frequency jitter control signal according to the pulse signal to adjust a rising rate of the voltage on the second capacitance unit, so as to change a frequency of the pulse signal, and thus reduce EMI generated by switching switch-elements in the power-converter.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: April 16, 2013
    Assignee: Power Forest Technology Corporation
    Inventor: Ju-Lin Chia
  • Publication number: 20130063190
    Abstract: One embodiment of the present invention relates to a waveform generator that includes a first pair of capacitors, a second pair of capacitors, an op amp and control logic. The op amp has inputs and provides a differential triangular waveform at its outputs as an output signal. The control logic includes capacitor control logic, ramp control logic, reset control logic and charge control logic. The capacitor control logic connects a current pair of the first and second capacitors to the inputs of the op amp. The ramp control logic provides ramp currents to the current pair. The reset control logic resets capacitors of a next pair to selected voltage(s), such as zero. The charge control logic charges the next pair of capacitors, typically after the next pair of capacitors has been driven to the selected voltage(s).
    Type: Application
    Filed: September 8, 2011
    Publication date: March 14, 2013
    Applicant: Infineon Technologies AG
    Inventor: Georgi Panov
  • Patent number: 8390345
    Abstract: A ramp waveform generating apparatus generates a reference waveform by using an input signal and generates a driving control signal for turning on and off a switch having a first terminal connected to a load and a second terminal connected to a power supply by comparing the voltage of the reference waveform with the voltage of the load. While the switch is repetitively turned on and off in accordance with the driving control signal, a ramp waveform may be generated.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: March 5, 2013
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Sung Nam Kim, Cha Kwang Kim, Young Sik Lee
  • Patent number: 8373448
    Abstract: An electronic load for a semiconductor element is provided. The electronic load includes at least two slope generating circuits, each of which generates a current according to a current for the electronic load corresponding to an output voltage of a power supply. Each slope generating circuit comprises at least a first slope generating circuit that simulates a first slope when the output voltage of the power supply is between 0V to a rated voltage, and a second slope generating circuit that simulates a second slope when the output voltage of the power supply is higher than the conducting state voltage of the semiconductor element by subtracting the forward bias voltage from the output voltage of the power supply.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: February 12, 2013
    Assignee: Prodigit Electronics Co., Ltd.
    Inventor: Ying-Chang Liu
  • Patent number: 8294495
    Abstract: A circuit includes a level-crossing detector to generate a level-crossing detection signal when an input signal crosses a predetermined voltage level. A first stage set of capacitors is operatively coupled to the level-crossing detector. A ramp circuit is operatively coupled to the set of series-connected capacitors. A second stage set of capacitors is operatively coupled to the first stage set of capacitors and the ramp circuit. The ramp circuit includes a feedback capacitor and a preset switch to provide a linear ramp output.
    Type: Grant
    Filed: June 15, 2009
    Date of Patent: October 23, 2012
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Hae-Seung Lee
  • Patent number: 8188773
    Abstract: The voltage-controlled dual-slope square and triangular waveform generator is an electronic circuit that includes a plus-type second-generation current conveyor operably connected to a single operational amplifier. At the input stage to the operational amplifier, two metal-oxide semiconductor (MOS) transistors are configured as switches. Three resistors and a grounded capacitor are included in the electronic circuit, thereby maintaining a low component count. The leading and trailing slopes of the waveform are independently adjustable by selection of the voltages V1 and V2 that are selectively connectable to the y-input of the CCII+ via switching action of the MOS transistors. The frequency of the waveform is adjustable via the voltage divider ratio between the output and noninverting input of the operational amplifier. The simple and elegant nature of the circuit design provides a low-cost waveform generator that can be adjusted both for frequency and for independent leading edge and trailing edge slopes.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: May 29, 2012
    Assignee: King Fahd University of Petroleum & Minerals
    Inventor: Muhammad Taher Abuelma'atti
  • Patent number: 8115563
    Abstract: The frequency characteristic of a voltage-feedback class-D amplifier circuit for driving an output load is improved. A triangular-wave correction circuit which compensates a gradient of a triangular wave is provided to a triangular-wave signal generator which supplies a triangular wave signal used as a PWM carrier to a comparison circuit for performing PWM modulation of an input signal. In an area where a duty of a command value for an output circuit drive becomes about 50%, a slew rate (gradient) of the triangular wave is decreased.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: February 14, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Naoya Odagiri
  • Publication number: 20120001055
    Abstract: Disclosed are a ramp signal generator and an image sensor. The ramp signal generator includes: a comparator comparing a first bias voltage input to a first input terminal and a second bias voltage input to a second input terminal and outputting a ramp signal from an output terminal; a ramp signal adjustment unit including a plurality of switched capacitors made up of switches and capacitors connected in series, and connected in parallel between a first input terminal of the comparator and an output terminal of the comparator; and a controller switching the switches of the plurality of switched capacitors to adjust the ramp signal output from the comparator such that the ramp signal becomes nonlinear over time.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 5, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Hee Bum LEE
  • Publication number: 20110316508
    Abstract: Stabilization of a switching voltage regulator employing V2 control against ripple oscillation instability when the equivalent series resistance (ESR) of an output capacitor is small is provided by providing both an external ramp and an internal ramp (only the latter of which requires an approximation of inductor current) in the control feedback path, preferably including both inner and outer feedback loops. Approximation of inductor current using such an arrangement is non-critical and may be estimated based on power input voltage. Drift of a circuit providing such an inductor current estimation is preferably avoided by adjusting control duty cycle or slew rate of the positive-going ramp portion of the estimated inductor current triangular waveform.
    Type: Application
    Filed: August 12, 2010
    Publication date: December 29, 2011
    Inventors: Kuang-Yao Cheng, Feng Yu, Paolo Mattavelli, Fred C. Lee
  • Publication number: 20110291709
    Abstract: A ramp waveform generating apparatus generates a reference waveform by using an input signal and generates a driving control signal for turning on and off a switch having a first terminal connected to a load and a second terminal connected to a power supply by comparing the voltage of the reference waveform with the voltage of the load. While the switch is repetitively turned on and off in accordance with the driving control signal, a ramp waveform may be generated.
    Type: Application
    Filed: March 16, 2011
    Publication date: December 1, 2011
    Inventors: Sung Nam KIM, Cha Kwang KIM, Young Sik LEE
  • Patent number: 8058939
    Abstract: A slope compensation circuit includes an oscillator for generating a first clock signal having a reference frequency, a ramp signal generator for generating a ramp signal having a duty ratio of about 50% or higher based on the first clock signal, and a slope compensation signal generator for outputting a slope compensation current based on the ramp signal.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: November 15, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Sung-Hoon Bea, Hwan Cho
  • Patent number: 8040165
    Abstract: Provided is a semiconductor integrated circuit including: a differential driver that is disposed between a first power supply and a second power supply and drives differential input signals to generate differential output signals; and a control signal generation circuit that generates a first control signal for controlling a voltage level of each of the differential output signals. When each of a pair of output signals forming the differential output signals is changed from a voltage level corresponding to the first power supply to a voltage level corresponding to the second power supply, an amount of change in the voltage level of the corresponding output signal is controlled based on the first power supply.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: October 18, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Motoshi Azetsuji
  • Patent number: 7999523
    Abstract: A technique reduces effects of power supply noise on a signal output by an integrated circuit output driver circuit powered at least partially by an external power supply. An integrated circuit includes a first circuit that provides a first version of a signal to be output referenced between a first regulated voltage and a first power supply voltage of an external power supply. A second circuit provides a second version of the signal to be output referenced between a second regulated voltage and a second power supply voltage of the external power supply. A third circuit provides a third version of the signal to be output referenced between the first power supply voltage and the second power supply voltage and based on the first and second versions of the signal to be output and power received from the external power supply.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: August 16, 2011
    Assignee: Silicon Laboratories Inc.
    Inventors: Aaron J. Caffee, Jeffrey L. Sonntag
  • Patent number: 7919998
    Abstract: A triangle waveform generator is set forth that comprises a capacitive element, a regulator, and a control circuit. The regulator is configured to charge the capacitive element in responsive to a first control signal and to discharge the capacitive element in response to a second control signal. The control circuit is responsive to a reference waveform to generate the first and second control signals. In one example, the control circuit generates the first and second control signals in response to the amplitude, frequency, phase, and symmetry of the reference waveform.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: April 5, 2011
    Assignee: Harman International Industries, Incorporated
    Inventor: Gerald R. Stanley
  • Patent number: 7916098
    Abstract: A plasma display apparatus and a method of driving the same are disclosed. The plasma display apparatus includes a plasma display panel including a scan electrode, and a scan driver that supplies a setup pulse to the scan electrode. The setup pulse gradually rises to a first voltage level with a first slope, rises from the first voltage level to a second voltage level with a second slope smaller than the first slope, and rises from the second voltage level to a third voltage level with a third slope different from the second slope.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: March 29, 2011
    Assignee: LG Electronics Inc.
    Inventors: Jeong Pil Choi, Kyu Choon Cho, Woo Chang Jung
  • Publication number: 20110006817
    Abstract: A triangular wave generator, comprising: a first frequency divider, for utilizing a first positive integer to divide a first frequency of a first periodical signal to generate a first frequency-divided signal; a second frequency divider, for utilizing a second positive integer to divide a second frequency, which equals the first frequency multiplying a third positive integer, of a second periodical signal to generate a second frequency-divided signal; and an up/down counter, for generating a triangular wave first and second frequency-divided frequencies respectively belonging to first and second frequency divided signals; wherein a frequency of the triangular wave equals to the first frequency-divided frequency, and an amplitude of the triangular wave is determined according to a ratio of the first and second frequency-divided frequencies.
    Type: Application
    Filed: July 8, 2009
    Publication date: January 13, 2011
    Inventors: Song-Rong Han, Kuo-Hsiung Wu, Chia-Liang Lai
  • Patent number: 7834592
    Abstract: A circuit includes a pulse transformer having primary and secondary windings. An oscillating waveform is applied to the primary winding to induce an oscillating waveform at the secondary winding. A transistor in series with a first resistor is coupled between the secondary winding and the ground. An R-C network formed by a second and a third resistor and a capacitor is coupled to a base junction of the transistor. The R-C network causes a slow, tapered linear pinch off of the transistor's conductance to enable the circuit to output a triangular waveform, which is characterized by a relatively short linear rise time followed by a substantially long linear fall time. The R-C network is coupled to the secondary winding via a first and a second diode, respectively.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: November 16, 2010
    Assignee: PulseTech Products Corporation
    Inventors: Pete Ward Smith, James Earl Huffman, David Lee Sykes, Clyde Ray Calcote
  • Patent number: 7816955
    Abstract: The present invention provides a ramp generator capable of appropriately setting a rise starting point of an output voltage of a ramp waveform and an output voltage at the time of stable output. A current adjustment unit including a differential pair of transistors and an amplifier constitute a feedback circuit. By controlling the charging/discharging of an integration capacitor by ON/OFF of a discharge current source connected to a common emitter terminal of the current adjustment unit, an output of the ramp waveform outputted from an output terminal disposed at the connection end of the integration capacitor is controlled.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: October 19, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Masayoshi Takahashi, Kengo Imagawa, Norio Chujo
  • Publication number: 20100164563
    Abstract: A slope compensation circuit includes apparatus includes an oscillator for generating a first clock signal having a reference frequency, a ramp signal generator for generating a ramp signal having a duty ratio of about 50% or higher based on the first clock signal, and a slope compensation signal generator for outputting a slope compensation current based on the ramp signal.
    Type: Application
    Filed: December 18, 2009
    Publication date: July 1, 2010
    Inventors: Sung-Hoon Bea, Hwan Cho
  • Patent number: 7746129
    Abstract: A low power servo-controlled single clock ramp generator (100) includes a fast switched comparator (102), charge pump (110) and voltage-to-current converter (120) connected to provide a feedback control mechanism under control of a pulse comparison clock signal (pulse_comp) and a reset pulse clock signal (rst_pulse) that are generated from a single input clock signal (clkin) so that there are well defined time intervals between pulses in the pulse comparison clock signal and the reset pulse clock signal, thereby providing a ramp signal (Vramp_out) having a stable, frequency-independent amplitude that is not limited by the reference voltage.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: June 29, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jung Hyun Choi, Fernando Chavez Porras
  • Publication number: 20100052742
    Abstract: A PWM control circuit is disclosed. An oscillator generates a triangular signal, received by a limit signal generator to produce a limit signal accordingly. Corresponding to a rising period of the triangular signal, the limit signal sequentially experiences a first holding period, a rising period and a second holding period, wherein the limit signal has a first predetermined value during the first holding period and a second predetermined value during the second holding period. A compare/control circuit compares the limit signal with a detection signal corresponding to a current through a power switch, and controls the power switch accordingly.
    Type: Application
    Filed: August 28, 2008
    Publication date: March 4, 2010
    Inventors: Chun-Teh Chen, Ren-Yi Chen, Da-Chun Wei
  • Patent number: 7642820
    Abstract: A triangle wave generator with function of spreading frequency spectrum is provided. The triangle wave generator includes a switch control circuit, a current generator, an integrator, and a spread spectrum control circuit. The switch control circuit provides an internal clock and a switch control signal. The current generator is coupled to the switch control circuit and provides charge current according to the switch control signal. The integrator is coupled to the current generator and provides a triangle wave signal. The spread spectrum control circuit is coupled to the switch control circuit and the current generator for providing a current control signal according to the internal clock.
    Type: Grant
    Filed: December 24, 2007
    Date of Patent: January 5, 2010
    Assignee: Elite Semiconductor Memory Technology Inc.
    Inventors: Chin-Yang Chen, Jian-Wen Chen
  • Patent number: 7639051
    Abstract: In the case of a measuring device having a sensor supplied from an oscillator for a non-electrical variable and having a circuit arrangement downstream of the sensor for rectifying the output voltage of the sensor, interference pulses, which are superimposed on the output voltage of the movement sensor and are rectified when the output voltage of the movement sensor is rectified, falsify the measurement result. This is particularly true for spiked interference pulses having a high amplitude. In order to reduce such falsifications of the measurement result, the output voltage of the sensor is supplied to a ramp-generating circuit arrangement, in which the mathematical sign of the transmission behavior can be controlled. The mathematical sign of the transmission behavior of the ramp-generating circuit arrangement is controlled by a switching signal, whose flanks correspond to the zero crossings of the output voltage of the sensor.
    Type: Grant
    Filed: March 8, 2003
    Date of Patent: December 29, 2009
    Assignee: Bosch Rexroth AG
    Inventor: Karlheinz Panzer
  • Patent number: 7629762
    Abstract: A motor driving circuit comprising first and second input voltage source sets, a reference voltage source, first and second voltage level shift units, a logic unit, and an output voltage terminal. The first input voltage source set provides a first input voltage set. The second input voltage source set provides a second input voltage set. The reference voltage source provides a reference voltage. The first voltage level shift unit raises part of levels of the first input voltage set to a level of the reference voltage. The second voltage level shift unit partially raises levels of the second input voltage set to a level of the reference voltage. The logic unit receives the reference voltage and the first input voltage set and outputs a control voltage. The output voltage terminal receives the control voltage and outputs an output voltage.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: December 8, 2009
    Assignee: Princeton Technology Corporation
    Inventor: Jung-Yen Kuo
  • Patent number: 7622972
    Abstract: A system for generating an ideal rise or fall time includes: a first current source, for providing a first current; an adjustable capacitive component, coupled to the first current source, for generating an output signal according to a total capacitance controlled by a comparison signal; a signal conversion circuit, coupled to the adjustable capacitive component, for restoring charges stored in the adjustable capacitive component to a predetermined value when a voltage level of the output signal reaches a reference value to generate a clock-like signal; and a comparison circuit, coupled to the signal conversion circuit and the adjustable capacitive component, for comparing a period of the clock-like signal with a reference period of a reference clock signal and generating the comparison signal to adjust the total capacitance of the adjustable capacitive component when periods are not the same.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: November 24, 2009
    Assignee: Nanya Technology Corp.
    Inventors: Bret Roberts Dale, Darin James Daudelin, Ryan Andrew Jurasek, Dave Eugene Chapmen
  • Patent number: RE40971
    Abstract: A current source is provided according to the present invention. The current source includes N current sources configured in a parallel arrangement, wherein N is at least two. Each of the N current sources includes a respective control input. The current source also includes M delay elements. An mth one of the M delay elements includes an input in communication with an m?1th one of the M delay elements. M is equal to N?1, and an output of the mth one of the M delay elements is arranged in communication with the control input of an m+1th one of the N current sources.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: November 17, 2009
    Assignee: Marvell International Ltd.
    Inventor: Sehat Sutardja
  • Patent number: RE41926
    Abstract: The present invention discloses an output circuit that is able to adjust the output voltage slew rate and avoid short-circuit current, comprising: a control circuit for receiving an input data and generating a first set of control signals based on the input data; an output control device consisting of a first field effect transistor (FET) connected in series with a second field effect transistor (FET) and the point of connection is the output end for generating an output signal; a first capacitor having one end connected to a first working voltage and generates a first control voltage by charging/discharging on another end to control the gate of the first field effect transistor; a first switch for controlling charging/discharging of the first capacitor device based on the first set of control signals; a first current source for providing charging current for the first capacitor device; a second capacitor having one end connected to a second working voltage and generates a second control voltage by charging/d
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: November 16, 2010
    Assignee: Realtek Semiconductor Corp.
    Inventor: An-Ming Lee