With Inductive Device (e.g., Transformer, Etc.) Patents (Class 327/304)
  • Patent number: 11728138
    Abstract: In some embodiments, a high voltage power supply is disclosed that provides a plurality of high voltage pulses without any voltage droop between two subsequent pulses. In some embodiments, a high voltage power supply is disclosed that provides a waveform of voltage versus time having a plurality of high voltage pulses having a voltage greater than 1 kV and with a substantially flat portion between pulse. In some embodiments, a high voltage power supply is disclosed that includes a snubber with a snubber resistor having a resistance of about 7.5 m?1.25?; and a snubber capacitor having a capacitance of about 2 ?F-35 ?F.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: August 15, 2023
    Assignee: Eagle Harbor Technologies, Inc.
    Inventors: Christopher Bowman, Connor Liston, Kenneth Miller, Timothy Ziemba
  • Patent number: 10158357
    Abstract: A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: December 18, 2018
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Andrew T. D'Amico
  • Patent number: 9653907
    Abstract: A protection system against reverse battery connection according to an embodiment includes a controller configured to output a first square wave signal including a third square wave signal and a fourth square wave signal to an input terminal of a transformer using a first DC voltage, the transformer configured to output a second square wave signal obtained by transforming the first square wave signal, a rectifier configured to rectify the second square wave signal to output a second DC voltage, and a transistor configured to perform protection against reverse connection of a battery using the second DC voltage.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: May 16, 2017
    Assignee: LSIS CO., LTD.
    Inventor: Jae Ho Lee
  • Patent number: 9496862
    Abstract: A switching arrangement for triggering a semiconductor switching element with a first electrode, a second electrode and a control electrode includes: a pulse generator for generating a control voltage input signal; a bias voltage capacitor; a first electrical resistor electrically connected in series with the bias voltage capacitor between first and second terminals of the pulse generator, wherein the control electrode is electrically connected to the bias voltage capacitor and the first electrical resistor, and the first electrode is electrically connected to the pulse generator and the first electrical resistor; and an additional capacitor connected in series to the pulse generator, the first electrical resistor, and the bias voltage capacitor.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: November 15, 2016
    Assignee: CONTI TEMIC MICROELECTRONIC GMBH
    Inventor: Matthias Ridder
  • Publication number: 20150130525
    Abstract: A nanosecond pulser may include a plurality of switch modules, a transformer, and an output. Each of the plurality of switch modules may include one or more solid state switches. The transformer may include a core, at least one primary winding wound around at least a portion of the core, each of the plurality of switch modules may be coupled with the primary windings, and a plurality of secondary windings wound at least partially around a portion of the core. The output may output electrical pulses having a peak voltage greater than about 1 kilovolt and having a pulse width of less than about 1000 nanoseconds. The output may output electrical pulses having a peak voltage greater than about 5 kilovolts, a peak power greater than about 100 kilowatts, a pulse width between 10 nanoseconds and 1000 nanoseconds, a rise time less than about 50 nanoseconds, or some combination thereof.
    Type: Application
    Filed: November 14, 2014
    Publication date: May 14, 2015
    Inventors: Kenneth E. Miller, Timothy Ziemba
  • Patent number: 8970264
    Abstract: The invention relates to an analog isolation device (100) comprising a primary part (102) and a secondary part (104) separated by an electrical isolation barrier, these parts including a high-frequency channel configured to produce a high-frequency component in the secondary part and a low-frequency channel configured to produce a low-frequency component in the secondary part, in order to form the output signal from the high-frequency and low-frequency components, the device further including a control circuit (D1, 132) configured to receive, in the primary part, a setpoint signal (Sic) and a so-called image signal (Soim) representative of the output signal (So) and to apply in the high-frequency and/or low-frequency channel a correction signal VCOR as a function of the difference between the image signal and the setpoint signal in order to cause that difference to tend toward zero.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: March 3, 2015
    Assignee: Chauvin Arnoux
    Inventor: Francisque J. Pion
  • Patent number: 8941432
    Abstract: A resonant clock network includes an inductor coupled to the clock network through a plurality of switches. When the clock network enters resonant mode, the turn-on of the switches to couple the inductor to the clock network is staggered. The clock network may be formed of multiple regions, each with its own inductor and switches. The turn-on of switches of each region may be staggered with respect to the turn-on off the switches of the other regions as well as to the turn-on of switches within a region. In addition to staggering the turn-on of the switches when entering the resonant mode, the switches may be turned off in a staggered manner when exiting the resonant mode of operation.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: January 27, 2015
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Visvesh S. Sathe, Srikanth Arekapudi, Charles Ouyang, Kyle Viau
  • Patent number: 8847652
    Abstract: The present disclosure relates to a resonant clock system having a driver component, a clock load capacitor, and a reconfigurable inductor array. The driver component generates a driven input signal. The clock load capacitor is configured to receive the driven input signal. The inductor array is configured to have an effective inductance according to a selected frequency. The inductor array also generates a resonant signal at the selected frequency using the effective inductance.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: September 30, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chan-Hong Chern, Tao Wen Chung, Chih-Chang Lin, Ming-Chieh Huang, Tsung-Ching Huang, Fu-Lung Hsueh
  • Patent number: 8736342
    Abstract: Described is an integrated circuit having a clock distribution network capable of transitioning from a non-resonant clock mode to a first resonant clock mode Transitions between clock modes or between various resonant clock frequencies are done gradually over a series of clock cycles. In example, when transitioning from a non-resonant clock mode to a first resonant clock mode, a strength of a clock sector driver is reduced over a series of clock cycles, and individual ones of a plurality of resonant switches associated with resonant circuits are modified in coordination with reducing the strength of the clock sector driver.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: May 27, 2014
    Assignee: International Business Machines Corporation
    Inventors: Thomas J. Bucelot, Alan Drake, Joshua D. Friedrich, Jason D. Hibbeler, Liang-Teck Pang, William R. Reohr, Phillip John Restle, Gregory S. Still, Michael G. R. Thomson
  • Publication number: 20140062566
    Abstract: A resonant clock network includes an inductor coupled to the clock network through a plurality of switches. When the clock network enters resonant mode, the turn-on of the switches to couple the inductor to the clock network is staggered. The clock network may be formed of multiple regions, each with its own inductor and switches. The turn-on of switches of each region may be staggered with respect to the turn-on off the switches of the other regions as well as to the turn-on of switches within a region. In addition to staggering the turn-on of the switches when entering the resonant mode, the switches may be turned off in a staggered manner when exiting the resonant mode of operation.
    Type: Application
    Filed: August 9, 2013
    Publication date: March 6, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Visvesh S. Sathe, Srikanth Arekapudi, Charles Ouyang, Kyle Viau
  • Publication number: 20130328608
    Abstract: An inductor architecture for resonant clock distribution networks is proposed. This architecture allows for the adjustment of the natural frequency of a resonant clock distribution network, so that it achieves energy-efficient operation at multiple clock frequencies. The proposed architecture is primarily targeted at the design of integrated inductors and exhibits relatively low area overheads. Such an architecture is generally applicable to semiconductor devices with multiple clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs. Moreover, it is applicable to the binning of semiconductor devices according to achievable performance levels.
    Type: Application
    Filed: December 13, 2012
    Publication date: December 12, 2013
    Applicant: Cyclos Semiconductor, Inc.
    Inventor: Cyclos Semiconductor, Inc.
  • Patent number: 8599937
    Abstract: Methods, systems, and devices are described for providing a communication system for handling pulse information. Embodiments of the invention provide a pulse shaping unit operable to avoid saturation of the pulse transformer, while being easily incorporated into IC processes. Some embodiments of the pulse shaping unit provide a two-to-three level driver unit for converting a two-level input voltage signal to a three-level driver signal for driving a pulse transformer. Other embodiments of the pulse shaping unit provide components configured to differentially drive a pulse transformer, effectively converting a two-level input voltage signal to a three-level driver signal.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: December 3, 2013
    Assignee: Microsemi Corporation
    Inventors: Sam Seiichiro Ochi, Charles Coleman
  • Patent number: 8466730
    Abstract: A semiconductor switching device having a switch circuit is disposed in an environment having a relatively low temperature, with a transformer disposed in an environment having a relatively high temperature. A conduction path extends from a first DC input terminal to a second DC input terminal. An inductor is inserted in a section from a first branch to a second branch in the conduction path, and the switch circuit is inserted in a portion other than the section of the conduction path. A first transmission wire of a transmission line electrically connects the first branch and a first input terminal of a primary winding to each other. A second transmission wire of the transmission line electrically connects the second branch and a second input terminal of the primary winding to each other, and where the excitation inductance of the primary winding is higher than the excitation inductance of the inductor.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: June 18, 2013
    Assignee: NGK Insulators, Ltd.
    Inventor: Tatsuya Terazawa
  • Publication number: 20130135024
    Abstract: Methods, systems, and devices are described for providing a communication system for handling pulse information. Embodiments of the invention provide a pulse shaping unit operable to avoid saturation of the pulse transformer, while being easily incorporated into IC processes. Some embodiments of the pulse shaping unit provide a two-to-three level driver unit for converting a two-level input voltage signal to a three-level driver signal for driving a pulse transformer. Other embodiments of the pulse shaping unit provide components configured to differentially drive a pulse transformer, effectively converting a two-level input voltage signal to a three-level driver signal.
    Type: Application
    Filed: December 18, 2012
    Publication date: May 30, 2013
    Applicant: MICROSEMI CORPORATION
    Inventor: Microsemi Corporation
  • Patent number: 8362813
    Abstract: A re-driver circuit has pre-driver, intermediate, and output stages. Pre-emphasis on the output is generated by the intermediate stage and injected into an output stage. The intermediate stage is a frequency-tuned amplifier that has an inductive-capacitive L-C tank circuit that is tuned to a desired frequency of the output. The intermediate stage does not directly drive the output stage. Instead, an on-chip coupling transformer couples the L-C tank circuit to the output stage. The coupling transformer has a first inductor that is part of the L-C tank circuit in the intermediate stage, and a second inductor that is part of the output stage. Mutual inductance between the first inductor and the second inductor inductively couple a pre-emphasis voltage onto the output. The magnitude of the pre-emphasis can be changed by adjusting current in the intermediate stage.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: January 29, 2013
    Assignee: Pericom Semiconductor Corp.
    Inventors: Tony Yeung, Michael Y. Zhang
  • Publication number: 20120286842
    Abstract: The semiconductor switching device of a switch circuit is disposed in an environment having a relatively low temperature, and a transformer is disposed in an environment having a relatively high temperature. A conduction path extends from a first DC input terminal to a second DC input terminal. An inductor is inserted in a section from a first branch to a second branch in the conduction path, and the switch circuit is inserted in a portion other than the section of the conduction path. A first transmission wire of a transmission line electrically connects the first branch and a first input terminal of a primary winding to each other. A second transmission wire of the transmission line electrically connects the second branch and a second input terminal of the primary winding to each other. The excitation inductance of the primary winding is higher than the excitation inductance of the inductor.
    Type: Application
    Filed: July 30, 2012
    Publication date: November 15, 2012
    Applicant: NGK Insulators, Ltd.
    Inventor: Tatsuya TERAZAWA
  • Publication number: 20120139604
    Abstract: A DC source generates a DC voltage between a positive electrode and a negative electrode. An inductive element and a parallel-connected switch-circuits unit are provided in a conductive path extending from the positive electrode to the negative electrode. The parallel-connected switch-circuits unit includes a plurality of switch circuits connected in parallel with one another. The switch circuit opens and closes the conductive path in accordance with a drive signal inputted from a drive circuit. The drive signal causes the plurality of switch circuits to successively perform an ON operation in which the conductive path is closed and then opened. A pulse voltage generation period in which a pulse voltage occurs in the inductive element continuously follows an ON period which is a duration from when the conductive path is closed to when the conductive path is opened.
    Type: Application
    Filed: November 29, 2011
    Publication date: June 7, 2012
    Applicant: NGK Insulators, Ltd.
    Inventors: Tatsuya TERAZAWA, Sozaburo HOTTA, Yuji WATANABE
  • Patent number: 8134398
    Abstract: A dummy transistor and a field effect transistor are arranged in a second direction. The dummy transistor is located at least at one end in a second direction.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: March 13, 2012
    Assignee: Elpida Memory, Inc.
    Inventor: Tomohiro Kadoya
  • Publication number: 20110193608
    Abstract: A square wave generator suitable for use with an electrosurgical device is provided. The square wave generator includes a voltage source configured to output a waveform and a comparator operatively coupled to the voltage source and configured to output energy in the form of a square wave. The generator may also include at least one sensor configured to sense an operational parameter of the energy outputted from the comparator and to provide a sensor signal corresponding thereto and a controller adapted to receive the at least one sensor signal and in response thereto control the voltage source.
    Type: Application
    Filed: February 5, 2010
    Publication date: August 11, 2011
    Inventor: James E. Krapohl
  • Patent number: 7903434
    Abstract: A power modulator comprises a plurality of switched pulse generator sections (22), a power supply arrangement (10), and a transformer arrangement (30). A switch control (24) is connected to said plurality of switched pulse generator sections (22) for providing control signals for turning on and/or turning off them. The switch control (24) is arranged to provide control signals for turning on and/or turning off switched pulse generator sections of a first subset at a first time instant and to provide control signals for turning on and/or turning off switched pulse generator sections of a second subset at a second time instant, different from the first time instant: The second subset is different from the first subset.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: March 8, 2011
    Assignee: Scandinova Systems AB
    Inventors: Walter Frederick John Crewson, Mikael Rolf Lindholm
  • Patent number: 7750748
    Abstract: A Method and an apparatus for distributing a clock signal are disclosed. The apparatus for distributing a clock signal includes a pair of flat plates, a variable inductor and a connection channel. The pair of flat plates includes a clock flat plate having at least one of clock signal extraction points and a reference flat plate arranged in parallel to the clock flat plate. The inductor is connected between the pair of flat plates, and the connection channel is configured to connect electrically the at least one of clock signal extraction points to an external circuit. The inductor may be adjusted to have an inductance for generating a resonance signal of a target frequency from the pair of flat plates.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: July 6, 2010
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Jongbae Park, Jeonghyeon Cho, Joungho Kim
  • Publication number: 20090224813
    Abstract: A pulse generator circuit may include a diode configured to operate as an opening switch, a tank circuit in series with the diode having an admittance that is switchable from a first value to a second value that is different from the first value, and a switching system configured to cause the tank circuit to switch between the first value and the second value. The diode may saturate in less than 100 nanoseconds. A saturable core transformer may operate as a switch that controls the opening of the diode. The pulse generator may generate a plurality of pulses, each having a length of no more than 3 nanoseconds and an amplitude of at least 1 kilovolt. Electrodes may be connected to the pulse generator to deliver the plurality of pulses to biological cells.
    Type: Application
    Filed: March 24, 2009
    Publication date: September 10, 2009
    Applicant: UNIVERSITY OF SOUTHERN CALIFORNIA
    Inventors: Andras Kuthi, Martin A. Gundersen
  • Publication number: 20090134128
    Abstract: An electrical pulse circuit is disclosed. The electrical pulse circuit is in connection with a first pair of electrodes defining a first gap between ends thereof and a second pair of electrodes defining a second gap between ends thereof. The second gap is disposed proximate to the first gap. The circuit includes a controller, a first electrical pulse source in power connection with the first pair of electrodes, and a second electrical pulse source in power connection with the second pair of electrodes. The first electrical pulse source is productive of a high voltage low current arc across the first gap in response to the controller and the second electrical pulse source is productive of a low voltage high current arc across the second gap in response to the controller and the high voltage arc.
    Type: Application
    Filed: November 27, 2007
    Publication date: May 28, 2009
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: George William Roscoe, Thangavelu Asokan, Adnan Kuttubudin Bohori
  • Patent number: 7075347
    Abstract: A multiphase resonant pulse generator (74) has N groups of N-1 switches (44,46,48) which, when activated, form N paths from a power supply (Vdc) to ground or a reference voltage. Here N is a positive integer greater than 2. Each of the paths includes an inductance (38,40,42) and N-1 switches. The signal outputs (X1, X2, X3) from each of the N paths are cross cooled to switches belonging to the other N-1 paths to activate or deactivate the groups of switches.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: July 11, 2006
    Assignee: University of Southern California
    Inventor: William C. Athas
  • Publication number: 20040257140
    Abstract: A driver circuit and a method drive an electronic component such as a laser diode with a variable electric current that is controlledly switched between at least two discrete current levels. The driver circuit includes circuit elements that damp ringing or initial transient oscillations that arise when switching the current between the current levels. The driver circuit includes a current mirror having a mirror amplification factor dependent on the frequency of the variable electric current. In order to counteract parasitic capacitances and/or inductances leading to the ringing, an inductance and/or a resistance are connected between the two series circuits making up the current mirror, a capacitance is connected parallel to a reference resistor of one of the series circuits, and/or a capacitance is connected across the voltage supply.
    Type: Application
    Filed: May 13, 2004
    Publication date: December 23, 2004
    Inventors: Guenther Bergmann, Erwin Dotzauer, Holger Vogelmann, Herbert Knotz, Wolfgang Wernig
  • Patent number: 6734715
    Abstract: A two terminal semiconductor circuit that can be used to replace the semiconductor diodes used as rectifiers in conventional DC power supply circuits. Three semiconductor circuits that can efficiently supply the DC currents required in both discrete and integrated circuits being operated at low DC supply voltages are disclosed. All three circuits have a forward or current conducting state and a reverse or non current conducting state similar to a conventional semiconductor diode.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: May 11, 2004
    Assignee: Lovoltech, Inc.
    Inventor: Ho-Yuan Yu
  • Patent number: 6650163
    Abstract: A system and integrated circuit (die) including a clock generator that includes an on-chip inductor and uses the inherent capacitance of the load to generate a sinusoidal clock signal. The inductor is connected between a current source and an inverting switch. The output of the switch is a substantially sinusoidal signal that connected directly to at least a portion of the clock driven circuits without intermediate buffering. In the preferred embodiment, the clock generator is a dual phase design that includes a pair of cross-coupled MOSFET's, a pair of solid state on-chip inductors, and a current source. Each of the on-chip inductors is connected between the current source and the drain of one of the MOSFET's. The outputs of the clock generator are provided directly to the clock inputs of at least a portion of the clock driven circuits on the die.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: November 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey L. Burns, Alan James Drake, Uttam Shyamalindu Ghoshal, Kevin John Nowka
  • Patent number: 6627879
    Abstract: One illustrative embodiment of a voltage pulser circuit comprises a voltage source producing a first voltage, and a thyratron tube having an anode coupled to the output of the voltage source, a cathode connected to a reference potential and a grid responsive to a grid control voltage to electrically connect the anode to the cathode to thereby cause the first thyratron tube to switch the anode between the first voltage and the reference potential. A pulse-shaping circuit may be connected to the anode of the tube to effectuate desired rise and fall times of the voltage pulses produced by the voltage pulser circuit. Such a voltage pulser circuit is particularly suited for use in connection with the operation of pulsed spectrometer instruments, such as time-of-flight mass spectrometers and the like.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: September 30, 2003
    Assignee: Advanced Research and Technology Institute, Inc.
    Inventors: James P. Reilly, Noah P. Christian
  • Publication number: 20030141917
    Abstract: Analog circuitry is disclosed for conditioning a signal from linear and rotary variable differential transformers having a primary winding, a pair of secondary windings and a movable core. The circuitry includes a unique closed loop negative feedback mechanism which, over time, adjusts the frequency of a voltage controlled oscillator so that a steady-state condition is achieved within the circuitry, whereby the total integrated value of the secondary winding voltages at an integrator remains equal to a reference voltage, thereby reducing the computational burden associated with solving an equation to determine the position of the movable core of the transformer.
    Type: Application
    Filed: January 29, 2002
    Publication date: July 31, 2003
    Inventor: Gary M. McBrien
  • Patent number: 6566936
    Abstract: A two terminal semiconductor circuit that can be used to replace the semiconductor diodes used as rectifiers in conventional DC power supply circuits. Three semiconductor circuits that can efficiently supply the DC currents required in both discrete and integrated circuits being operated at low DC supply voltages are disclosed. All three circuits have a forward or current conducting state and a reverse or non current conducting state similar to a conventional semiconductor diode. In a first configuration, an asymmetrical, enhancement mode, Junction Field Effect Transistor (JFET) is utilized as a two terminal device by connecting together the gate and source leads. The terminal voltage in the conducting state is considerably smaller than conventional semiconductor diodes. In a second configuration, an asymmetrical, enhancement mode, Junction Field Effect Transistor (JFET) is connected with a transformer such that the source and the drain serve as the two leads of a two terminal circuit.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: May 20, 2003
    Assignee: Lovoltech Inc.
    Inventor: Ho-Yuan Yu
  • Patent number: 6285231
    Abstract: A low power reference buffer includes a new amplifier design with very large transconductance and high frequency non-dominant poles and a triple bonding scheme to a large off-chip capacitor that avoids the problems related to the lead wire inductance.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: September 4, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Ion E. Opris, Laurence Douglas Lewicki
  • Patent number: 6229356
    Abstract: A stabilized gate driver which comprises a current source transformer (T) which comprises a primary and a secondary coil, and a gate driver unit (GD) which includes a positive auxiliary voltage input (Va+) and a negative auxiliary voltage input (Va−).
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: May 8, 2001
    Assignee: ABB Industry Oy
    Inventor: Erkki Miettinen
  • Patent number: 6107860
    Abstract: A gate driver for turning on and turning off a power switching device having a capacitive gate control input provides galvanic isolation between low-level control circuitry and the power switching device by means of a transformer having a controlled amount of effective secondary leakage inductance. The secondary of the transformer is connected in series with the gate control input and a first unidirectional conducting device. Driver logic on the secondary side of the transformer controls a gate switch which is connected across the gate control input.
    Type: Grant
    Filed: December 11, 1991
    Date of Patent: August 22, 2000
    Assignee: VLT Corporation
    Inventor: Patrizio Vinciarelli
  • Patent number: 6054886
    Abstract: A low power reference buffer includes a new amplifier design with very large transconductance and high frequency non-dominant poles and a triple bonding scheme to a large off-chip capacitor that avoids the problems related to the lead wire inductance.
    Type: Grant
    Filed: September 18, 1997
    Date of Patent: April 25, 2000
    Assignee: National Semiconductor Corporation
    Inventors: Ion E. Opris, Laurence Douglas Lewicki
  • Patent number: 6008681
    Abstract: A transformer driver circuit connected to the primary or "system" side of a transformer has a system clock connected to an input thereof the system clock having a frequency selected to constitute the desired clock frequency of a CODEC circuit located on the secondary or "line" side of the transformer. A signal line is connected to a point on the secondary of the transformer so as to tap the system clock frequency, whereby both the system clock and the source voltage for the CODEC are derived from the transformer's secondary.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: December 28, 1999
    Assignee: Conexant Systems, Inc.
    Inventors: Thomas Grey Beutler, Raphael Rahamim
  • Patent number: 5812012
    Abstract: A high efficiency resonant impedance transforming network for driving a high efficiency infrared LED and the associated method for decreasing the rise time and fall time of the LED to enable the LED to operate at higher frequencies than would ordinarily be possible. The resonant impedance transforming network includes an inductively coupled circuit that contains a primary winding and a secondary winding. The LED and at least one capacitor are coupled in parallel to the secondary winding of the transformer. The secondary winding charges the capacitors connected to it. During the rise time of the LED, the charge stored in the capacitors is discharged to the LED. The discharged charge supplements the current supplied by the secondary winding and the LED experiences a current spike during its rise time that significantly shortens the duration of the rise time. As the LED is conducting a space charge is contained within the LED.
    Type: Grant
    Filed: December 9, 1996
    Date of Patent: September 22, 1998
    Assignee: Lucent Technologies Inc.
    Inventor: Robert W. Jebens
  • Patent number: 5808495
    Abstract: According to the present invention, to drive a magnetron, a pulse voltage is applied to the gate electrode of a field effect transistor to make the field effect transistor conductive, so that a voltage stored in a storage condenser is discharged through the primary winding of a pulse transformer and the drain electrode-the source electrode of the field effect transistor. This discharge causes the voltage generated at the primary winding of the pulse transformer to be induced at the secondary winding of the pulse transformer. Thus, the magnetron connected to the secondary winding of the pulse transformer is driven.
    Type: Grant
    Filed: December 23, 1994
    Date of Patent: September 15, 1998
    Assignee: Furuno Electric Company, Limited
    Inventors: Hidetoshi Tanigaki, Takashi Yoshihara, Yoshihiro Ishii
  • Patent number: 5789959
    Abstract: Direct voltage and alternating voltage signals are decoupled from a first and a second pair of leads. The pairs of leads each carry an alternating voltage signal and they are subject to a direct voltage between them. A capacitive connection of the leads with the inputs of a signal receiving device allows decoupling of the alternative voltage signal. For decoupling one pole of the direct voltage signal, diodes are provided that are connected to the leads of the respective pair of leads. The diodes are each connected via a respective current source transistor to one terminal for the pole of the direct voltage. The control terminals of the current source transistors are controlled by the center tap of a voltage divider connected between the diodes. The embodiment for direct voltage decoupling is readily integratable.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: August 4, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventors: Franz Dielacher, Berndt Pilgram, Joerg Hauptmann
  • Patent number: 5760619
    Abstract: A piezoelectric transformer driver circuit can employ low voltage transistors. By alternately turning ON and OFF switching transistors b 3 and 4 depending upon gate signals GA and GB, a primary side of a piezoelectric transformer 7 is driven, and a secondary side is connected to a load 8. Inductors 1 and 2 are provided corresponding to transistors 3 and 4 for supplying a power source to corresponding transistors. Capacitors 10 and 11 respectively connected to one of the electrode of the inductors 1 and 2, respectively. The transistor 12 is turned ON upon completion of ON/OFF operation of the transistors 3 and 4, and the capacitors 10 and 11 are situated the other electrode at the ground voltage. Upon completion of ON/OFF operation of the transistor, a surge voltage to be generated by the inductors 1 and 2 can be restricted to permit use of the low voltage transistor. Thus, the overall circuit can be compact and low cost.
    Type: Grant
    Filed: August 26, 1996
    Date of Patent: June 2, 1998
    Assignee: NEC Corporation
    Inventor: Syuuji Yamaguchi
  • Patent number: 5736884
    Abstract: A device for generating a control signal voltage which is dependent on a resistance value of a variable resistor (8) includes a transformer (24) having a first winding (22) which is in series with the variable resistor and a rectifier diode (20). A current generator (32) coupled to a power source is coupled to a second winding (26) of the transformer and supplies it with a periodically interrupted current (I.sub.2). Upon each such interruption an exponentially decreasing current will flow through the first winding and also through the variable resistor (8). The peak value of the voltage drop produced by such current across that resistor is proportional to the resistance value thereof. It is also produced across the first winding (22) and is detected by the peak detector (62). That constitutes the control voltage (U.sub.c). Since the variable resistor is fully electrically isolated from the power source, it can be safely touched without shock hazard.
    Type: Grant
    Filed: February 15, 1996
    Date of Patent: April 7, 1998
    Assignee: U.S. Philips Corporation
    Inventors: Wilhelmus G. M. Ettes, Peter S. Viet, Johannes De Wit
  • Patent number: 5734285
    Abstract: An electronic circuit uses a resonance technique to reduce power consumption. The circuit contains function circuitry (14) that performs electronic functions. Certain elements (14F) of the function circuitry change state at a circuit frequency in response to one or more input signals, typically clock signals (CKR and CKR), that change state at the circuit frequency. A resonant system (50 or 140), which oscillates at the circuit frequency, is operated close to a resonant frequency so that the resonant system is largely in resonance. Oscillations of the resonance system typically include frequency components attributable to the fundamental resonance frequency and at least one other resonance frequency of the system. The resonant system is coupled to the function circuitry in order to help the indicated elements in changing state by overcoming parasitic capacitances and/or inductances associated with the function circuitry.
    Type: Grant
    Filed: August 15, 1996
    Date of Patent: March 31, 1998
    Inventor: Geoffrey P. Harvey
  • Patent number: 5708377
    Abstract: A low power dual sampler including two sampler switches with a step recovery diode (SRD) in each sampler switch. A local oscillator (LO) signal is provided through a power amplifier and transformer to baluns in the sampler switches without utilizing a power splitter, providing limited power loss to each balun. Each balun is configured to provide the LO signal to terminals of the SRD in a sampler switch without providing a termination to SRD impulses. Each sampler switch further includes series diodes connected across the terminals of each SRD switch with a junction of the series diodes connected to receive an RF signal, and the terminals of each SRD connected for providing an IF signal. To limit phase shift between SRD impulses, a temperature compensation circuit provides a DC offset voltage to each SRD.
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: January 13, 1998
    Assignee: Wiltron Company
    Inventor: Donald A. Bradley
  • Patent number: 5627482
    Abstract: More particularly, an electronic digital clock distribution system provides a plurality of working rank clock signals to respective ones of a plurality of logic circuits. Each clock signal has a predetermined frequency and each logic circuit requires a working rank clock signal having a predetermined level of electrical power. An oscillator produces a master clock signal at the predetermined frequency and at an electrical power level at least equal to the sum of the power requirements for all working rank clock signals of the plurality of logic circuits. An electronic splitter network is connected to the oscillator to splitting the master clock signal into the plurality of working rank clock signals.
    Type: Grant
    Filed: February 7, 1996
    Date of Patent: May 6, 1997
    Assignee: Ceridian Corporation
    Inventor: Michael J. Lamatsch
  • Patent number: 5594378
    Abstract: A fast, high voltage modulator circuit (10) has a drive circuit (12) apply input pulses to an on-section (88) and an off-section (90). The on-section (88) and off-section (90) having a common output (46). A pair of transformers (18,24) connects the drive circuit (12) to the on-section (88) and off-section (90) respectively. The drive circuit (12) applies a pulse to the first transformer (18), which transmits the pulse to a first MOSFET (32) closing the first MOSFET (32) to connect an input high voltage (40) to the output (46). The drive circuit (12) applies an off pulse to the second transformer (24), which transmits the pulse to second and third MOSFETS (62,82), closing the second MOSFET (62) and connecting a lower input voltage (68) to the output (46). Also, closing the third MOSFET (82) that shorts out a gate (34) of the first MOSFET (32), thus opening the first MOSFET (32). The entire circuit is modular, being stackable to switch higher voltages.
    Type: Grant
    Filed: April 13, 1995
    Date of Patent: January 14, 1997
    Inventors: Neils A. Kruse, Donald A. Brichta
  • Patent number: 5587680
    Abstract: A current pulse generator for generating current pulses on a conductor of controllable magnitude and duration based on a controlled pulse former. This pulse former is controlled by a controller in communication with a current sensor and operating a magnitude control signal generator as well as the pulse former, the magnitude signal generator also providing a selection signal to the pulse former.
    Type: Grant
    Filed: June 30, 1995
    Date of Patent: December 24, 1996
    Assignee: MTS Systems Corporation
    Inventor: Stephen W. Smith
  • Patent number: 5559463
    Abstract: High-efficiency clock generator circuits having single or complementary outputs for driving capacitive loads. The clock generator has therein at least one pair of complementary FET switches, coupled between the output of the generator and power supply rails, and an inductor. The generator is operated at a frequency approximately equal the resonant frequency of the inductor combined with the capacitance of the load. Energy normally stored in the load and dissipated in the FETs as in conventional clock generators is instead stored in the inductor and returned to the loads for reuse.
    Type: Grant
    Filed: April 18, 1994
    Date of Patent: September 24, 1996
    Assignee: Lucent Technologies Inc.
    Inventors: John S. Denker, Alexander G. Dickinson, Alan H. Kramer, Thomas R. Wik
  • Patent number: 5559478
    Abstract: A power source, inductor and clamping device coupled to generate substantially sinusoidal drive pulses. The power source has an output capacitance. The inductor is connected to the power source and to the load to be driven. In combination with the inductor, the output capacitance of the power source and the input capacitance of the load to be driven create a resonant circuit which generates a stream of substantially sinusoidal pulses. A clamping device is connected to the inductor and prevents the stream of pulses which are driving the load from exceeding a clamping level. In one preferred embodiment, a complementary set of clamping devices and inductors are used to generate a complementary set of pulse streams.
    Type: Grant
    Filed: July 17, 1995
    Date of Patent: September 24, 1996
    Assignee: University of Southern California
    Inventors: William C. Athas, Lars G. Svensson
  • Patent number: 5554948
    Abstract: An adaptive threshold circuit for use with a magnetic type of sensor that has a pick-up coil. The pick-up coil has an alternating voltage induced therein when a slot or tooth formed in a wheel rotates past the sensor. The circuit produces a square wave pulse voltage during positive half-cycles of the voltage generated in the pick-up coil. The circuit includes a digital to analog converter the input of which is connected to a selectable pulse counter. The pulse counter has a decrement function that allows for the count to be varied so as to accommodate sudden wheel decelerations. According to one embodiment, the counter may down count to reduce the count number. In accordance with a second embodiment, the counter may shift out one bit to perform a divide-by-two operation on the count number.
    Type: Grant
    Filed: May 31, 1994
    Date of Patent: September 10, 1996
    Assignee: Delco Electronics Corporation
    Inventors: Mark C. Hansen, Walter K. Kosiak
  • Patent number: 5550498
    Abstract: A charge mode pulse-width modulation control method and apparatus includes setting up a detector at a primary side of a transformer to detect a current and feeding back the detected current to a current apparatus to provide a current output; an integrator providing charge output with a voltage mode, where the charges are supplied by the integrator which takes the output current of current source to implement mathematical integration, and produce an output voltage and providing the output voltage to a main controller as a reference for deciding whether or not to switch a switch. The control system can prevent the transformer from reaching magnetic saturation and the feedback control current signal from generating noises.
    Type: Grant
    Filed: August 30, 1995
    Date of Patent: August 27, 1996
    Assignee: Industrial Technology Research Institute
    Inventors: Khang-Shen Kwan, Chean-Lung Tsay, Li-Ming Wu
  • Patent number: 5532631
    Abstract: A write driver for a magnetic transducer having a three-terminal inductive coil includes first and second voltage sources, a write current source, and a switching network having first and second switching transistors connected between the second voltage source and the respective first and second taps. The switching network responds to respective first and second inputs to switch the write current between respective first and second taps. Active pull-down subcircuits operate to alternately supply base current to the respective first and second switching transistors to charge parasitic capacitances of the respective switching transistors and to alternately sink base current from the respective switching transistors to discharge parasitic capacitances.
    Type: Grant
    Filed: November 17, 1994
    Date of Patent: July 2, 1996
    Assignee: VTC Inc.
    Inventors: Tuan V. Ngo, Raymond E. Barnett