Using Only Diode Active Elements Patents (Class 327/325)
  • Patent number: 5767724
    Abstract: An electronic clamping circuit is provided. In one preferred embodiment, the clamping circuit includes a pair of diodes connected in series, both having the same bias, which are shunted across a feedback path of a transimpedance amplifier circuit. A capacitor is connected to a node in-between the diodes and a potential (e.g., ground). The arrangement of the diodes and capacitor serve to keep the amplifier circuit's operation within its linear limits without severely degrading its bandwidth.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: June 16, 1998
    Assignee: Ametek Aerospace Products, Inc.
    Inventor: Helmar R. Steglich
  • Patent number: 5726598
    Abstract: A semiconductor device having a voltage sensing element is disclosed which allows reduction of power consumption in comparison with a conventional device and enables to obtain a sufficient output voltage to secure sensing accuracy even when an input voltage is small. In the voltage sensing element of the semiconductor device, an n.sup.- layer is formed on a front surface of a p.sup.- substrate. A p type diffused region and an n type diffused region are formed at a main surface of n.sup.- layer, spaced apart by a prescribed distance. An electrode is formed on p type diffused region, and an electrode is formed on n type diffused region. An electrode is formed on a rear surface of p.sup.- substrate. P.sup.- substrate and n.sup.- layer constitute a diode in a reversely biased state. As a result, power consumption is reduced in comparison with a conventional voltage dividing resistor circuit.
    Type: Grant
    Filed: November 4, 1996
    Date of Patent: March 10, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomohide Terashima, Masanori Fukunaga
  • Patent number: 5714900
    Abstract: An electrical overstress power protection device consists of a diode limiter array and an input and output electrical matching network. All of these functions are integrated monolithically on a single semiconductor chip which allows ease of use, small size, and high frequency operation. The device is used to protect instrument input and output circuitry from damage.
    Type: Grant
    Filed: April 12, 1996
    Date of Patent: February 3, 1998
    Assignee: Hewlett-Packard Company
    Inventor: Eric R. Ehlers
  • Patent number: 5701060
    Abstract: A laser diode driver chip is disclosed which has a circuit to substantially reduce a ringing on a laser diode driving current generated by the laser diode driver chip. This invention identifies that the ringing on the laser diode driving current is caused by three different resonances which are coupled together. This invention also suggests a model for the sources of these three different resonances and identifies the three main nodes which are common between the sources of resonances. Finally, this invention places a damping circuit between the three main nodes of the laser diode driver to substantially reduce the ringing on the laser diode driving current.
    Type: Grant
    Filed: May 3, 1996
    Date of Patent: December 23, 1997
    Assignee: Xerox Corporation
    Inventors: Steven A. Buhler, Hamid T. Bahramian
  • Patent number: 5663671
    Abstract: An electronic clamping circuit is provided in one preferred embodiment, the clamping circuit includes a pair of series-connected diodes, both having the same bias, which are shunted across a feedback path of a transimpedance amplifier circuit. A capacitive element is connected to a node in-between the diodes and a potential (e.g., ground). The arrangement of the diodes and capacitive element serve to keep the amplifier circuit's operation within its linear limits without severely degrading its bandwidth.
    Type: Grant
    Filed: February 1, 1996
    Date of Patent: September 2, 1997
    Assignee: Ametek Aerospace Products, Inc.
    Inventor: Helmar R. Steglich
  • Patent number: 5578956
    Abstract: The invention concerns a circuit for limiting the maximum current to be supplied to a load through a power MOS, being an improvement of the limiting circuitry which uses an equalizing capacitor. The addition of circuitry with a one-way current flow between a terminal of the equalizing capacitor and the gate terminal of the power MOS is effective to lower the voltage across the capacitor and to speed up its charging process, thereby making the current limiting action expected from the circuit a timely one. The circuitry which limits current flow to one direction may include a second MOS of the same type as the power MOS. In this way, any deviations of the power MOS from its designed operation, e.g. due to its manufacturing process variation and thermal drift phenomena, can also be compensated.
    Type: Grant
    Filed: March 14, 1996
    Date of Patent: November 26, 1996
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Giorgio Rossi, Fabio Marchioo, Liana Luoni, Franco Cocetta
  • Patent number: 5465068
    Abstract: An excitation stage having a predetermined number of semiconductor-based amplification modules parallel-connected at the input of a coupling device to couple the outputs of the amplification modules to the input of the transmission tube, as well as a diode-based limiter device positioned inside the coupling device to limit the pulses that short-circuit electrodes of the transmission tube appearing at the output of the coupling device.
    Type: Grant
    Filed: February 21, 1995
    Date of Patent: November 7, 1995
    Assignee: Thomson-CSF
    Inventor: Bernard Darges
  • Patent number: 5391931
    Abstract: An arrangement for protecting an integrated circuit device (11) against latch up during a nuclear event comprising a capacitance (15) and a switch (17) connected in parallel across the power supply lines (13) of the device. When the power supply lines are connected to a power supply (19) the capacitance stores energy sufficient to supply necessary operating currents to the device during its normal operation. The switch is arranged so that, under a transient gamma pulse incident thereon during a nuclear event, its impedance is set to a low value at such a rate that the energy stored by the capacitance is discharged through the switch and the voltage applied to the device via the power supply lines is pulled down to such a level and at such a rate as to prevent transient gamma pulse induced latch-up in the device.
    Type: Grant
    Filed: June 22, 1992
    Date of Patent: February 21, 1995
    Assignee: GEC-Marconi Limited
    Inventor: David J. Larner
  • Patent number: 5378937
    Abstract: To compensate for nonlinear signal distortions in analog optical communication transmission systems, caused by laser chirps and the chromatic dispersion of the optical fiber, an equalizer in the form of an LC component is known, whose capacitance is formed by a variable capacitance diode. However, the known equalizer functions only when the capacitance has the proper polarity, which cannot be predicted because of possible polarity inversion during signal transmission. According to the invention, the variable capacitance diode (C.sub.a) has another variable capacitance diode (C.sub.b), with the opposite polarity, connected in parallel, and is equally biased in the high-resistance direction. By adjusting the bias voltage of both capacitances, it can be achieved that one of the two variable capacitance diodes takes over the equalization function, and the other is practically inoperative.
    Type: Grant
    Filed: June 29, 1992
    Date of Patent: January 3, 1995
    Assignee: Alcatel N.V.
    Inventors: Rolf Heidemann, Heinz Krimmel, Bernhard Junginger