Abstract: A log circuit receives an operated current signal and a reference current signal at respective inputs and comprises an operand log circuit including a first bipolar semiconductor device and being configured to generate a first logarithmized signal on the basis of the operand current signal, a reference log circuit including a second bipolar semiconductor device and being configured to generate a second logarithmized signal on the basis of the reference current signal, and a differential-amplifier circuit receiving the first logarithmized signal and the second logarithmized signal, and outputting a differential-amplifier output signal in dependency on the first logarithmized signal and the second logarithmized signal.

Abstract: A wireless communication system uses a transmission power detection circuit. The transmission power detection circuit has excellent linearity of detection output for transmission output power and can obtain detection output not having temperature dependence. The transmission power detection circuit has a rectifying detection part that includes plural amplifiers connected in series and obtains detection output by taking out rectified outputs from emitters of input transistors of amplifiers of individual stages and synthesizing them. A compensation voltage generating circuit has a dummy amplifier having a construction similar to the amplifiers constituting the rectifying detection part and a coefficient circuit that changes output of the dummy amplifier at a specified ratio, and generates voltage for compensating temperature characteristics.

Abstract: A geometric ladder circuit produces a transfer function having substantially uniform steps measured in dB. Where the ladder has a plurality of substantially identical resistor rungs of a first resistance, one stile that is a conductor connecting the rungs, and another having a series of substantially identical resistors of a second resistance, then for identical currents injected at different rungs, the output signal at an end of the ladder is attenuated by a number of substantially equal steps, one for each rung between input and output. For a ladder with a base rung R, an output at an end opposite the base rung, stile resistors of resistance ?R, and other rungs all of resistance (1+(1/?))R, the step size is 20 log10 (1+?).

Abstract: One embodiment of the present invention is directed to an apparatus for reducing errors affecting the intercept of a logarithmic device, the apparatus including a first switching device coupled to an input of the logarithmic device. The first switching device for switches the input of the logarithmic device between an input signal and a reference signal. The apparatus further includes a polarity switching device coupled to an output of the logarithmic device. The polarity switching device is configured to switch the polarity of an output signal of the logarithmic device when the logarithmic device is receiving one of the input signal and the reference signal. The apparatus further includes a low pass filter coupled to the polarity switching device.

Abstract: A logarithmic amplifier is compensated by a feedback loop. The feedback loop may control a series of detector cells in response to an output from one or more of the detector cells. The feedback loop may be used to provide frequency compensation to the log amp by adjusting the bias currents to the detector cells. One detector cell may be arranged to generate a limiting signal while another detector cell is arranged to generate a zero signal. By arranging the feedback loop to adjust the bias cell so as to maintain the difference between the limit signal and the zero signal at a constant value, the output swing of the detector cells is held constant, thereby stabilizing the slope of the log amp.

Abstract: The intercept of a logarithmic amplifier is temperature stabilized by generating a signal having the form H log H where H is a function of temperature such as T/T0. The first H factor is cancelled, thereby generating a correction signal having the form Y log H. The cancellation may be implemented with a transconductance cell having a hyperbolic tangent function. The H log H function may be generated by a pair of junctions biased by one temperature-stable current and one temperature-dependent current. The pair of junctions and the transconductance cell may be coupled together in a translinear loop. A user-accessible terminal may allow adjustment of the correction signal for different operating frequencies.

Abstract: A signal waveform detection circuit includes an amplifier circuit and a comparing circuit. The amplifier circuit has differential amplifiers connected in series. Each of the differential amplifiers has a common connection point. The comparing circuit is connected to the common connection points of the amplifier circuit. The comparing circuit includes comparing units connected to one of the differential amplifiers. Each of the comparing units has a threshold voltage generating circuit for generating signals. Each signal has a threshold voltage that is set between a maximum threshold voltage of a signal output from the corresponding differential amplifier during a maximum amplitude output and a minimum threshold voltage of a signal output from the corresponding differential amplifier during a minimum amplitude output. The comparing unit further has a comparator comparing a voltage at the common connection point with the threshold voltage.

Abstract: A demodulating logarithmic amplifier rectifies a radio frequency signal prior to amplification through progressive stages. A full wave linear or squaring rectifier receives a waveform signal at the input and provides a rectified signal that is proportional to an envelope or a square of the envelope of the waveform signal at the output. The rectified signal is then fed to a series of limiting amplifier stages where the signal is progressively amplified. After each individual amplifier stage, the partially amplified signal is passed through a voltage-to-current converter to create a current signal. All the current signals are subsequently summed to produce an amplified current output signal that is representative of the logarithm of the envelope of the input signal.

Abstract: Connected to a power element having a first electrode, a second electrode, and a control electrode, a power element protection circuit detects a voltage between the first and second electrodes of the power element and the current flowing through the power element, then logarithmically converts a current proportional to the detected voltage and a current proportional to the detected current individually, then adds the results together, then subtracts a predetermined value from the sum, then antilogarithmically converts the result with an antilogarithmic converter, and then limits the driving of the power element based on the output of the antilogarithmic converter.

Abstract: A conversionless direct detection system for detecting signals having a very large dynamic range, with a virtually unlimited bandwidth utilizes a successive detection approach having successive log amplifier gain stages, with each gain stage involving simultaneous use of an RF transistor to perform both limiting and logging functions. FET transistors are used to extend the operating range beyond 200 GHz, with the self-bias in combination with a drain resistor limiting voltage and current swings. A log video output is tapped off the source resistor and is coupled to a buffering stage, with the outputs of the buffering stage summed to accommodate very large dynamic range swings of the input voltage, with successive stages saturating at different points to operate at different and contiguous regions, thus to provide the wide dynamic range. The limited RF signal is tapped off the drain resistor, with the stages connected in series to provide the limited RF output as the output of the last stage.

Abstract: A high speed, high sensitivity post amplifier as described herein includes a digitally-controlled DC offset cancellation feature. The amplifier circuit is configured to provide DC offset voltage levels in response to a digital control signal, where the digital control signal is generated based upon a data error metric such as bit error rate. The AC signal path and the DC offset adjustment signal path in the amplifier circuit are separated to facilitate operation with normal power supply voltages, and to achieve low power operation.

Abstract: An integrated electronic circuit includes a plurality of active circuits connected together in cascade. A feedback loop is between an output of a last active circuit and an input of a first active circuit so that the plurality of active devices function as a non-linear device, such as an inductor. The integrated electronic circuit may be integrated or used in association with a circuit network including other non-linear devices.

Abstract: An apparatus and method are disclosed which provide a substantially linear relationship between an input signal, such as an input voltage or current, and a predetermined parameter, such as a frequency response or capacitance of a parallel plate capacitor or varactor. The apparatus comprises a square root converter and a logarithmic generator. The square root converter is adapted to provide a square root signal which is substantially proportional to a square root of the input signal. In the various embodiments, the logarithmic generator is adapted to provide an applied signal which is substantially proportional to a sum of a logarithm of the input signal plus the square root of the input signal. The applied signal is a pre-distorted signal which generally has a non-linear relation to the predetermined parameter and which, when applied, allows the predetermined parameter to vary substantially linearly with the input signal.

Abstract: An integrated electronic circuit includes a plurality of active circuits connected together in cascade. A feedback loop is between an output of a last active circuit and an input of a first active circuit so that the plurality of active devices function as a non-linear device, such as a capacitor. The integrated electronic circuit may be integrated or used in association with a circuit network including other non-linear devices.

Abstract: The present invention overcomes the disadvantages of the prior art and provides a new temperature compensation trimming technique. Temperature compensated output is provided in a logarithmic voltage output device by the steps of: measuring the resistance of a first resistor, a second resistor, and a third resistor at a first temperature; measuring again the resistances of the first resistor, second resistor, and third resistor at a second temperature; and trimming the drift of the third resistor according to a calculated temperature compensation trim.

Abstract: A voltage controlled low pass filter comprising first and second circuits connected in series between a filter input and a filter output and a third circuit for adding a DC bias voltage to the filter input with AC signals to be filtered. The first circuit has a gain inversely related to the DC bias voltage and is operative to convert any signal applied to the filter input into a first circuit output signal which is a logarithmic function of the applied signal. The second circuit has a gain directly related to the DC bias voltage such that the overall gain of the first and second circuits is unity. The second circuit also has a bandwidth which is inversely related to the gain of the second circuit, and is operative to convert the first circuit output signal into a signal at the filter output which is an exponential function of the first circuit output signal.

Abstract: A parallel-summation logarithmic amplifier is described that uses a novel topology of cascaded and parallel amplifiers to achieve extremely high bandwidth. Included in the topology is a unique delay matching scheme for logarithmic amplifiers that is amenable to fabrication in integrated circuit form. The result is flat group delay over broad frequency ranges and different power levels. The resulting log amplifier is suitable for radar applications and for use in high data rate fiber-optic networks. Also described is a unique design process that yields a set of amplifier gains that closely approximate a logarithm. Also described is the novel idea of using a parallel feedback amplifier (PFA) in piecewise-approximate logarithmic amplifiers. This innovation allows for the design of broadband amplifiers with significantly different gains and similar phase characteristics, which is extremely useful when designing high-frequency logarithmic amplifiers.

Abstract: A circuit implemented in a MOS device for operation with an internally non-linear topology, the circuit including at least first and second voltage ports, at least one voltage comparator for comparing the voltage at at least one of the voltage ports with a reference voltage, at least one of a current source or current sink for selectively sourcing current to or sinking current from the at least one of the voltage ports to maintain the voltage thereat in a voltage frame, thereby providing the circuit with a single stable dc operating point.

Abstract: Two variations of a continuous-time instantaneous companding filter are integrated in a 25 GHz bipolar process. Their −3 dB frequencies are tunable in the ranges of 1-30 MHz and 30-100 MHz. The dc gains are controllable up to 10 dB. The measured dynamic ranges for a 1% total harmonic distorsion are 62.5 dB and 50 dB, for the 30 MHz and 100 MHz filters respectively. At maximum cutoff frequencies, the filters dissipate 6.5 mW from a 1.2 V supply. The filters are simple, common-mode interference-resistant, class AB log-domain integrators, suitable for implementation in low-cost bipolar processes. They are suitable for realizing low-voltage filters with reasonable linearity and signal-to-noise ratio. ALL-NPN low distortion input and output interface stages can be added to the integrators. The filters can be used to realized high-frequency programmable filters.

Abstract: A Signal Conditioning Filter (SCF) and a Signal Integrity Unit (SIU) address the coupled problem of equalization and noise filtering in order to improve signal fidelity for decoding. Specifically, a received signal can be filtered in a manner to optimize the signal fidelity even in the presence of both significant (large magnitudes of) ISI and noise. The present invention can provide an adaptive method that continuously monitors a signal fidelity measure. Monitoring the fidelity of a multilevel signal can be performed by external means such as by the SIU. A received signal y(t) can be “conditioned” by application of a filter with an electronically adjustable impulse response g(t). A resulting output z(t) can then be interrogated to characterize the quality of the conditioned signal. This fidelity measure q(t) can be used to adjust the filter response to maximize the fidelity measure of the conditioned signal.

Abstract: An electrical-supply-free MOS integrated circuit is described. The circuit comprises: a first semiconductor device having a first current terminal, a first input voltage terminal, and a first common terminal, said semiconductor device having a voltage between said first input voltage terminal and said first common terminal that controls a current flow leaving said first current terminal; and a first opto-electronic device having a first anode connected to said first current terminal and a first cathode connected to a ground to convert an input of incident light into an electrical signal, said first opto-electronic device having photodiode and photovoltaic cell capabilities; wherein a voltage is set between a node of said first current terminal and said first common terminal. The principle of the circuit operation can be used for developing optically controlled electrical-supply-free very large scale integrated circuits (VLSI) at low-cost.

Abstract: A voltage mode logarithmic amplifier comprising: a first gain stage for providing an amplified rectified voltage signal responsive to an input voltage signal; a second gain stage for providing a further amplified rectified signal responsive to the input voltage signal; and an output node for producing an output voltage signal responsive to the amplified rectified voltage signal and the further amplified rectified voltage signal. The amplifier further includes: a self-biased replica stage operative to provide a voltage offset signal responsive to temperature; and a differential amplifier operative to receive the voltage offset signal and provide a temperature corrected output voltage signal responsive to the input voltage signal, wherein the differential amplifier is communicatively coupled to both the first gain stage and the second gain stage.

Abstract: An analog multiplier 11 raises a base reference voltage “Vref0” to the nth power so that a reference voltage “Vref1” is produced. Analog multipliers 12 and 13 sequentially raise the reference voltage “Vref1” to the nth power so that reference voltages “Vref2” and “Vref3” are produced. Switch groups 38-41 control the reference voltages “Vref0” to “Vref3”, which are then sent to an analog multiplier 14 together with an input voltage “Vin”. A comparator 14 sequentially compares a multiplication result “Vx” of the multiplier 14 with a voltage “Vout” outputted from a sensor circuit 2, so that a digital output value “Dout” is produced. The analog multiplier 14 is set as appropriate.

Abstract: Plurality of linear amplifiers A1, A2, and A3, input signal is applied to these linear amplifiers A1, A2, and A3 and is applied to a comparator 30 carrying out level detection, and only any one of the linear amplifiers is switched to operate corresponding to input signal level.

Abstract: In order to provide a circuit arrangement (100) for generating and amplifying a DC signal, referred to as level voltage, whose value is essentially proportional to the logarithm of the voltage amplitude of the input signal, the circuit arrangement comprising an amplifier circuit having at least two amplifier stages (10; 20; 30), it is proposed that at least a differential amplifier stage (40), in particular non-negatively fed back, is arranged parallel to the last amplifier stage (30), particularly parallel to the collector circuits of the last amplifier stage (30), the differential amplifier stage (40) precedes at least a multiplier stage (50) for multiplying the output signals of the differential amplifier stage (40), for generating two differential amplifier output signals which are to be multiplied by each other, and alternatively to the differential amplifier (40), the collector currents of the transistors (36, 38) of the rectifier circuit (35) of the last amplifier stage (30) are used, and at least a cu

Abstract: Method and apparatus are provided for processing a wide dynamic range analog signal which comprises a compressive nonlinear transfer function responsive to the average amplitude of the signal without feedback along the signal path. The invention employs frequency selective filtering and expansion of the compressed signal. The invention is applicable to any analog signal system having a plurality of channels carrying related signal information.

Abstract: A voltage mode logarithmic amplifier comprising: a first gain stage for providing an amplified rectified voltage signal responsive to an input voltage signal; a second gain stage for providing a further amplified rectified signal responsive to the input voltage signal; and an output node for producing an output voltage signal responsive to the amplified rectified voltage signal and the further amplified rectified voltage signal. The amplifier further includes: a self-biased replica stage operative to provide a voltage offset signal responsive to temperature; and a differential amplifier operative to receive the voltage offset signal and provide a temperature corrected output voltage signal responsive to the input voltage signal, wherein the differential amplifier is communicatively coupled to both the first gain stage and the second gain stage.

Abstract: A parallel-summation logarithmic amplifier is described that uses a novel topology of cascaded and parallel amplifiers to achieve extremely high bandwidth. Included in the topology is a unique delay matching scheme for logarithmic amplifiers that is amenable to fabrication in integrated circuit form. The result is flat group delay over broad frequency ranges and different power levels. The resulting log amplifier is suitable for radar applications and for use in high data rate fiber-optic networks. Also described is a unique design process that yields a set of amplifier gains that closely approximate a logarithm. Also described is the novel idea of using a parallel feedback amplifier (PFA) in piecewise-approximate logarithmic amplifiers. This innovation allows for the design of broadband amplifiers with significantly different gains and similar phase characteristics, which is extremely useful when designing high-frequency logarithmic amplifiers.

Abstract: A temperature-compensated monolithic logarithmic amplifier includes a logarithmic amplifier cell (26) configured to produce a logarithmic voltage signal (V3) representative of a difference between a first voltage (V1) developed across a first PN junction device (D1) in response to an input signal (Iin) and a second voltage (V2) developed across a second PN junction device (D2) in response to a reference signal (Iref) and an output circuit (36) including an output amplifier (19), a temperature-dependent first resistive element (R1) having a positive temperature coefficient, and a second resistive element (R2). The output circuit (36) produces a temperature-compensated output signal (Vout) in response to the logarithmic voltage signal (V3). The first resistive element (R1) is composed of conductive aluminum or aluminum alloy interconnection metallization that also is utilized as interconnection metallization throughout the monolithic logarithmic amplifier.

Abstract: Plurality of linear amplifiers A1, A2, and A3, input signal is applied to these linear amplifiers A1, A2, and A3 and is applied to a comparator 30 carrying out level detection, and only any one of the linear amplifiers is switched to operate corresponding to input signal level.

Abstract: A circuit 17 for interfacing with a sensor 18 having a sensor input current and a modulated sensor current signal corresponding to a sensed condition. A control module 20 is coupled to the sensor 18 and receives the sensor current signal. The control module 20 converts the sensor current signal to a modulated signal having a pulse width with a duration corresponding to the sensed condition. The control module 20 counts a time corresponding to the pulse width. The time corresponds to the sensed condition.

Abstract: A rain sensor including light emitting means 7 for guiding light into a window glass so as to undergo total internal reflection within the window glass, light receiving means 8 for receiving the light which has undergone total internal reflection within the window glass, and means for detecting the amount of water drops adhered to or present upon the window glass so as to output a driving signal to a wiper driver apparatus 20, a difference signal corresponding to a difference between a preset reference value and an output signal of an amplifier circuit 17 of the light receiving means is fed back to the amplifier 17, and an amplification factor of the amplifier circuit 17 is adjusted so as to maintain the output signal thereof at a constant value irrespective of the operation condition of the wiper, when electrical power is applied to the rain sensor 2.

Abstract: The invention relates to a logarithmic amplifier for reading an input current (Iin) or input voltage (Uin) and for giving out an output voltage (Uout), said logarithmic amplifier including a transistor (T1) or diode for generating logarithmic amplification, said transistor (T1) or diode including an inner serial resistance. According to the invention a compensation voltage (UC) is arranged to be subtracted from the output voltage (Uout) to compensate for voltage drop over the inner serial resistance.

Abstract: A power switching circuit with reduced interference radiation includes at least one pair of low-side and high-side MOS power transistors, between which a load resistor is connected. One or at least one of the low-side MOS power transistors is connected to a drive circuit having a divider for dividing a difference between a maximum output voltage of the MOS power transistor and an instantaneous output voltage at the load resistor as a dividend, by a maximum output voltage of the MOS power transistor as a divisor, and a level converter for generating a drive voltage for the MOS power transistor. The drive voltage is proportional to the quotient.

Abstract: Two variations of a continuous-time instantaneous companding filter are disclosed. The filters are integrated in a 25 GHz bipolar process. Their −3 dB frequencies are tunable in the ranges of 1-30 MHz and 30-100 MHz. The dc gains are controllable up to 10 dB. The measured dynamic ranges for a 1% total harmonic distorsion are 62.5 dB and 50 dB, for the 30 MHz and 100 MHz filters respectively. At maximum cutoff frequencies, the filters dissipate 6.5 mW from a 1.2 V supply. Disclosed is a simple, common-mode interference-resistant, class AB log-domain integrator, suitable for implementation in low-cost bipolar processes. It is suitable for realizing low-voltage filters with reasonable linearity and signal-to-noise ratio. Compatible all-NPN low-distortion input and output interface stages are also disclosed. Also described is the potential of all the circuitry disclosed to realizing high-frequency programmable filters.

Abstract: A precision-controlled logarithmic amplifier having reduced interference parameters. In an embodiment, the invention comprises a logarithmic amplifier having an output signal providing a logarithmic representation of an input signal. A precision-control circuit is coupled to the logarithmic amplifier. The precision-control circuit produces a bias and a saturation current that act to reduce the effects of bias and saturation currents that are produced in the logarithmic amplifier and affect the output signal of the logarithmic amplifier.

Abstract: An improved logarithmic amplifier (100) and method in which a signal at an output (106) is logarithmic with respect to the voltage supplied at a gain control input (102). The logarithmic amplifier (100) includes a first amplifier stage (110) and a second amplifier stage (130) which are coupled together by a current mirror stage (120). Alternative embodiments of logarithmic amplifier (200) and (300) include different biasing methods for biasing the second amplifier stage (130).

Abstract: A logarithmically controlled attenuator circuit includes a resistive attenuator having a single series resistive element connected between an input conductor and an output conductor, and a plurality of parallel resistive elements each having a first terminal connected to the output conductor. A plurality of switching elements controllably couple the parallel resistive elements, respectively, between the output conductor and a first reference voltage conductor. A control circuit produces successive gradually increasing and then leveling off analog control signals on the control terminals of successive switching elements, respectively. A programmable implementation includes a first group of parallel resistive elements (Q1,3,5 . . . ) each having a first terminal connected to the output conductor (12), and a second group of parallel resistive elements (Q2,4,6 . . . ) each having a first terminal connected to the output conductor (12).

Abstract: Variable gain amplifiers and methods having a logarithmic gain control function are disclosed. The variable gain amplifiers have a first inverse hyperbolic tangent stage having a current input responsive to a gain control signal, a second inverse hyperbolic tangent stage responsive to the output of the first hyperbolic tangent stage, and a Gilbert cell providing an amplifier output responsive to an amplifier input with a gain responsive to the output of the second inverse hyperbolic stage. The inverse hyperbolic gain response is altered to closely approximate the desired logarithmic characteristic by including a circuit responsive to the gain control signal to provide a current input to the first inverse hyperbolic stage which is nonlinear with respect to the gain control signal.

Abstract: A power rising electronic device receives an input current and supplies an output current that is a function of a power of the input current having a relative whole-number exponent. The power rising electronic device includes a plurality of diodes equal to an absolute value of the relative whole-number exponent. The plurality of diodes are connected in series with one another to produce from the input current an input voltage that is a logarithmic function of a power of the input current. The electronic device further includes an output junction element, and a circuit for applying a voltage that is a function of the input voltage to the output junction element for producing a current that is an exponential function of the voltage applied thereto. The output current of the power rising electronic device is derived from the current produced in the output junction element.

Abstract: Log-linear variable gain amplifiers and amplifier control apparatus and methods providing temperature compensated log-linear gain characteristics with a wide range of control for a current steered variable gain amplifier. The invention provides the sum of scaled linear and exponential terms, proportional to absolute temperature and responsive to an input control voltage. The sum of these terms is applied to a current steered variable gain amplifier to provide the desired log-linear variable gain control. Various embodiments are disclosed.

Abstract: A progressive-compression logarithmic amplifier, amplifier stage, and method for increasing the bandwidth of a differential-input progressive-compression logarithmic amplifier are disclosed. The amplifier stage provides positive gain increases for decreases in the impedance of the load driven by the stage. When multiple amplifier stages of this type are cascaded, the gain increase in each stage compensates for high-frequency roll-off due to the input capacitance of the following stage. The compensating is activated by the roll-off effect itself, making the device self-compensating. This is preferably accomplished by providing a drive current sensing path that makes each node of the stage's differential output respond in opposition to the drive current drawn at the stage's other differential output--that is, an increase in drive current at one output node drops the voltage at the other output node.

Abstract: In a fully integrated logarithmic amplifier, an input current is fed via a diode, and in a reference current branch parallel thereto, a constant current flows through a similar diode. A voltage divider forms of the differential voltage between the two diodes a partial voltage on a variable resistor of the voltage divider, which is processed by a differential amplifier for forming the output signal. Parallel to the two current branches mentioned, there is provided an additional current branch having a constant current source and a diode. The differential voltage between the diode of the reference current branch and the diode in the additional current branch is also divided by a voltage divider. A differential amplifier forms of the voltage on the variable resistor of the voltage divider an error signal which changes the variable resistance from which the differential amplifier has formed the error signal as well as the resistance fo the variable resistor of which the output signal is formed.

Abstract: A logarithmic amplifier is provided with a calibration circuit to allow for current measurement over a wide-dynamic range that includes extremely low current levels in a manner which mitigates or eliminates sensitivity to temperature. Calibration currents are generated by application of a series of voltage ramps of selectable slope to a capacitor. This provides a set of known current levels, selectable over a range of decades, for periodic calibration of the logarithmic amplifier. The selectable calibration currents can also be advantageously used to provide a fixed, known bias current to the input of the logarithmic amplifier to improve the response time of the amplifier for measurement of small sensor currents on the order of 10-100 fA.

Abstract: A square-law clamping circuit (99, 120) sinks a current from an input/output terminal proportional to a square of a difference between a voltage thereon and a reference voltage. A first MOS transistor (130) has a source for receiving the reference voltage, a gate, and a drain coupled to its gate. A current source (134) coupled to the drain of the first MOS transistor (130) sources a predetermined current therefrom. A second MOS transistor (132) has a source providing the input/output terminal (100, 121), a gate coupled to the drain of the first MOS transistor (130), and a drain. A current sink (135) coupled to the drain of the second MOS transistor (132) sinks a current therefrom.

Abstract: A circuit and method for generating a generally logarithmic transfer function based upon switching signals. The circuit includes a plurality of transistors and a switch operatively connected to each transistor in the programmable set. A line is in communication with each switch for carrying switching signals thereto thereby selecting which of the transistors will contribute to the generally logarithmic function. Preferably, the circuit is a portion of a programmable gain amplifier, and a digital code controls the gain. The gain can be generally logarithmic as a result of which transistors which are selected to contribute to the generally logarithmic transfer function. For example, there may be a plurality of sets of transistors where the values of the transistors in each set are such that when all the transistors of the set are selected to contribute to the generally logarithmic gain, the set of transistors provides a gain having a value approaching m.

Abstract: A low-cost microstrip phase detector that is photo-etched onto a circuit board is disclosed. The phase detector is used to detect the phase difference between two high-power radio frequency (RF) signals. One RF signal enters a delay line causing the signal to experience a 180.degree. phase shift. The other RF signal is not phase shifted. Both RF signals are then input into a Wilkinson combiner circuit. The structure of the Wilkinson combiner is such that there is no voltage output from the combiner when the two input signals are exactly 180.degree. out of phase. When the original signals (before the delay line) are in-phase, there is no voltage output from the combiner. However, when the original signals are out-of-phase to begin with, they do not enter the Wilkinson combiner with a 180.degree. phase difference. Instead, the phase difference is greater than or less than 180.degree., depending on whether one input signal leads or lags the other input signal.

Abstract: A logarithmic attenuator circuit includes a resistive attenuator in which the series resistors are P-channel MOSFETs with gate electrodes connected to V.sub.DD and the parallel resistors are P-channel MOSFETs which also function as switches. A control circuit (8B) produces a plurality of successive control signals (V1,2 . . . 10) on the gate electrodes of the successive MOSFETs which functions as switches in response to a gain control signal (V.sub.

Abstract: A circuit for compensating for the input offset voltage of a logarithmic amplifier includes a digital comparator, a logic circuit, and a digital-to-analog converter (DAC) in a feedback loop. The comparator is connected to the output of the log amplifier and digitally indicates the polarity of the input offset voltage when the amplifier input is set to zero. The logic circuit uses the digital output of the comparator to form an adjustable digital compensation signal. This digital compensation signal is applied to the DAC to generate an analog compensation signal that is injected into the input of the logarithmic amplifier to cancel the input offset voltage. The process is repeated until the proper or best compensation signal is produced.

Abstract: A circuit arrangement having a logarithmic transfer function between an input signal and an output signal in a predefined level range of the input signal circuit which has a very low power consumption and low circuit complexity, includes a first pair of amplifier elements, namely transistors, forming a first differential amplifier and a second pair of amplifier elements, namely transistors, forming a second differential amplifier. The first pair of transistors have their emitters connected to each other and to a first current source, their collectors connected to working impedances subdivided by respective taps, and their bases receive the input signal between them. The second pair of transistors have their emitters connected to each other and to a second current source, their collectors connected to the collectors of the first pair of transistors, respectively, and their bases cross-connected to the taps of the working impedances.