Abstract: A braking circuit is adapted to supply generatively produced energy of the motor as load resistance to a bipolar transistor. The braking circuit has a voltage regulator, which controls a voltage, applied to the base terminal of the bipolar transistor to achieve an associated controlled voltage based on a reference voltage. A first power supply connector of the electrical motor, in the generator mode of operation of the electrical motor, is coupled to a collector terminal of the bipolar transistor and to the voltage input of a voltage regulator. A second power supply connector of the electrical motor is coupled to an emitter terminal of the bipolar transistor and is coupled to a reference input of the voltage regulator via a resistive branch including at least one electrical resistor.

Abstract: Example embodiments relate to a method and system of testing a memory module having the process of receiving single ended input signals via differential input terminals through which differential pairs of packet signals may be received from a testing equipment, wherein a number of terminals of the testing equipment may be different from a number of terminals of the memory module, and testing memory chips of the memory module based on the single ended input signals.

Abstract: A new negative resistance circuit comprises a first N-channel enhancement FET (E-FET), an N-channel depletion FET as a load element connected to the first N-channel E-FET to form a series branch connected between negative resistance ports, and a second N-channel E-FET having source-drain path parallel to the series branch. The gate of the second N-channel E-FET is connected to the connection node between the load element and the first E-FET, while the gate electrode of the first E-FET is connected to a control port for controlling current-voltage characteristic between the negative resistance ports. The negative resistance circuit can be used in an inverter to enable the inverter to have a hysteretic function or a multivalued logic function.

Abstract: A delay circuit includes a delay part delaying a signal by a delay time which can be varied based on a control current, and a control current adjustment circuit adjusting the control current so that the delay time changes linearly based on a variation in a resistance value.