Gating (i.e., Switching Input To Output) Patents (Class 327/365)
  • Patent number: 11892502
    Abstract: An integrated circuit with a through-silicon via (TSV) fault-tolerant circuit, a TSV fault tolerance method are disclosed. The IC may include a plurality of operational TSVs, a spare TSV, a plurality of fault-tolerance control modules each coupled to one of the plurality of operational TSVs and the spare TSV, and a decoder coupled to the fault-tolerance control modules. The fault-tolerance control modules may be configured to deactivate an operational TSV that is determined to be defective and activate the spare TSV based on a positioning code for the defective operational TSV from the decoder. The IC may reduce the defect rate in the fabrication of TSV-based three-dimensional (3D) IC chips.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: February 6, 2024
    Assignee: Changxin Memory Technologies, Inc.
    Inventor: Cheng-Jer Yang
  • Patent number: 11886220
    Abstract: In a computing device it may be determined whether to power down a subsystem based on how long the subsystem has been idle and based on one or more measurements of subsystem current consumption, subsystem bandwidth usage, and subsystem efficiency. An idle power-down count value may be determined based on the measurements, using predetermined relations among subsystem current consumption, subsystem bandwidth usage, and subsystem efficiency. The subsystem may be powered down based on a determination of whether the subsystem has been idle for an interval not less than the idle power-down count value.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: January 30, 2024
    Assignee: QUALCOMM Incorporated
    Inventor: Ajay Kumar
  • Patent number: 11855611
    Abstract: Implementing a series gate resistor in a switching circuit results in several performance improvements. Few examples are better insertion loss, lower breakdown voltage requirements and a lower frequency corner. These benefits come at the expense of a slower switching time. Methods and devices offering solutions to this problem are described. Using a concept of bypassing the series gate resistor during transition time, a fast switching time can be achieved while the above-mentioned performance improvements are maintained.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: December 26, 2023
    Assignee: pSemi Corporation
    Inventors: Payman Shanjani, Eric S. Shapiro
  • Patent number: 11855537
    Abstract: A switching converter with adaptive constant on-time control has a power switch and a control circuit. The switching converter converts an input voltage into an output voltage. When the switching converter is in a light-load state, the on-time of the power switch is controlled to be smaller than the on-time of the power switch in a normal-load state, wherein the normal-load state includes a continuous current mode (CCM) or a discontinuous current mode (DCM).
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: December 26, 2023
    Assignee: Chengdu Monolithic Power Systems Co., Ltd.
    Inventors: Jian Zhang, Xingwei Wang
  • Patent number: 11804839
    Abstract: A semiconductor device includes an optical source; a photoconductive switch triggered by the optical source; and an enclosure unit that contains the optical source and the photoconductive switch in a single integrated package. The optical source may output a laser. The optical source may be a diode. The enclosure unit may be conductive. The enclosure unit may be non-conductive. The device may include an electrical connector operatively connected to the optical source. The electrical connector may provide power and control signals to the optical source. The electrical connector may be attached to an outer surface of the enclosure unit.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: October 31, 2023
    Assignee: Government of the United States as represented by the Secretary of the Air Force
    Inventor: Joseph Dana Teague
  • Patent number: 11799310
    Abstract: An X-capacitor discharge method applied to a switched-mode power supply, wherein the switched-mode power supply comprises an X-capacitor, a rectifier circuit and a switching circuit; the X-capacitor discharge method comprises: arranging a first diode, wherein an anode of the first diode is connected to a first end of the X-capacitor, and a cathode of the first diode is configured as a first node; when it is detected that a voltage of the first node is higher than a first voltage threshold, pulling down the first node through a first sampling current, and performing a timing; and if a time for which the voltage of the first node continues to be higher than the first voltage threshold reaches a first threshold time, pulling down the first node through a first pull-down current. An X-capacitor discharge circuit applied to the switched-mode power supply is provided.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: October 24, 2023
    Inventors: Pitleong Wong, Mengyi Huang
  • Patent number: 11742748
    Abstract: An electronic device including a voltage detection circuit, a control and protection circuit, at least one voltage converter, and a system-on-chip is provided. The voltage detection circuit detects a voltage source to output a voltage detection signal. The control and protection circuit, coupled to the voltage detection circuit, generates a system power enabling signal according to the voltage detection signal. The at least one voltage converter, coupled to the control and protection circuit, generates a system power signal according to the system power enabling signal. The system-on-chip, coupled to the at least one voltage converter, controls the electronic device when receiving the system power signal. In response to a power off signal generated from the system-on-chip, the control and protection circuit further isolates the voltage detection signal to avoid the transition of the voltage detection signal affecting a system shutdown procedure of the electronic device.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: August 29, 2023
    Assignee: Qisda Corporation
    Inventor: Meng-Hsien Lin
  • Patent number: 11664180
    Abstract: A contactor apparatus and method for operating the contactor apparatus can include a contactor assembly with a contactor coil operably coupled to a contactor switch. One or more sensors can be provided in the contactor assembly adapted to measure one or more aspects of the contactor assembly. Based upon the measured aspects, a controller can initiate operation of the contactor switch to effectively toggle the contactor switch at a zero-crossing point along an alternating current waveform.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: May 30, 2023
    Assignee: GE Aviation Systems Limited
    Inventors: Peter Roy Payne, John Houghton, Robert Henry Keith Miles Bullock
  • Patent number: 11599000
    Abstract: According to one embodiment, a display panel includes scanning lines, signal lines, a pixel switching element, a pixel electrode, and a first control switch including first control switching elements. Each of the first control switching elements is composed of a transistor and includes a gate electrode, a source electrode, and a drain electrode. The scanning lines electrically connected to the gate electrodes of the first control switching elements are different from each other. The drain electrodes of the first control switching elements are electrically bundled and are connected to power source voltage output terminal of the first control switch.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: March 7, 2023
    Assignee: Japan Display Inc.
    Inventors: Hirondo Nakatogawa, Yoshiro Aoki
  • Patent number: 11569744
    Abstract: A converter stage having a control pin, an input voltage pin, an output pin, a ground pin, a high-side switch coupled between the input voltage pin and the output pin, a low-side switch coupled between the output pin and the ground pin, a current sensor configured to detect a current at the output pin, and control logic coupled to the control pin and the current sensor. The control logic is configured to control switching of the high-side and the low-side switches in continuous conduction mode, discontinuous conduction mode, and body braking control for the converter stage in response to a first signal received via the control line and a second signal received from the current sensor. A driver controls switching, based on the detected current and sequential event tracking, between an on state and an off state.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: January 31, 2023
    Inventors: Scott Edward Ragona, Rengang Chen, Preetam Charan Anand Tadeparthy, Evan Michael Reutzel
  • Patent number: 11489525
    Abstract: A device for synchronous serial data transmission over a differential data channel and a differential clock channel includes an interface controller having a clock generator, data controller, clock transmitter block and data receiver block. The clock generator generates a transmit clock signal which, during a data transmission cycle, includes a clock pulse train having a period. The clock generator is suitably configured such that, for data transmission cycles in a dynamic operating state in which a maximum occurring differential voltage of a differential clock signal is lower than a maximum differential voltage of the clock transmitter block, the clock generator sets a duration of a first clock phase of a first clock period of the clock pulse train to be longer than a first clock phase of following clock periods and shorter than a time duration required to reach the maximum differential voltage.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: November 1, 2022
    Inventor: Manfred Huber
  • Patent number: 11482924
    Abstract: Power isolators for providing electrical isolation between an input port and an output port that exhibit low electromagnetic interference (EMI) are described. The low EMI may be achieved by, for example, canceling out a common mode current across a transformer in the power isolator that may be converted into EMI. The power isolator may include at least one oscillator circuit that is configured to apply a first signal to a first transformer and a second, different signal to a second transformer. The first and second signals may be configured such that the common mode current generated in each of the first and second transformers has an opposite direction. Thus, the common mode currents in the first and second transformers may at least partially cancel out. As a result, the EMI exhibited by the power isolator may be reduced.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: October 25, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Wenhui Qin, Xin Yang, Shaoyu Ma, Fang Liu, Yuanyuan Zhao
  • Patent number: 11469669
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to adjust an operating mode of a power converter. An example apparatus includes a first transistor having a gate terminal, a first current terminal, and a second current terminal, the first current terminal to be coupled to a second transistor and an inductor of a power converter, a capacitor coupled to the second current terminal, a logic gate having a first logic gate input, a second logic gate input, and a logic gate output, the logic gate output coupled to the gate terminal, a comparator having a comparator input and a comparator output, the comparator input coupled to the capacitor and the second current terminal, a multiplexer coupled to the comparator output, a first flip-flop coupled to the multiplexer and the second logic gate input, and a second flip-flop coupled to the multiplexer and the first flip-flop.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: October 11, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Janne Matias Pahkala, Antti Juhani Korhonen
  • Patent number: 11469757
    Abstract: Systems, methods, techniques and apparatuses of power switches are disclosed. One exemplary embodiment is a power switch comprising a first semiconductor device and a second semiconductor device coupled together in a first anti-series configuration between a first terminal and a second terminal; a third semiconductor device and a fourth semiconductor device coupled together in a second anti-series configuration between the first terminal and the second terminal; a controller configured to operate the power switch to simultaneously conduct a first portion of a load current from the first terminal to the second terminal by closing the first semiconductor device and the second semiconductor device, and to conduct a second portion of the load current from the first terminal to the second terminal by closing the third semiconductor device and the fourth semiconductor device.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: October 11, 2022
    Assignee: ABB SCHWEIZ AG
    Inventors: Pietro Cairoli, Eddy Aeloiza, Xiaoqing Song
  • Patent number: 11411424
    Abstract: This disclosure relates to a system that includes a boost circuit comprising a boost capacitor. The boost circuit is configured to provide a boost voltage at a first terminal of the boost capacitor by increasing the boost voltage at the first terminal to exceed a target voltage for a given charge cycle. A boost switch is configured to supply the boost voltage from the first terminal to a charge node for turning on a transistor, which is coupled to the charge node, based on a boost signal during the given charge cycle. A pull-down circuit is configured to control discharge of the charge node to a clamp voltage that is sufficient to turn off the transistor for the given charge cycle and to facilitate charging of the charge node in a next charge cycle.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: August 9, 2022
    Inventors: Huawen Jin, Kenneth J. Maggio, Thomas James Jung, Jr.
  • Patent number: 11368147
    Abstract: A gate drive circuit includes one output element, a constant current drive circuit, and a constant voltage drive circuit. The output element outputs a gate drive signal to a gate of a gate driven switching element. The constant current drive circuit causes the output element to output the gate drive signal with a constant current. The constant voltage drive circuit causes the output element to output the gate drive signal with a constant voltage.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: June 21, 2022
    Inventors: Kazuki Yamauchi, Yasutaka Senda
  • Patent number: 11336001
    Abstract: According to one embodiment of the disclosure, an electronic device comprises: a printed circuit board including a conductive pattern; and a tuner mounted on the conductive pattern and electrically connected to the conductive pattern, wherein the tuner comprises: a ground; a first conductive pad; a first switching element electrically connected between the ground and the first conductive pad; and a second conductive pad electrically disconnected with the ground, wherein the conductive pattern may comprise: a first electrical path in electrical contact with the first conductive pad; and a second electrical path in electrical contact with the second conductive pad and electrically shorted to the first electrical path. Various other embodiments are possible.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: May 17, 2022
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Mincheol Seo, Dongyeon Kim, Hojung Nam, Jeongwan Park, Chankyu An, Sungjun Lee, Nakchung Choi, Yoonjae Lee
  • Patent number: 11244722
    Abstract: Programmable interposers for connecting integrated circuits, methods for programming programmable interposers, and integrated circuit packaging are provided. The programmable interposers are electrically reconfigurable to allow custom system-in-package (SiP) operation and configuration, field configurability, and functional obfuscation for secure integrated circuits fabricated in non-trusted environments. The programmable interposer includes, in one implementation, an interposer substrate and a programmable metallization cell (PMC) switch. The PMC switch is formed on the interposer substrate and is coupled between a signal input and a signal output. The PMC switch is electrically configurable between a high resistance state and a low resistance state.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: February 8, 2022
    Inventor: Michael Kozicki
  • Patent number: 11164856
    Abstract: Disclosed herein is an apparatus that includes a first semiconductor chip, first and second TSVs penetrating the first semiconductor chip, a first path including the first TSV, a second path including the second TSV, a first charge circuit configured to charge the first path, a second charge circuit configured to charge the second path, a first discharge circuit configured to discharge the first path, a second discharge circuit configured to discharge the second path, and a comparator circuit configured to compare a potential of the first path with a potential of the second path.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: November 2, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Harutaka Makabe
  • Patent number: 11144495
    Abstract: An authentication and information system for use in a surgical stapling system includes a microprocessor configured to demultiplex data from a plurality of components in the surgical system. The authentication and information system can include one wire chips and a coupling assembly with a communication connection.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: October 12, 2021
    Assignee: Covidien LP
    Inventors: Ethan Collins, David Durant, John Hryb
  • Patent number: 10811786
    Abstract: A high-frequency module includes a first switch circuit including a first common terminal, a second common terminal, and selection terminals, and selectively connecting the first common terminal and the second common terminal to selection terminals different from each other among the plurality of selection terminals, and a matching circuit to be connected to the second common terminal without being connected to an antenna.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: October 20, 2020
    Inventor: Masaki Iiduka
  • Patent number: 10642295
    Abstract: A power supply control circuit includes a power storage that stores power generated by energy harvesting, a function circuit that operates a specific function, a first switch allocated between the power storage and the function circuit and supplies or not supplies the power to the function circuit, a supply controller that monitors a voltage corresponding to the power stored in the power storage, and when the voltage of the power storage is equal to or above a first voltage, controls the first switch so that the function circuit is supplied with the power stored in the power storage, and a power consumption controller that controls, based on the voltage of the power storage, power to be consumed by the function circuit, the power being supplied from the power storage to the function circuit by switching of the first switch.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: May 5, 2020
    Inventor: Hiroyuki Sato
  • Patent number: 10601419
    Abstract: A power delivery integrated circuit is installed within a cable, and a switch circuit applied to the power delivery integrated circuit includes a first switch module, a second switch module, and a logic controller. When a first terminal of the cable receives a first voltage and a second terminal of the cable receives a second voltage, the logic controller optionally makes the first switch module transmit the first voltage to an identification circuit of the power delivery integrated circuit, or makes the second switch module transmit the second voltage to the identification circuit.
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: March 24, 2020
    Assignee: Etron Technology, Inc.
    Inventor: Wei-Chuan Cheng
  • Patent number: 10523197
    Abstract: A bi-directional switch circuit includes first and second transistors having their control electrodes coupled at a first common node and the current paths coupled at a second common node in an anti-series arrangement. First and second electrical paths coupled between the first common node and the first and second transistors, respectively, include first and second switches switchable between a conductive state and a non-conductive state. A third electrical path between the first and second common nodes includes a third switch switchable between a conductive state and a non-conductive state. The third switch is coupled with the first and second switches by a logical network configured to switch the third switch to the conductive state with the first and second switches switched to the non-conductive state, and to the non-conductive state with either one of the first and second switches switched to the conductive state.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: December 31, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Edoardo Botti, Giovanni Gonano
  • Patent number: 10250032
    Abstract: The present disclosure relates to a power distribution unit (PDU) having at least one power receptacle for enabling attachment of an AC power cord of an external device thereto. A branch receptacle controller (BRC) has at least one bistable relay and is associated with the one power receptacle for supplying AC power thereto from an AC power source. The BRC monitors a parameter of a line voltage and uses it to detect when AC power is lost, and then toggles the bistable relay, if the relay is in a closed position, to an open position. A rack power distribution unit controller (RPDUC) monitors the bistable relay and commands the BRC to close the bistable relay after AC power is restored.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: April 2, 2019
    Assignee: Vertiv Corporation
    Inventor: Kevin R. Ferguson
  • Patent number: 10224743
    Abstract: Systems and methods may provide for an energy harvester to power a mobile device. The energy harvester may include an energy harvesting portion to generate electrical power. At least one sensor may measure an environmental condition relating to generation of electrical power by the energy harvesting portion. A controller may generate a signal based on the measured environmental condition by the at least one sensor to the mobile device. Alternatively the signals from the at least one sensor are place in a memory on the energy harvester. In one example, the controller determines the power generated by the energy harvester and the controller signal includes this power information.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: March 5, 2019
    Assignee: Intel Corporation
    Inventors: Lilly Huang, Wayne L. Proefrock, Michael Boyd
  • Patent number: 10218452
    Abstract: A control network communication arrangement includes a second protocol embedded into a first protocol in a way that modules supporting the second protocol may be aware of and utilize the first protocol whereas modules supporting only the first protocol may not be aware of the second protocol. Operation of modules using the second protocol does not disturb operation of the modules not configured to use or understand the second protocol. By one approach, the messages sent using the second protocol will be seen as messages sent using the first protocol but not having a message necessary to understand or as needing a particular response. In another approach, modules using the second protocol can be configured to send message during transmission of first protocol messages by other modules, the second protocol messages being triggered off of expected aspects of the message sent under the first protocol.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: February 26, 2019
    Assignee: Concio Holdings LLC
    Inventors: Lars-Berno Fredriksson, Kent Äke Lennart Lennartsson, Jonas Henning Olsson
  • Patent number: 10176780
    Abstract: A device is provided for use with an audiovisual device and a cable having a first end and a second end. The audiovisual device can receive digital television audiovisual signals. The cable includes a data channel, a control channel and a power line and can transmit the digital television audiovisual signals. The first end can connect to the audiovisual device, whereas the second end can connect to the device. The device includes a connector, a detecting portion and a power source. The connector can connect to the second end. The detecting portion can generate a connection signal based on a connection of the connector to the second end. The power source can provide power based on the connection signal.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: January 8, 2019
    Assignee: ARRIS Enterprises LLC
    Inventors: Yeqing Wang, Brian M. Carroll
  • Patent number: 10170448
    Abstract: Apparatuses for supplying power supply voltage in a plurality of dies are described. An example apparatus includes: a circuit board; a regulator on the circuit board that regulates a first voltage; a semiconductor device on the circuit board that receives the first voltage through a power line in the circuit board. The semiconductor device includes: a substrate on the circuit board, stacked via conductive balls, that receives the first voltage from the power line via the conductive balls; a plurality of dies on the semiconductor device, stacked via bumps, each die including a first conductive via that receives the first voltage via the bumps; a plurality of pillars between adjacent dies and couple the first conductive vias of the adjacent dies; and a sense node switch circuit that selectively couples one first conductive via of one die among the plurality of dies to the regulator.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: January 1, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Adam S. El-Mansouri, Fuad Badrieh, Brent Keeth
  • Patent number: 10153768
    Abstract: Input/output circuitry includes a first PMOS device and a first NMOS device having first current electrodes are connected to each other and a pad. First selection circuitry, when the I/O circuitry is disabled, provides a first supply voltage to a control electrode and an N-well of the first PMOS device when the pad voltage is between the first and second supply voltages and to directly provide the pad voltage to the control electrode and the N-well of the first PMOS device when the pad voltage is greater than the first supply voltage. Similarly, second selection circuitry, when the I/O circuitry is disabled, provides a second supply voltage or directly provides the pad voltage to a control electrode and a P-well of the first NMOS device depending on whether the pad voltage is between the first and second supply voltages or less than the second supply voltage, respectively.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: December 11, 2018
    Assignee: NXP USA, Inc.
    Inventors: Christopher James Micielli, Srikanth Jagannathan, Hector Sanchez, Kumar Abhishek
  • Patent number: 10097171
    Abstract: A RF switch circuit includes a voltage divider circuit and a semiconductor device. The semiconductor device has an activated state and a deactivated state. The voltage divider circuit has an input terminal connected to a first line and an output terminal connected to a second line. The first line is connected to a power source. A gate terminal of the semiconductor device is connected to the second line. In the activated state, a source terminal and a drain terminal of the semiconductor device are each selectively connected to ground. In the deactivated state, the source terminal and the drain terminal of the semiconductor device are each selectively connected to the power source.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: October 9, 2018
    Assignee: RFAXIS, INC.
    Inventor: Qiang Li
  • Patent number: 10074493
    Abstract: A break-before-make (BB4M) circuit topology is disclosed for use with a multiplexer that eliminates shoot-through current between analog inputs and also between an analog input and analog output. The BB4M circuit generates a pulse that disables an existing selected channel before enabling a newly selected channel or gate driver, and is suitable for use in high-radiation or outer space operating environments.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: September 11, 2018
    Inventors: Younes J. Lotfi, Thomas R. Richardson, James E. Colley
  • Patent number: 10007761
    Abstract: An apparatus and method is provided for treating a healthcare patient. The method includes the steps of establishing a audio/visual teleconference between a processor of the patient at a first location and a processor of a physician located at a second, remote location different from the first location and displaying a set of biometric parameters of the patient in real time to the physician at the remote location.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: June 26, 2018
    Assignee: 3 NET WISE, INC.
    Inventors: Errick Sadler, Melanie Mencer-Parks, William Langford, Randy Sessler, Joseph Boucree, Sherrod Woods
  • Patent number: 9960780
    Abstract: At least some embodiments are directed to a system that comprises a differential switch network comprising first and second output nodes, first and second transistors coupled to the network, and first and second resistors coupled to the first and second transistors. The DAC also comprises a voltage source coupled to the first resistor and a ground connection coupled to the second resistor. The DAC further includes a capacitor coupled to the first and second transistors and to the second resistor.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: May 1, 2018
    Inventors: Jagannathan Venkataraman, Eeshan Miglani
  • Patent number: 9923594
    Abstract: Fabricating a radio-frequency switching circuit involves providing a substrate, forming, on the substrate, one or more field-effect transistors connected in series to define a radio-frequency signal path between an input end and an output end, each field-effect transistor having a source, a drain, a gate node, and a body node, and forming an element coupled to a selected body node of the one or more field-effect transistors connected in series to thereby provide reduced voltage distribution variation across the switching circuit.
    Type: Grant
    Filed: October 22, 2016
    Date of Patent: March 20, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventors: Anuj Madan, Hanching Fuh, Fikret Altunkilic, Guillaume Alexandre Blin
  • Patent number: 9917575
    Abstract: A circuit includes a switching element with a first terminal, a second terminal and a control terminal. The circuit also includes an impedance network coupled between the control terminal and a switching node. The circuit also includes a first accelerating element coupled between the control terminal and a first node. The first node is different from the switching node. The circuit is configured to temporarily activate the first accelerating element when a switching state of the switching element is to be changed.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: March 13, 2018
    Assignee: Infineon Technologies AG
    Inventors: Valentyn Solomko, Winfried Bakalski, Nikolay Ilkov, Werner Simbuerger
  • Patent number: 9877104
    Abstract: An audio switch circuit includes negative feedback paths and a transistor that serves as a switching component. The negative feedback paths are turned ON to couple a source voltage and a drain voltage of the transistor to the gate of the transistor when the audio switch circuit is turned ON. The negative feedback paths reduce the slew rate of the gate-to-source voltage of the transistor, thereby slowing the turn-ON of the audio switch circuit to prevent or minimize unwanted audible noise. The negative feedback paths can be turned OFF after a period of time after the audio switch circuit is turned ON for improved total harmonic distortion.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: January 23, 2018
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Lei Huang, Julie Stulz, Eric Li
  • Patent number: 9712150
    Abstract: A method and an arrangement of limiting temperature variations in a semiconductor component of a switching converter, the method comprising determining a quantity relating to operation temperature of the switching converter, determining temperature of the semiconductor component, selecting a maximum value of switching frequency of the switching converter based on the determined quantity relating to operation temperature of the switching converter and the temperature of the semiconductor component, and limiting the switching frequency of the semiconductor component of the switching converter to the selected switching frequency.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: July 18, 2017
    Assignee: ABB Technology OY
    Inventors: Teemu Salmia, Jukka-Peeka Kittilä, Marko Raatikainen
  • Patent number: 9710747
    Abstract: A method of generating neuron spiking pulses in a neuromorphic system is provided which includes floating one or more selected bit lines connected to target cells, having a first state, from among a plurality of memory cells arranged at intersections of a plurality of word lines and a plurality of bit lines; and stepwisely increasing voltages applied to unselected word lines connected to unselected cells, having a second state, from among memory cells connected to the one or more selected bit lines other than the target cells having the first state.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: July 18, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Daehwan Kang, Kyung-chang Ryoo, Hyun Goo Jun, Hongsik Jeong, JaeHee Oh
  • Patent number: 9694193
    Abstract: The present invention relates to a device for treating biological cells in an object, the device comprising: —a single winding coil element; —an electrical generator connected to the single winding coil element, the single winding being configured to be positioned essentially around the object; wherein the electrical generator is configured to discharge into the single winding coil element so that the single winding coil element generates a short duration pulsed electromagnetic field by magnetic induction in the single winding coil element, the electromagnetic field having a field strength that is sufficiently high to affect, preferably increase the permeability of cell membranes and/or intracellular membranes of the biological cells contained in the object when in operation the object is placed inside the single winding coil element.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: July 4, 2017
    Inventors: Johannes Wilhelmus Maria Van Bree, August Johannes Marie Pemen, Eva Stoffels
  • Patent number: 9626895
    Abstract: A gate driving circuit is provided. The gate driving circuit includes a plurality of gate driving units sequentially coupled to each other. Each of the gate driving units includes a shift register and a de-multiplexer. The shift register receives a start pulse signal, and generates a first control signal and a second control signal according to the start pulse signal and a scan controlling signal, where when the shift register converts the first control signal into the second control signal, the shift register pulls down a voltage level of the first control signal according to the second control signal. The de-multiplexer receives a part of a plurality of clock signals for generating a plurality of gate signals sequentially according to the first control signal, where the clock signals are enabled sequentially, and enable periods of two sequential clock signals are partially overlapped with each other.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: April 18, 2017
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Chi-Chung Tsai, Yi-Kai Chen, En-Chih Liu, Yen-Yu Huang
  • Patent number: 9621152
    Abstract: A switch comprising a plurality of inductors and a plurality of shunt transistors is described. Each inductor can be electrically coupled between adjacent shunt transistors to form a distributed switch structure. At least two inductors in the plurality of inductors can be inductively coupled with each other. The plurality of inductors can correspond to portions of a coupling inductor, wherein the coupling inductor can have an irregular octagonal shape.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: April 11, 2017
    Inventors: Ran Shu, Adrian J. Tang, Qun Gu, Brian J. Drouin
  • Patent number: 9594264
    Abstract: An electrical device in provided having two electrodes separated from one another, wherein one temperature controlled electronic spin-state transition particle is in direct contact with each of the two electrodes, the particle being of the ionic type and containing a transition metal bearing a cationic charge.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: March 14, 2017
    Assignee: Centre National de la Recherche Scientifique—CNRS-
    Inventors: Jean-François Letard, Céline Etrillard, Bernard Doudin, Vina Faramarzi, Jean-François Dayen
  • Patent number: 9496865
    Abstract: An active isolation switch according to this invention includes a field effect transistor (FET), a first bi-polar transistor and a second bi-polar transistor, and an emitter bias resistor. The FET is formed with a source, a gate, and a drain. The first bi-polar transistor is formed with a first emitter, a first base, and a first collector; the first emitter is connected to the source and the first collector is connected to the gate. The second bi-polar transistor is formed with a second emitter, a second base, and a second collector, the second base is connected to the first base, and the second collector is connected to the drain. The emitter bias resistor is formed with a first terminal and a second terminal; the first terminal is connected to the emitter of the second bi-polar transistor and the second terminal is connected to the emitter of the first bi-polar transistor.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: November 15, 2016
    Inventors: Marcos-Agoo Liquicia, Chien-Ta Liang
  • Patent number: 9383828
    Abstract: There is provided an input device that needs not to change processing of means (a key processor or a key processing microcomputer as a software module) for performing processing based on an on or off state of a key switch in a matrix system and an A/D system. A key-in microcomputer detects the on or off states of plural key switches K based on voltages at A/D input terminals. The key-in microcomputer converts the detected on or off states of the plural key switches K into a bit array. A key processing microcomputer performs the processing based on the bit array converted by the key-in microcomputer.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: July 5, 2016
    Assignee: Onkyo Corporation
    Inventor: Kazunari Ito
  • Patent number: 9357623
    Abstract: Aspects of the disclosure provide a circuit. The circuit includes a transistor configured to control energy entering the circuit from a power supply, a capacitor coupled with the transistor to store the energy that enters the circuit, and a protection circuit configured to counteract a voltage change of the transistor that is caused by a step voltage change in the power supply. In an embodiment, the protection circuit operates independent of the stored energy on the capacitor.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: May 31, 2016
    Assignee: Marvell World Trade Ltd.
    Inventor: Siew Yong Chui
  • Patent number: 9337343
    Abstract: To provide a semiconductor device having a high aperture ratio and including a capacitor with a high charge capacitance. To provide a semiconductor device with a narrow bezel. A transistor over a substrate; a first conductive film over a surface over which a gate electrode of the transistor is provided; a second conductive film over a surface over which a pair of electrodes of the transistor is provided; and a first light-transmitting conductive film electrically connected to the first conductive film and the second conductive film are included. The second conductive film overlaps the first conductive film with a gate insulating film of the transistor laid between the second conductive film and the first conductive film.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: May 10, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroyuki Miyake, Kouhei Toyotaka
  • Patent number: 9235222
    Abstract: A hybrid voltage regulator includes a shunt circuit, a shunt feedback circuit, a pass circuit, and a bias controller. The bias controller is configured to control the pass circuit. The hybrid voltage regulator may also include a current source. This hybrid voltage regulator reduces current consumption at low load conditions (improving power efficiency and battery life, particularly for CMOS based regulators), and also provides wideband power supply rejection and fast transient response.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: January 12, 2016
    Assignee: RF Micro Devices, Inc.
    Inventors: Wonseok Oh, Hyuntae Kim, Praveen Nadimpalli
  • Patent number: 9059402
    Abstract: A resistance-variable element as disclosed has high reliability, high densification, and good insulating properties. The device provides a resistance-variable element in which a first electrode including a metal primarily containing copper, an oxide film of valve-metal, an ion-conductive layer containing oxygen and a second electrode are laminated in this order.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: June 16, 2015
    Inventors: Munehiro Tada, Toshitsugu Sakamoto, Yuko Yabe, Yukishige Saito, Hiromitsu Hada
  • Patent number: 9041412
    Abstract: The present disclosure provides methods and devices for testing a connection between speakers and a power amplifier. The disclosed methods and devices solve a problem that, upon a connection test for a power amplifier which has a booster power source, when a midpoint potential of the power amplifier and the voltage of the speaker connection terminal are compared, and it is determined that short-circuiting occurs on a ground side when the potential of the speaker connection terminal is lower than the midpoint potential, a wrong test is conducted if a midpoint potential is higher than a battery voltage.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: May 26, 2015
    Assignee: Alpine Electronics, Inc.
    Inventors: Minoru Matsuyama, Taro Kitagawa