Avalanche Patents (Class 327/422)
  • Patent number: 12101138
    Abstract: Systems and methods for operating a security tag. The methods comprise: receiving a first wireless signal transmitted from a transmit circuit using a receive circuit of the security tag; inducing a voltage in the receive circuit of the security tag while the first wireless signal is being received; performing operations by the controller to selectively close a switch when the voltage is being induced in the receive circuit; and causing a release of a mechanical component of the security tag by allowing energy to flow from the receive circuit to the mechanical component when the switch is closed.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: September 24, 2024
    Assignee: Sensormatic Electronics, LLC
    Inventors: Ronald B. Easter, Manuel Soto, Mohammad Mohiuddin
  • Patent number: 11606086
    Abstract: A desaturation protection circuit is provided. Aspects includes a main gate driver circuit driving a gate for a switch, a desaturation gate driver circuit coupled to a drain terminal of the switch, a PWM signal supply circuit configured to supply a PWM signal to the desaturation gate driver circuit, and a delay circuit, the delay circuit configured to delay the PWM signal from the PWM signal supply circuit to the desaturation gate driver circuit during a turn-on event for the switch.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: March 14, 2023
    Assignee: HAMILTON SUNDSTRAND CORPORATION
    Inventors: Bo Liu, Yongduk Lee, Xin Wu
  • Patent number: 9787253
    Abstract: A Doherty amplifier (10) according to the present invention includes: a distribution unit (11) that distributes input signals; a main amplifier (12) that amplifies a first distributed signal output from the distribution unit (11); a transmission line unit (13) that transmits the first distributed signal amplified by the main amplifier (12); a peak amplifier (14) that amplifies a second distributed signal output from the distribution unit (11); a transmission line unit (15) that transmits the second distributed signal amplified by the peak amplifier (14); a synthesizing unit (16) that synthesizes the first distributed signal and the second distributed signal, and outputs a synthesized signal; and an impedance transformation unit (17) that performs an impedance transformation of the synthesized signal output from the synthesizing unit (16). The impedance transformation unit (17) includes a plurality of ?/4 transmission lines connected in series.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: October 10, 2017
    Assignee: NEC CORPORATION
    Inventor: Takuya Tanimoto
  • Patent number: 8988133
    Abstract: There are disclosed herein various implementations of nested composite switches. In one implementation, a nested composite switch includes a normally ON primary transistor coupled to a composite switch. The composite switch includes a low voltage (LV) transistor cascoded with an intermediate transistor having a breakdown voltage greater than the LV transistor and less than the normally ON primary transistor. In one implementation, the normally on primary transistor may be a group III-V transistor and the LV transistor may be an LV group IV transistor.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: March 24, 2015
    Assignee: International Rectifier Corporation
    Inventor: Michael A. Briere
  • Patent number: 8653434
    Abstract: An accurate and rapid method for characterizing the performance of an APD and setting its operating voltage Vop to an optimal value uses an on-board LED or other pulsed light source to measure APD responses at different operating voltages Vop. An estimated breakdown voltage Vb is determined by comparing the measured responses, and the Vop is adjusted to a new value at a fixed offset from the estimated Vb. The fixed offset is selected according to ambient light conditions, including the presence or absence of light background noise, and whether the sun is partially or fully in the field of view. The method is iterated until convergence, or until a maximum number of iterations is reached. In embodiments, a plurality of APD's having a common Vop can be adjusted, and the Vop is never set below a minimum value VopBW necessary to meet timing requirements for a missile guidance system.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: February 18, 2014
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Aaron Johnson, David Schorr, James H. Steenson, Jr.
  • Patent number: 6541752
    Abstract: It is an integrated circuit capable of determining the quenching and the reset of an avalanche photodiode operating in Geiger mode so as to detect single photons falling on the surface of said photodiode. The circuit scheme used makes possible to reduce the size of the circuit down to a single semiconductor chip, to reduce the power dissipation and to reduce the cost of the circuit, at the same time keeping the performance at good level.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: April 1, 2003
    Assignee: Politecnico di Milano
    Inventors: Franco Zappa, Sergio Cova, Massimo Ghioni
  • Patent number: 6069414
    Abstract: An apparatus and method for recharging a string of avalanche transistors within a pulse generator is disclosed. A plurality of amplification stages are connected in series. Each stage includes an avalanche transistor and a capacitor. A trigger signal, causes the apparatus to generate a very high voltage pulse of a very brief duration which discharges the capacitors. Charge resistors inject current into the string of avalanche transistors at various points, recharging the capacitors. The method of the present invention includes the steps of supplying current to charge resistors from a power supply; using the charge resistors to charge capacitors connected to a set of serially connected avalanche transistors; triggering the avalanche transistors; generating a high-voltage pulse from the charge stored in the capacitors; and recharging the capacitors through the charge resistors.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: May 30, 2000
    Assignee: The Regents of the University of California
    Inventor: E. Stephen Fulkerson
  • Patent number: 5500616
    Abstract: An apparatus for suppressing voltage transients and detecting desaturation conditions in power transistor systems. A first transistor, usually a power transistor, has a first terminal, a second terminal, a drive terminal, and an avalanche breakdown voltage rating between the first mad second terminals. The cathode of a first diode is coupled to the first terminal of the first transistor. The first diode has a reverse breakdown voltage which is less than the avalanche breakdown voltage rating of the first transistor. The anode of a second diode is coupled to the anode of the first diode, and the cathode of the second diode is coupled to the drive terminal of the first transistor. Driver circuitry is also coupled to the drive terminal, and provides a drive signal to the first transistor. An RC network comprising a first resistor and a first capacitor is coupled to the driver circuitry. The base terminal of a second transistor is coupled to the driver circuitry by means of the RC network.
    Type: Grant
    Filed: January 13, 1995
    Date of Patent: March 19, 1996
    Assignee: IXYS Corporation
    Inventor: Sam S. Ochi