Put (i.e., Programmable Unijunction Transistor) Patents (Class 327/449)
  • Patent number: 11946812
    Abstract: A food thermometer includes a tip portion and an outer shell including a minimum food insertion depth indicator visible on an exterior of the outer shell. A thermal barrier member is located inside the outer shell along a center virtual axis defined by the outer shell at or adjacent a projected position of the minimum food insertion depth indicator on the virtual axis, or closer to the tip portion than the orthogonally projected position of the minimum food insertion depth indicator. In another aspect, a food thermometer includes a first portion and a second portion connected to the first portion. A third portion connected to the second portion includes an antenna. A thermal barrier member is located in at least one of the first portion and the second portion to thermally insulate the interior of the first portion from at least a portion of the interior of the second portion.
    Type: Grant
    Filed: November 14, 2020
    Date of Patent: April 2, 2024
    Assignee: Apption Labs Limited
    Inventors: Teemu Nivala, Joseph Cruz
  • Patent number: 11506545
    Abstract: Temperature data is wirelessly received from a food thermometer inserted into food. A remaining time for cooking the food is estimated based at least in part on the received temperature data. The progression of a recipe to at least two new stages is indicated on a user interface based on the received temperature data. According to one aspect, the food thermometer includes a thermal sensor configured to measure an internal temperature of the food or an ambient temperature adjacent the food. It is determined that the indicated temperature measured by the thermal sensor increased by at least a threshold value from a previously indicated temperature wirelessly received from the food thermometer, and the progression of the recipe is indicated on the user interface to a new cooking stage.
    Type: Grant
    Filed: January 5, 2020
    Date of Patent: November 22, 2022
    Assignee: Apption Labs Limited
    Inventors: Teemu Nivala, Joseph Cruz
  • Patent number: 9053852
    Abstract: Phase angle error and ratio error correction is provided in a current transformer by a bucking voltage opposite in phase to the voltage drop across the burden resistor and inherent winding resistance.
    Type: Grant
    Filed: April 23, 2012
    Date of Patent: June 9, 2015
    Assignee: Magnelab, Inc.
    Inventors: George O. Langer, Christopher Scott Brown, Samad Seyfi