With Hum Or Interaction Prevention Patents (Class 327/549)
  • Patent number: 10447244
    Abstract: This disclosure provides systems, methods, and apparatus, including computer programs encoded on computer-readable media, for configuring components of transmission circuitry. In one aspect, a first set of linear kernels and a first set of nonlinear kernels associated with a composite digital pre-distortion (DPD) kernel design is determined based on a first iteration of a DPD kernel analysis process. The first set of linear kernels is separated from the first set of nonlinear kernels according to a first iteration of a linear filter separation process. A final set of linear kernels and a final set of nonlinear kernels are determined based on one or more additional iterations of the DPD kernel analysis process and the linear filter separation process. A pre-DPD filter for the transmission circuitry is configured using a final set of filter coefficients derived based on the final set of linear kernels.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: October 15, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Hao Zhou, Kapil Rai
  • Patent number: 8154334
    Abstract: An apparatus comprises a voltage regulator including an high side switching transistor and a low side switching transistor. An high side drive controls operation of the high side switching transistor. A low side driver controls operation of the low side switching transistor. A bootstrap capacitor provides an operating voltage to the high side switching driver. The bootstrap capacitor is charged to a predetermined level responsive to a supply voltage. A low side driver drives the low side switching transistor according to a process that charges the bootstrap capacitor to the predetermined level. The process turns on the low side switching transistor for a first predetermined number of cycles and turns off the low side switching transistor for a second predetermined number of cycles. The process is repeated for a predetermined number of times during startup of the voltage regulator when a prebias load is applied to the voltage regulator.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: April 10, 2012
    Assignee: Intersil America Inc.
    Inventor: Jue Wang
  • Patent number: 8030979
    Abstract: A reference voltage generating circuit includes a reference voltage generating unit generating a uniform reference voltage in response to a bias voltage, a bias voltage generating unit generating the bias voltage, and a start-up circuit, after activating the bias voltage generating unit by receiving a first supply voltage, canceling a change of the first supply voltage to maintain a separation from the bias voltage generating unit. The circuit adopts a start-up circuit having a voltage distributing unit, thereby preventing a quiescent point of a bias voltage generating unit from entering a zero state and prevents a reference voltage from rising in a power-up state that an analog supply voltage rises according to a change of an external design environment such as a power, a temperature, a process parameter and the like, thereby generating a reference voltage more stably. As a result, current consumption and power consumption are minimized.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: October 4, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Min-Jong Yoo
  • Publication number: 20100259430
    Abstract: A reference voltage generation circuit generates a reference voltage and outputs it to an amplifier reference voltage line. A power-supply-noise adding circuit adds power supply noise superimposed on a power supply to the reference voltage generated by the reference voltage generation circuit. A differential amplifier amplifies a difference between a voltage of a vertical signal line and a voltage of an amplifier reference voltage line and outputs the amplified voltage.
    Type: Application
    Filed: March 19, 2010
    Publication date: October 14, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ryuta OKAMOTO, Toshikazu Oda
  • Patent number: 7785284
    Abstract: The joint (36) comprises a tubular body (37) having two connecting zones (38, 39) each connected by an end to a tubular element (40) of a fluid transport line, giving continuity to passage of fluid. The tubular body is made of a mixture of an electrically-conductive material such as PVC, with carbon black to give it electrical conductivity. The joint has an internal surface (41) which is destined to come into contact with the transported fluid, and an external surface which is destined to have a grounded galvanic contact. The joint is inserted in the discharge fluid drainage line of a dialyzer filter, in an apparatus for intensive treatment of acute renal insufficiency, for eliminating ECG artefacts due to functioning of peristaltic pumps in the apparatus.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: August 31, 2010
    Assignee: Gambro Lundia AB
    Inventors: Vincenzo Baraldi, Annalisa Delnevo, Gianfranco Marchesi, Andrea Ligabue, Massimo Zaccarelli
  • Patent number: 7034612
    Abstract: An apparatus and method that compensates for pre-distortion of a power amplifier includes a digital pre-distorter controller which generates a power/phase compensation coefficient, a temperature compensation coefficient and a frequency compensation coefficient, a look-up table which stores the coefficients, a pre-distorter kernel which pre-compensates an input signal based on the temperature compensation coefficient from the look-up table, and a correction filter which compensates an output signal of the kernel based on the frequency compensation coefficient from the look-up table. If desired, an input signal may be pre-distorted based on only one of the temperature and frequency compensation coefficients along with the power/phase compensation coefficient. Nonlinear characteristics of the power amplifier are accurately checked and distortion due to the nonlinear characteristics are compensated for.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: April 25, 2006
    Assignee: LG Electronics Inc.
    Inventor: Wang-Rae Kim
  • Patent number: 6057729
    Abstract: A power circuit for an integrated circuit chip having a plurality of operation frequency modes, the power circuit varying a resonance point defined by a parasitic resistance, inductance and capacitance existing in a power supplying line, in accordance with an operation frequency to thereby prevent the operation frequency from being in accord with a resonance frequency. For instance, when the operation frequency is relatively high, the power circuit lowers the resonance point, and when the operation frequency is relatively low, the power circuit raises the resonance point. The power circuit may further include an encoder receiving an operation frequency mode signal, and emitting an output signal indicative of an operation frequency. The power circuit provides a power ensuring stable operation of an external circuit in a plurality of operation frequency modes.
    Type: Grant
    Filed: June 9, 1998
    Date of Patent: May 2, 2000
    Assignee: NEC Corporation
    Inventor: Masahiro Nomura