Frequency Responsive Feedback Means Patents (Class 330/109)
  • Patent number: 10224893
    Abstract: Systems, devices, and methods for determining and establishing frequency-dependent gain compensation in wide bandwidth communication systems are disclosed. Variable frequency-dependent gain compensation circuits, or variable equalizers, have settings that configure them to establish discrete frequency-dependent gain compensation. The frequency-dependent gain compensation can include various types and levels of gain slope and/or ripple. The settings of the variable equalizers can be set by control signals established a control circuit in response to signals from an external computer. The variable equalizers are coupled to other circuits or devices and the frequency-dependent gain of the combined circuit are measured. The settings of the variable equalizer are then changed to establish an optimal frequency-dependent gain profile or frequency-dependent gain that is closest to a predetermined frequency-dependent target gain profile. The settings can then be saved in a memory or register.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: March 5, 2019
    Assignee: VIASAT, INC.
    Inventors: Kenneth V Buer, Michael R Lyons
  • Patent number: 10205473
    Abstract: An error-feedback transmitter includes an input that receives an input signal, and an output that produces an output signal. It also includes an amplifier, located on a main path that carries a main signal between the input and the output. The transmitter includes a feedback path that carries a feedback signal from the output to the input, and a feedback-signal combiner, located on the main path between the input and the amplifier. The feedback-signal combiner negatively combines the feedback signal with the input signal to improve linearity in the output signal. The transmitter includes a feedforward path that carries a feedforward signal from the input toward the output, and a feedforward-signal combiner, located on the feedback path between the output and the feedback-signal combiner. The feedforward-signal combiner negatively combines the feedforward signal with the feedback signal to suppress components of the main signal in the feedback signal.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: February 12, 2019
    Assignee: The Regents of the University of California
    Inventors: Qun Gu, Jinbo Li
  • Patent number: 10170514
    Abstract: An image sensor comprises an array of pixels comprising: a pinned photodiode; a first sense node A; a second sense node B; a transfer gate TX connected between the pinned photodiode and the first sense node A; a first reset transistor M3 connected between a voltage reference line Vrst and the second sense node B; a second reset transistor M4 connected between the first sense node A and the second sense node B; and a buffer amplifier M1 having an input connected to the first sense node A. The control logic is arranged to operate the pixels in a low conversion gain mode and in a high conversion gain mode. In each of the conversion gain modes the control logic is arranged to operate one of a first reset control line RS1 and a second reset control line RS2 to continuously switch on one of the first reset transistor M3 and the second reset transistor M4 during a readout period of an operational cycle of the pixels.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: January 1, 2019
    Assignee: CMOSIS BVBA
    Inventors: Guy Meynants, Jan Bogaerts
  • Patent number: 10133287
    Abstract: A semiconductor device includes an amplifier, a pass transistor, a compensation circuit, and a bias voltage generator. The amplifier has an output terminal. The pass transistor has a gate and an output terminal. The gate is coupled to the output terminal of the amplifier, and the output terminal of the pass transistor is coupled to a load. The compensation circuit is coupled between the output terminal of the amplifier and the output terminal of the pass transistor. The compensation circuit has a variable impedance. The bias voltage generator is coupled between the output terminal of the pass transistor and the compensation circuit.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: November 20, 2018
    Assignee: Macronix International Co., Ltd.
    Inventor: Yih-Shan Yang
  • Patent number: 10033562
    Abstract: An envelope signal time delay adjustment apparatus includes a negative group delay unit for converting an envelope signal input from a signal generator into an envelope signal having a group delay of a negative value whose frequency increases from a predetermined frequency band; an envelope-tracking modulator for power-amplifying and outputting the envelope signal output from the negative group delay unit; and a frequency limiting unit for limiting a bandwidth of the envelope-tracking modulator to be lower than an original bandwidth of the envelope-tracking modulator.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: July 24, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seung Hyun Jang, Bong Hyuk Park, Hui Dong Lee
  • Patent number: 9883285
    Abstract: Devices for improving the quality of sound output by a speaker. For example, the device may act to remove ultrasonic frequencies from an audio signal prior to the audio signal being output by a speaker. In other examples, the device may act to impede the progress of harmonic distortion, intermodulation distortion, and environmental noise feeding back into the source device.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: January 30, 2018
    Assignee: RevX Technologies
    Inventors: Michael Brett Butler, Dennis Rauschmayer, Bryan Ross Anderton
  • Patent number: 9680420
    Abstract: An apparatus includes a multi-stage amplifier. The multi-stage amplifier includes first, second, and third amplifier circuits coupled in a cascade configuration. The multi-stage amplifier further includes first, second, and third compensation networks. The first compensation network is coupled between the output of the third amplifier circuit and the input of the second amplifier circuit. The second compensation network is coupled between the output of the third amplifier circuit and the input of the third amplifier circuit. The third compensation network is coupled between the output of the second amplifier circuit and the input of the second amplifier circuit.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: June 13, 2017
    Assignee: Silicon Laboratories Inc.
    Inventors: Gang Yuan, Matthew Powell
  • Patent number: 9667288
    Abstract: The present disclosure includes systems and techniques relating to time-varying notch filter. In one implementation, an apparatus includes a time-variant notch filter and a controller. The time-variant notch filter includes a notch depth and a notch bandwidth centered on a notch frequency. At least one of the notch depth or the notch bandwidth is based on a coefficient of the notch filter. The controller is configured to estimate a power of a packet being received and compare the estimated power of the packet to a predetermined threshold. The controller is also configured to set, conditioned on determining that the estimated power of the packet is greater than the predetermined threshold, a value of the coefficient to a first value such that the packet bypasses the time-variant notch filter.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: May 30, 2017
    Assignee: Marvell International Ltd.
    Inventors: Swaroop Venkatesh, Vijay Ahirwar
  • Patent number: 9651966
    Abstract: A linear regulator includes a drive circuit having an input and an output, with the output configured to drive a control terminal of a power transistor for the delivery of a load current. An error amplifier functions to amplify a difference between a reference signal and a feedback signal to generate an error signal at the input of the drive circuit. A compensation circuit includes a series circuit formed by a compensation capacitor and a variable resistance circuit, where the series circuit is coupled to the input of the drive circuit. A current sensing circuit operates to sense the load current. The resistance of the variable resistance circuit is varied in response to the sensed load current.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: May 16, 2017
    Assignee: STMicroelectronics (China) Investment Co. Ltd
    Inventors: Zhenghao Cui, Kun Kun Zheng
  • Patent number: 9641132
    Abstract: A radio frequency amplification stage comprising: an amplifier for receiving an input signal to be amplified and a power supply voltage; and a power supply voltage stage for supplying said power supply voltage, comprising: means for providing a reference signal representing the envelope of the input signal; means for selecting one of a plurality of supply voltage levels in dependence on the reference signal; and means for generating an adjusted selected power supply voltage, comprising an ac amplifier for amplifying a difference between the reference signal and one of the selected supply voltage level or the adjusted selected supply voltage level, and a summer for summing the amplified difference with the selected supply voltage to thereby generate the adjusted supply voltage.
    Type: Grant
    Filed: March 3, 2015
    Date of Patent: May 2, 2017
    Assignee: SNAPTRACK, INC.
    Inventor: Martin Paul Wilson
  • Patent number: 9484878
    Abstract: Systems, devices, and methods for determining and establishing frequency-dependent gain compensation in wide bandwidth communication systems are disclosed. Variable frequency-dependent gain compensation circuits, or variable equalizers, have settings that configure them to establish discrete frequency-dependent gain compensation. The frequency-dependent gain compensation can include various types and levels of gain slope and/or ripple. The settings of the variable equalizers can be set by control signals established a control circuit in response to signals from an external computer. The variable equalizers are coupled to other circuits or devices and the frequency-dependent gain of the combined circuit are measured. The settings of the variable equalizer are then changed to establish an optimal frequency-dependent gain profile or frequency-dependent gain that is closest to a predetermined frequency-dependent target gain profile. The settings can then be saved in a memory or register.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: November 1, 2016
    Assignee: VIASAT, INC.
    Inventors: Kenneth V Buer, Michael R Lyons
  • Patent number: 9461600
    Abstract: The present invention provides a power gain-boosting technique for an amplifier in order to compensate for the decrease of Gmag in a transistor at high frequencies. A power gain-boosting technique of the present invention comprises the steps of: finding the Maximum Unilateral Gain or Mason's Invariant U of a transistor; designing a linear, lossless, reciprocal network embedding the transistor so that the final equivalent S-, Y-, or Z-parameters satisfy the condition: S ? 21 S 12 = Y 2 ? ? 1 Y 1 ? ? 2 = Z 2 ? ? 1 Z 1 ? ? 2 = - [ ( 2 ? U - 1 ) + 2 ? U ? ( U - 1 ) ] ; embedding the transistor into the linear, lossless, reciprocal network; and constructing simultaneous conjugate matching.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: October 4, 2016
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Sang-Gug Lee, Bao Lam Huu, Suna Kim, Jeong Seon Lee
  • Patent number: 9374119
    Abstract: A communication device is provided. The communication device includes an antenna unit, a sensing unit and a radio frequency unit. The antenna unit is configured to transmit a radio frequency signal. The sensing unit is coupled to a ground terminal through a first capacitor. The sensing unit is configured to sense a capacitance value through the antenna unit. The radio frequency unit is configured to generate the radio frequency signal and to regulate the energy of the radio frequency signal according to the capacitance value.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: June 21, 2016
    Assignees: JIENG TAI INTERNATIONAL ELECTRIC CORP., NATIONAL TAIPEI UNIVERSITY of TECHNOLOGY
    Inventors: Yu-Pang Chou, Chung-Yen Yang, Pei-Zong Rao, Chuo-Hsun Sun
  • Patent number: 9374063
    Abstract: The present invention discloses a gain-boosted N-path SC bandpass filter (GB-BPF) with a number of sought features. It is based on a transconductance amplifier (Gm) with an N-path SC branch as its feedback network, offering 1) double RF filtering at the input and output of the Gm in one step; 2) customized passband gain and bandwidth with input-impedance match, and 3) reduced physical capacitance thanks to the loop gain offered by Gm. All have been examined using a RLC model of the SC branch before applying the linear periodically time-variant (LPTV) analysis to derive the R, L and C expressions and analytically study the harmonic selectivity, harmonic folding and noise. The latter reveals that: 1) the noise due to the switches is notched at the output, allowing smaller switches to save the LO power; and 2) the noises due to the source resistance and Gm are narrowband at the output, reducing the folded noise during harmonic mixing.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: June 21, 2016
    Assignee: UNIVERSITY OF MACAU
    Inventors: Pui-In Mak, Zhicheng Lin, Rui Paulo da Silva Martins
  • Patent number: 9041467
    Abstract: An amplifier circuit amplifies a signal for wireless transmission. A feedback circuit, including a capacitor, is coupled to the amplifier circuit. Components of the feedback circuit are selected based on a feedback factor such that an input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: May 26, 2015
    Assignee: Marvell World Trade Ltd.
    Inventors: Sehat Sutardja, Kan Li, Poh Boon Leong
  • Patent number: 8970305
    Abstract: An amplifier circuit including an amplifier, a first feedback path, and a second feedback path. The amplifier is configured to amplify an input signal in accordance with a gain. The first feedback path includes a first capacitance, and responsive to the input signal being within in a first frequency range, the first feedback path configured to provide feedback from the output of the amplifier to an inverting input of the amplifier. The second feedback path includes a first resistance connected in series with a second capacitance, and responsive to the input signal being within in a second frequency range, the second feedback path is configured to provide feedback from the output of the amplifier to the inverting input of the amplifier. The second frequency range is less than the first frequency range, and the gain of the amplifier levels off according to a value of the second capacitance.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: March 3, 2015
    Assignee: Marvell International Ltd.
    Inventor: Farbod Aram
  • Patent number: 8971831
    Abstract: The present disclosure relates to a front-end system for a radio device, the front-end system comprising a low-noise amplifier (LNA), arranged for receiving a radio frequency input signal (RFIN) and arranged for outputting an amplified radio frequency signal (RFOUT), wherein the low-noise amplifier comprises a first differential amplifier, and a mixer (MIX), arranged for down-converting the amplified radio signal (RFOUT) provided by the low-noise amplifier (LNA) to a baseband signal (BB), by multiplying the amplified radio signal (RFOUT) with a local oscillator (LO) frequency tone, said low-noise amplifier (LNA) and said mixer (MIX) being inductively coupled.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: March 3, 2015
    Assignee: IMEC
    Inventors: Vojkan Vidojkovic, Kristof Vaesen, Piet Wambacq
  • Patent number: 8860401
    Abstract: The present invention provides a sensor system and a corresponding sensing method employing the sensor system. The sensor system comprises a sensor (12) having an input (20) and an output (22), a feedback path (16) from the output to the input, and a filter (14; 92) in the feedback path. The filter comprises a narrow band filter, which is tuned or tunable to a respective one of signals that are wanted signals and signals that represent interference signals. The sensor and the filter are arranged so as to alter the relative amplitudes of the wanted signals and the interference signals in order to increase the relative amplitude of the wanted signals and reduce the relative amplitude of the interference signals.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: October 14, 2014
    Assignee: University of Sussex
    Inventors: Robert Prance, Helen Prance, Christopher Harland
  • Patent number: 8791755
    Abstract: A self-oscillating driver circuit includes a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path includes a feedforward filter which is designed as an active filter. In order to prevent an oscillatory state of the driver circuit at an unwanted frequency, it is proposed that an internal state variable of the feedforward filter be monitored and that the feedforward filter be reset if the value of the monitored internal state variable is outside a predefined range.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: July 29, 2014
    Assignee: Lantiq Deutschland GmbH
    Inventors: Dario Giotta, Thomas Poctscher, David San Segundo Bello, Andreas Wiesbauer
  • Patent number: 8779858
    Abstract: An amplifier circuit comprises a measurement path with an amplifier (1) for providing an output voltage (Vout) depending on a measuring current (Ipd) with a first and a second amplifier input (11, 12), and an amplifier output (13). A return path of the amplifier circuit comprises a first filter (2), an auxiliary amplifier (3) and a second filter (4). In this case, the first filter (2) is designed to filter a DC voltage from the output voltage (Vout) and is connected to the amplifier output (13). The auxiliary amplifier (3) serves to convert an input voltage (Vfil) into an output current (Ifil) and has a first and a second auxiliary amplifier input (31, 32) and an auxiliary amplifier output (33). In this case, the first auxiliary amplifier input (31) is connected to the first filter (2). The second filter (4) is designed to filter noise from the output current (Ifil) and couples the auxiliary amplifier output (33) to the first amplifier input (11).
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: July 15, 2014
    Assignee: ams AG
    Inventors: Mark Niederberger, Vincenzo Leonardo
  • Patent number: 8693676
    Abstract: An apparatus comprising a first line driver, a second line driver, a charge pump, and a control logic circuit coupled to the first line driver and the second line driver and configured to disable the charge pump when both a first control signal associated with the first line driver and a second control signal associated with the second line driver indicate a charge pump disable state. A network component comprising at least one processor configured to implement a method comprising receiving a first control signal and a second control signal, disabling a charge pump when both the first control signal and the second control signal indicate a charge pump disable state, and operating the charge pump to boost a voltage when the first control signal, the second control signal, or both indicate a charge pump active state.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: April 8, 2014
    Assignee: Futurewei Technologies, Inc.
    Inventors: Ruijie Xiao, Guozhu Long, Zhilei Zhao
  • Patent number: 8644773
    Abstract: A multiband low noise amplifier (LNA) with parallel resonant feedback includes an amplifier element configured to receive a radio frequency (RF) signal at an RF input and provide an amplified version of the RF signal at an RF output, a resistive feedback circuit coupled between the RF input and the RF output, and a plurality of series-coupled resonant circuits coupled in series with the resistive feedback circuit between the RF input and the RF output of the amplifier element, wherein each of the resonant circuits is configured to operate as an effective short circuit at a frequency other than a resonant frequency and configured to operate as an effective open circuit at the resonant frequency to decouple the resistive feedback from the amplifier element at each resonant frequency.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: February 4, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventor: Haki Cebi
  • Publication number: 20140028389
    Abstract: A radio frequency system includes a power amplifier that outputs a radio frequency signal to a matching network via a transmission line between the power amplifier and the matching network. A sensor monitors the radio frequency signal and generates first sensor signals based on the radio frequency signal. A distortion module determines a first distortion value according to at least one of (i) a sinusoidal function of the first sensor signals and (ii) a cross-correlation function of the first sensor signals. A first correction circuit (i) generates a first impedance tuning value based on the first distortion value and a first predetermined value, and (ii) provides feedforward control of impedance matching performed within the matching network including outputting the first impedance tuning value to one of the power amplifier and the matching network.
    Type: Application
    Filed: October 2, 2013
    Publication date: January 30, 2014
    Applicant: MKS Instruments, Inc.
    Inventor: David J. COUMOU
  • Patent number: 8638249
    Abstract: In accordance with an embodiment, a method includes determining an amplitude of an input signal provided by a capacitive signal source, compressing the input signal in an analog domain to form a compressed analog signal based on the determined amplitude, converting the compressed analog signal to a compressed digital signal, and decompressing the digital signal in a digital domain to form a decompressed digital signal. In an embodiment, compressing the analog signal includes adjusting a first gain of an amplifier coupled to the capacitive signal source, and decompressing the digital signal comprises adjusting a second gain of a digital processing block.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: January 28, 2014
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 8610497
    Abstract: According to an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first stage and a second stage. The first stage has a voltage follower device including an input terminal configured to be coupled to a first terminal of the capacitive signal source, and a first capacitor having a first end coupled to an output terminal of the voltage follower device, and a second end configured to be coupled to a second terminal of the capacitive signal source. The second stage includes a differential amplifier capacitively coupled to the output terminal of the voltage follower device.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: December 17, 2013
    Assignee: Infineon Technologies AG
    Inventors: Michael Kropfitsch, Jose Luis Ceballos
  • Patent number: 8587378
    Abstract: An analog pre-distortion linearizer having predetermined gain and phase characteristics as a function of input RF signal power is disclosed. The linearizer comprises a core circuit comprising an input terminal configured to receive an input RF signal; an output terminal configured to provide a processed version of that signal; a transistor having a gate, a drain, and a source; and a feedback circuit, presenting an impedance at the frequency of the RF signal, connected to the transistor. The gate is connected to the input terminal and the drain is connected to the output terminal. First and second dc bias voltages applied to the gate and drain respectively cause the transistor to operate at a quiescent bias point in a saturated region of the transistor I-V plane. The quiescent bias point and the impedance are selected such that the linearizer has the predetermined gain and phase characteristics.
    Type: Grant
    Filed: March 11, 2012
    Date of Patent: November 19, 2013
    Inventor: Chandra Khandavalli
  • Patent number: 8558288
    Abstract: Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: October 15, 2013
    Assignee: Life Technologies Corporation
    Inventors: Jonathan M. Rothberg, Wolfgang Hinz, Kim L. Johnson
  • Patent number: 8552798
    Abstract: A method for offset compensation of a switched-capacitor amplifier comprises a reset phase (?1) and at least one working phase (?2). An output voltage (Vout) of the amplifier (amp) is fed according to a damped feedback loop gain (AB(1)) to a first amplifier input (ain1) in the reset phase (?1) as a function of an offset voltage (Voff). In the least one working phase (?2), an offset of the amplifier (amp) is compensated as a function of the offset voltage (Voff) by superimposing the output voltage (Vout) onto an input voltage (Vin) of the amplifier (amp) according to a loop gain (AB(2)).
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: October 8, 2013
    Assignee: AMS AG
    Inventor: Vincenzo Leonardo
  • Publication number: 20130249629
    Abstract: A circuit that includes an amplifier circuit with an input impedance due to an input resistance and an input capacitance of the amplifier circuit. The input impedance of the amplifier circuit may vary with frequency. The amplifier circuit may include an amplifier and a feedback circuit configured to provide feedback to the amplifier and to maintain the input impedance at a specified value at a selected frequency by increasing the input resistance of the amplifier circuit at the selected frequency.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 26, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Scott MCLEOD, Nikola NEDOVIC
  • Patent number: 8508294
    Abstract: In one embodiment, an apparatus includes an amplifier circuit having a phase shift. The amplifier circuit amplifies a signal for wireless transmission. A feedback circuit is coupled to the amplifier circuit and includes a capacitor. An input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit. A total phase shift of the signal for the amplifier circuit and the feedback circuit is less than a threshold.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: August 13, 2013
    Assignee: Marvell World Trade Ltd.
    Inventors: Kan Li, Poh Boon Leong, Sehat Sutardja
  • Patent number: 8392199
    Abstract: A clipping detection device calculates an amplitude distribution of an input signal for each predetermined period, calculates a deflection degree of the distribution on the basis of the calculated amplitude distribution, and then detects clipping of a communication signal on the basis of the calculated deflection degree of the distribution.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: March 5, 2013
    Assignee: Fujitsu Limited
    Inventors: Takeshi Otani, Masakiyo Tanaka, Yasuji Ota, Shusaku Ito
  • Patent number: 8374279
    Abstract: A modulation device includes a signal input for receiving a data stream to be modulated and a first and a second signal output. At least one first complex component is derived from the data stream in a coding device. A first and a second high-frequency signal are output via the signal outputs. The first and second high-frequency signals are derived from the at least one first complex component and are distinguished by the fact that the second high-frequency signal has a phase shift of substantially 90° with respect to the first high-frequency signal.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: February 12, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventors: Bernd Adler, André Hanke
  • Patent number: 8330536
    Abstract: An offset cancellation circuit can include an amplifier having a negative input, a positive input, and a single-ended output, wherein the positive input is configured to receive a reference voltage. The circuit also can include a capacitor having a first terminal and a second terminal. The first terminal can be coupled to the negative input of the amplifier. The capacitor can be configured to sample the offset voltage of the amplifier. The second terminal of the capacitor can be selectively coupled to the output of the amplifier.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: December 11, 2012
    Assignee: Xilinx, Inc.
    Inventor: Patrick J. Quinn
  • Patent number: 8274327
    Abstract: Provided is a switched capacitor amplifier capable of outputting a stable output voltage. The switched capacitor amplifier is capable of operating so as to eliminate a charge/discharge time difference between an input capacitor (18) and an output capacitor (19). Accordingly, in a shift from a hold state to a sample state, for example, even if one terminal voltage (V2) of the output capacitor (19) abruptly increases to an output voltage (VOUT), another terminal voltage (Vs) of the output capacitor (19) does not increase abruptly. In other words, an input voltage to an internal amplifier (11) does not increase abruptly. Therefore, an output voltage of the internal amplifier (11) becomes stable and accordingly the output voltage (VOUT) becomes stable as well.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: September 25, 2012
    Assignee: Seiko Instruments Inc.
    Inventor: Toshiyuki Uchida
  • Patent number: 8232841
    Abstract: An amplifier circuit includes an amplifier including an inverting input that communicates with an input signal, a non-inverting input, and an output. A first feedback path communicates with the inverting input and the output of the amplifier. A second feedback path communicates with the inverting input and the output of the amplifier. The first feedback path provides feedback at a lower frequency than the second feedback path. A first resistance has one end that communicates with the output of the amplifier. A first capacitance has one end that communicates with an opposite end of the load resistance. A second resistance has one end that communicates with the inverting input and an opposite end that communicates with the opposite end of the first resistance.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: July 31, 2012
    Assignee: Marvell International Ltd.
    Inventor: Farbod Aram
  • Publication number: 20120154032
    Abstract: An apparatus and method for DC offset compensation. An amplifier receives an input signal (AIN) and provides an amplified output signal (SOUT) and a feedback path provides DC offset compensation. The feedback path comprises at least one voltage controlled oscillator (VCO) and a counter. The VCO provides, over time, a first VCO output signal based on said amplified output signal and a second VCO output signal based on a reference signal (VREF). The counter generates first pulse counts based upon the first VCO output signal and second pulse counts based upon the second VCO output signal and provides a compensation signal based on a comparison of the first and second pulse counts. One voltage controlled oscillator may sequentially receive a signal based on said amplifier output signal and the reference signal from a multiplexer so as to sequentially produce the first and second VCO output signals.
    Type: Application
    Filed: December 15, 2011
    Publication date: June 21, 2012
    Inventor: John Paul Lesso
  • Patent number: 8193856
    Abstract: An amplifier (V) for an integrated circuit amplifier circuit (IC) having a switched capacitor circuit (Cs, Cf) includes a capacitor for frequency compensation (CC1) that is connected in parallel to an amplifier stage (V2). This amplifier is advantageous because at least one second capacitor for frequency compensation (CC2) is selectively connected in parallel to the first capacitor for frequency compensation (CC1) via a switch controlled by a capacitor switching signal (clk).
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: June 5, 2012
    Assignee: Trident Microsystems (Far East) Ltd.
    Inventors: José Manuel Garcia González, Norbert Greitschus
  • Patent number: 8179200
    Abstract: An amplifier circuit includes an amplifier unit that amplifies a signal received by an input terminal and outputs the amplified signal to an output terminal, a feedback capacitor that is connected between the input terminal of the amplifier and the output terminal, and a controller that varies a capacitance in the feedback capacitor for a certain period when a potential of the output terminal in the amplifier unit becomes higher or lower than a certain potential.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: May 15, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Tadashi Jahana
  • Patent number: 8159292
    Abstract: To efficiently obtain two outputs including one at a normal level and the other at an excessive level. An input signal input to the negative input terminal of an operational amplifier (14) having a negative feedback path is amplified to output an output signal. Signal combining units (18, 20, 22) are provided for adding in a weighted manner a negative input terminal side signal obtained by combining the input signal input to the negative input terminal of the operational amplifier (14) and a feedback signal from the negative feedback path and the output signal from the operational amplifier to output a combined signal, so that two signals, namely the output signal from the operational amplifier (14) and the combined signal, are obtained.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: April 17, 2012
    Assignee: ON Semiconductor Trading Ltd.
    Inventor: Masahito Kanaya
  • Publication number: 20110250853
    Abstract: Embodiments related to the setting of an operating point of an amplifier are described and depicted.
    Type: Application
    Filed: April 9, 2010
    Publication date: October 13, 2011
    Inventors: Andrea CAMUFFO, Chi-Tao GOE, Jan-Erik MUELLER, Nick SHUTE
  • Patent number: 8032093
    Abstract: Embodiments of circuits, devices, and methods for a power detection arrangement are disclosed. The power detection arrangement may have a coupler coupled with, and in between, a switch and an output to couple a signal to a detector. The power detection arrangement may include a harmonic suppressor coupled with, and in between, the coupler and the detector to reduce an amount of harmonic signals transmitted back to the coupler. Other embodiments may be described and claimed.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: October 4, 2011
    Assignee: Triquint Semiconductor, Inc.
    Inventors: Darrell G. Epperson, Gary Lewis, James P. Conlon, Steven A. Brown
  • Publication number: 20110227642
    Abstract: A communication device having an RF power amplifier stage with a Cartesian feedback loop is provided. The loop has forward paths whose outputs are combined to form an output signal that is fed back to a single feedback path. Each forward path has a common path with a filter that filters the overall loop response and a unique split path. The main and auxiliary split paths have a power amplifier and carry signals respectively of lower and higher frequencies. The auxiliary amplifier is faster than the main amplifier. Different phases of the carrier signal are used during upconversion such that the overall phase response through the split paths is equal. Instability recovery problems introduced by higher-order loop filters are mitigated by baseband loop filters with switchable order. Upon detecting instability, the loop filter order is reduced and is subsequently increased after eliminating the unstable operation.
    Type: Application
    Filed: March 16, 2010
    Publication date: September 22, 2011
    Applicant: MOTOROLA, INC.
    Inventors: MIKKEL CHRISTIAN WENDELBOE HOYERBY, NIELS-HENRIK LAI HANSEN
  • Patent number: 8013672
    Abstract: There is provided an integrated circuit having a programmable gain amplifier and an embedded filter. The programmable gain amplifier and the filter comprise a gain element having an inverting input for receiving an input and a feedback signal, a non-inverting input coupled to ground, and an output. The gain element also has one or more feedback loops coupling the output of the gain element to the inverting input of the gain element. Each feedback loop has a switch coupled in series with at least one passive component. Each switch has a first state to connect the corresponding feedback loop and a second state to disconnect the corresponding feedback loop. Each switch is programmatically configurable to provide a first gain and a first bandwidth and a second gain and a second bandwidth such that the first bandwidth is substantially equal to the second bandwidth.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: September 6, 2011
    Assignee: Hong Kong Applied Science and Technology Research Institute Company Limited
    Inventors: Huimin Guo, Shuzuo Lou, Gang Qian, Wai Po Wong
  • Publication number: 20110163804
    Abstract: In one embodiment, an apparatus includes an amplifier circuit having a phase shift. The amplifier circuit amplifies a signal for wireless transmission. A feedback circuit is coupled to the amplifier circuit and includes a capacitor. An input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit. A total phase shift of the signal for the amplifier circuit and the feedback circuit is less than a threshold.
    Type: Application
    Filed: January 3, 2011
    Publication date: July 7, 2011
    Inventor: Kan Li
  • Patent number: 7944288
    Abstract: An SC amplifier arrangement and a method for measuring an input voltage are described.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: May 17, 2011
    Assignee: Infineon Technologies AG
    Inventor: Detlef Ummelmann
  • Publication number: 20110017904
    Abstract: The invention relates to a transimpedance amplifier circuit for converting an input current into an output voltage Uout?, comprising an amplifier element (4) having at least one signal input and an output having the output voltage Uout. For this purpose, the transimpedance amplifier circuit has a T-shaped feedback network divided into at least a first branch (1), a second branch (2) and a third branch (3), which is connected in series with the first branch (1), thus producing a node (K). The first branch (1) has a non-reactive resistance (R1) and is connected to the output at one end and the node (K) at the other end. The second branch (2) has at least one capacitance C2 and is connected to the node (K) at one end and in particular to an earth at the other end, and the third branch (3) has at least one capacitance C3 and is connected to the node (K) at one end and to the signal input at the other end. As a result, a capacitive current division is effected at the node (K).
    Type: Application
    Filed: August 14, 2008
    Publication date: January 27, 2011
    Applicant: LEICA GEOSYSTEMS AG
    Inventor: Reto Stutz
  • Patent number: 7872524
    Abstract: [Problems] to provide a CMOS low-noise amplification circuit which can reduce a chip area and design time, and which is easy to be digital-controlled from outside. [Means For Solving the Problems] The amplification circuit includes; an amplification stage (12) which amplifies an input signal up to an intended value; a sample and hold circuit (13) which samples the output signal from the amplification stage (12) by sampling the output signal with a sampling frequency which is at least twice the frequency band of the output signal to convert the output signal to a discrete time signal; a moving average calculation unit (15) which selects and outputs a particular frequency from the discrete time signal outputted from the sample and hold circuit (13) by a moving average operation; and a smoothing filter (17) which smoothes the output signal from the moving average calculation unit (15) and feed it back to the input of the amplification stage (12).
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: January 18, 2011
    Assignee: NEC Corporation
    Inventors: Haruya Ishizaki, Masayuki Mizuno
  • Patent number: 7852152
    Abstract: According to one embodiment of the invention, a circuit comprising a plurality of operational transconductance amplifiers (OTAS) is described. The first OTA has differential input and differential output. The second OTA also has differential input, where a first output of the first OTA is coupled to the first differential input of the second OTA, which is an inverting input. A second output of the first OTA is coupled to the second input of the second OTA, which is a non-inverting input. The first differential output being coupled to a first input of the first OTA and the second differential output being coupled to a second input of the first OTA for negative feedback and current biasing.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: December 14, 2010
    Assignee: Menara Networks
    Inventors: Dalius Baranauskas, Denis Zelenin, Matthias Bussmann, Salam Elahmadi
  • Publication number: 20100171551
    Abstract: An amplifier (V) for an integrated circuit amplifier circuit (IC) having a switched capacitor circuit (Cs, Cf) includes a capacitor for frequency compensation (CC1) that is connected in parallel to an amplifier stage (V2). This amplifier is advantageous because at least one second capacitor for frequency compensation (CC2) is selectively connected in parallel to the first capacitor for frequency compensation (CC1) via a switch controlled by a capacitor switching signal (clk).
    Type: Application
    Filed: December 1, 2009
    Publication date: July 8, 2010
    Inventors: José Manuel Garcia González, Norbert Greitschus
  • Patent number: 7733173
    Abstract: A unilateral feedback power amplifier utilizes new feedback techniques and devices to make the amplified high-frequency signal unilateral, let the output power, power gain and impedance matching simultaneously accomplish the optimal values, and enhance the stability of the system. In this feedback amplifier, a generalized multi-port feedback circuit is in shunt with the input terminal and the output terminal of the power transistor. This generalized multi-port feedback circuit receives an amplified high-frequency signal and eliminates the reverse admittance of the amplified high-frequency signal to let the admittance value of the output amplified high-frequency signal approach zero so as to be unilateral. Moreover, the generalized multi-port feedback power amplifier differs from the conventional power amplifier of cascaded architecture in that the ground terminal of the power transistor is directly connected to the system ground.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: June 8, 2010
    Assignee: National Taiwan University
    Inventors: Zuo-Min Tsai, George D. Vendelin, Huei Wang