Abstract: According to an embodiment, a system for amplifying a signal provided by a capacitive signal source includes a first stage and a second stage. The first stage has a voltage follower device including an input terminal configured to be coupled to a first terminal of the capacitive signal source, and a first capacitor having a first end coupled to an output terminal of the voltage follower device, and a second end configured to be coupled to a second terminal of the capacitive signal source. The second stage includes a differential amplifier capacitively coupled to the output terminal of the voltage follower device.

Abstract: An analog pre-distortion linearizer having predetermined gain and phase characteristics as a function of input RF signal power is disclosed. The linearizer comprises a core circuit comprising an input terminal configured to receive an input RF signal; an output terminal configured to provide a processed version of that signal; a transistor having a gate, a drain, and a source; and a feedback circuit, presenting an impedance at the frequency of the RF signal, connected to the transistor. The gate is connected to the input terminal and the drain is connected to the output terminal. First and second dc bias voltages applied to the gate and drain respectively cause the transistor to operate at a quiescent bias point in a saturated region of the transistor I-V plane. The quiescent bias point and the impedance are selected such that the linearizer has the predetermined gain and phase characteristics.

Abstract: Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.

Abstract: A method for offset compensation of a switched-capacitor amplifier comprises a reset phase (?1) and at least one working phase (?2). An output voltage (Vout) of the amplifier (amp) is fed according to a damped feedback loop gain (AB(1)) to a first amplifier input (ain1) in the reset phase (?1) as a function of an offset voltage (Voff). In the least one working phase (?2), an offset of the amplifier (amp) is compensated as a function of the offset voltage (Voff) by superimposing the output voltage (Vout) onto an input voltage (Vin) of the amplifier (amp) according to a loop gain (AB(2)).

Abstract: A circuit that includes an amplifier circuit with an input impedance due to an input resistance and an input capacitance of the amplifier circuit. The input impedance of the amplifier circuit may vary with frequency. The amplifier circuit may include an amplifier and a feedback circuit configured to provide feedback to the amplifier and to maintain the input impedance at a specified value at a selected frequency by increasing the input resistance of the amplifier circuit at the selected frequency.

Abstract: In one embodiment, an apparatus includes an amplifier circuit having a phase shift. The amplifier circuit amplifies a signal for wireless transmission. A feedback circuit is coupled to the amplifier circuit and includes a capacitor. An input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit. A total phase shift of the signal for the amplifier circuit and the feedback circuit is less than a threshold.

Abstract: A clipping detection device calculates an amplitude distribution of an input signal for each predetermined period, calculates a deflection degree of the distribution on the basis of the calculated amplitude distribution, and then detects clipping of a communication signal on the basis of the calculated deflection degree of the distribution.

Abstract: A modulation device includes a signal input for receiving a data stream to be modulated and a first and a second signal output. At least one first complex component is derived from the data stream in a coding device. A first and a second high-frequency signal are output via the signal outputs. The first and second high-frequency signals are derived from the at least one first complex component and are distinguished by the fact that the second high-frequency signal has a phase shift of substantially 90° with respect to the first high-frequency signal.

Abstract: An offset cancellation circuit can include an amplifier having a negative input, a positive input, and a single-ended output, wherein the positive input is configured to receive a reference voltage. The circuit also can include a capacitor having a first terminal and a second terminal. The first terminal can be coupled to the negative input of the amplifier. The capacitor can be configured to sample the offset voltage of the amplifier. The second terminal of the capacitor can be selectively coupled to the output of the amplifier.

Abstract: Provided is a switched capacitor amplifier capable of outputting a stable output voltage. The switched capacitor amplifier is capable of operating so as to eliminate a charge/discharge time difference between an input capacitor (18) and an output capacitor (19). Accordingly, in a shift from a hold state to a sample state, for example, even if one terminal voltage (V2) of the output capacitor (19) abruptly increases to an output voltage (VOUT), another terminal voltage (Vs) of the output capacitor (19) does not increase abruptly. In other words, an input voltage to an internal amplifier (11) does not increase abruptly. Therefore, an output voltage of the internal amplifier (11) becomes stable and accordingly the output voltage (VOUT) becomes stable as well.

Abstract: An amplifier circuit includes an amplifier including an inverting input that communicates with an input signal, a non-inverting input, and an output. A first feedback path communicates with the inverting input and the output of the amplifier. A second feedback path communicates with the inverting input and the output of the amplifier. The first feedback path provides feedback at a lower frequency than the second feedback path. A first resistance has one end that communicates with the output of the amplifier. A first capacitance has one end that communicates with an opposite end of the load resistance. A second resistance has one end that communicates with the inverting input and an opposite end that communicates with the opposite end of the first resistance.

Abstract: An apparatus and method for DC offset compensation. An amplifier receives an input signal (AIN) and provides an amplified output signal (SOUT) and a feedback path provides DC offset compensation. The feedback path comprises at least one voltage controlled oscillator (VCO) and a counter. The VCO provides, over time, a first VCO output signal based on said amplified output signal and a second VCO output signal based on a reference signal (VREF). The counter generates first pulse counts based upon the first VCO output signal and second pulse counts based upon the second VCO output signal and provides a compensation signal based on a comparison of the first and second pulse counts. One voltage controlled oscillator may sequentially receive a signal based on said amplifier output signal and the reference signal from a multiplexer so as to sequentially produce the first and second VCO output signals.

Abstract: An amplifier (V) for an integrated circuit amplifier circuit (IC) having a switched capacitor circuit (Cs, Cf) includes a capacitor for frequency compensation (CC1) that is connected in parallel to an amplifier stage (V2). This amplifier is advantageous because at least one second capacitor for frequency compensation (CC2) is selectively connected in parallel to the first capacitor for frequency compensation (CC1) via a switch controlled by a capacitor switching signal (clk).

Abstract: An amplifier circuit includes an amplifier unit that amplifies a signal received by an input terminal and outputs the amplified signal to an output terminal, a feedback capacitor that is connected between the input terminal of the amplifier and the output terminal, and a controller that varies a capacitance in the feedback capacitor for a certain period when a potential of the output terminal in the amplifier unit becomes higher or lower than a certain potential.

Abstract: To efficiently obtain two outputs including one at a normal level and the other at an excessive level. An input signal input to the negative input terminal of an operational amplifier (14) having a negative feedback path is amplified to output an output signal. Signal combining units (18, 20, 22) are provided for adding in a weighted manner a negative input terminal side signal obtained by combining the input signal input to the negative input terminal of the operational amplifier (14) and a feedback signal from the negative feedback path and the output signal from the operational amplifier to output a combined signal, so that two signals, namely the output signal from the operational amplifier (14) and the combined signal, are obtained.

Abstract: Embodiments related to the setting of an operating point of an amplifier are described and depicted.

Abstract: Embodiments of circuits, devices, and methods for a power detection arrangement are disclosed. The power detection arrangement may have a coupler coupled with, and in between, a switch and an output to couple a signal to a detector. The power detection arrangement may include a harmonic suppressor coupled with, and in between, the coupler and the detector to reduce an amount of harmonic signals transmitted back to the coupler. Other embodiments may be described and claimed.

Abstract: A communication device having an RF power amplifier stage with a Cartesian feedback loop is provided. The loop has forward paths whose outputs are combined to form an output signal that is fed back to a single feedback path. Each forward path has a common path with a filter that filters the overall loop response and a unique split path. The main and auxiliary split paths have a power amplifier and carry signals respectively of lower and higher frequencies. The auxiliary amplifier is faster than the main amplifier. Different phases of the carrier signal are used during upconversion such that the overall phase response through the split paths is equal. Instability recovery problems introduced by higher-order loop filters are mitigated by baseband loop filters with switchable order. Upon detecting instability, the loop filter order is reduced and is subsequently increased after eliminating the unstable operation.

Abstract: There is provided an integrated circuit having a programmable gain amplifier and an embedded filter. The programmable gain amplifier and the filter comprise a gain element having an inverting input for receiving an input and a feedback signal, a non-inverting input coupled to ground, and an output. The gain element also has one or more feedback loops coupling the output of the gain element to the inverting input of the gain element. Each feedback loop has a switch coupled in series with at least one passive component. Each switch has a first state to connect the corresponding feedback loop and a second state to disconnect the corresponding feedback loop. Each switch is programmatically configurable to provide a first gain and a first bandwidth and a second gain and a second bandwidth such that the first bandwidth is substantially equal to the second bandwidth.

Abstract: In one embodiment, an apparatus includes an amplifier circuit having a phase shift. The amplifier circuit amplifies a signal for wireless transmission. A feedback circuit is coupled to the amplifier circuit and includes a capacitor. An input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit. A total phase shift of the signal for the amplifier circuit and the feedback circuit is less than a threshold.

Abstract: An SC amplifier arrangement and a method for measuring an input voltage are described.

Abstract: The invention relates to a transimpedance amplifier circuit for converting an input current into an output voltage Uout?, comprising an amplifier element (4) having at least one signal input and an output having the output voltage Uout. For this purpose, the transimpedance amplifier circuit has a T-shaped feedback network divided into at least a first branch (1), a second branch (2) and a third branch (3), which is connected in series with the first branch (1), thus producing a node (K). The first branch (1) has a non-reactive resistance (R1) and is connected to the output at one end and the node (K) at the other end. The second branch (2) has at least one capacitance C2 and is connected to the node (K) at one end and in particular to an earth at the other end, and the third branch (3) has at least one capacitance C3 and is connected to the node (K) at one end and to the signal input at the other end. As a result, a capacitive current division is effected at the node (K).

Abstract: [Problems] to provide a CMOS low-noise amplification circuit which can reduce a chip area and design time, and which is easy to be digital-controlled from outside. [Means For Solving the Problems] The amplification circuit includes; an amplification stage (12) which amplifies an input signal up to an intended value; a sample and hold circuit (13) which samples the output signal from the amplification stage (12) by sampling the output signal with a sampling frequency which is at least twice the frequency band of the output signal to convert the output signal to a discrete time signal; a moving average calculation unit (15) which selects and outputs a particular frequency from the discrete time signal outputted from the sample and hold circuit (13) by a moving average operation; and a smoothing filter (17) which smoothes the output signal from the moving average calculation unit (15) and feed it back to the input of the amplification stage (12).

Abstract: According to one embodiment of the invention, a circuit comprising a plurality of operational transconductance amplifiers (OTAS) is described. The first OTA has differential input and differential output. The second OTA also has differential input, where a first output of the first OTA is coupled to the first differential input of the second OTA, which is an inverting input. A second output of the first OTA is coupled to the second input of the second OTA, which is a non-inverting input. The first differential output being coupled to a first input of the first OTA and the second differential output being coupled to a second input of the first OTA for negative feedback and current biasing.

Abstract: An amplifier (V) for an integrated circuit amplifier circuit (IC) having a switched capacitor circuit (Cs, Cf) includes a capacitor for frequency compensation (CC1) that is connected in parallel to an amplifier stage (V2). This amplifier is advantageous because at least one second capacitor for frequency compensation (CC2) is selectively connected in parallel to the first capacitor for frequency compensation (CC1) via a switch controlled by a capacitor switching signal (clk).

Abstract: A unilateral feedback power amplifier utilizes new feedback techniques and devices to make the amplified high-frequency signal unilateral, let the output power, power gain and impedance matching simultaneously accomplish the optimal values, and enhance the stability of the system. In this feedback amplifier, a generalized multi-port feedback circuit is in shunt with the input terminal and the output terminal of the power transistor. This generalized multi-port feedback circuit receives an amplified high-frequency signal and eliminates the reverse admittance of the amplified high-frequency signal to let the admittance value of the output amplified high-frequency signal approach zero so as to be unilateral. Moreover, the generalized multi-port feedback power amplifier differs from the conventional power amplifier of cascaded architecture in that the ground terminal of the power transistor is directly connected to the system ground.

Abstract: A demodulator is provided for demodulating an amplitude-modulated input signal defined by a carrier signal having a carrier frequency modulated by a modulating signal, the demodulator including an amplifier stage having a gain and structured to receive the amplitude-modulated input signal, and a gain control stage coupled to the amplifier stage and configured to vary the gain of the amplifier stage according to the carrier frequency of the carrier signal.

Abstract: The present invention discloses an LDO (Low DropOut) linear voltage regulator, which is based on an NMC (Nested Miller Compensation) architecture and can be capacitor-free, wherein an active resistor is added to the feedback path of the Miller compensation capacitor to increase the controllability of the damping factor, solve the problem of extensively using the output capacitor with a parasitic resistance, and solve the problem that a compromise must be made between the damping factor control and the system loop gain. Further, the present invention utilizes a capacitor-sharing technique to reduce the Miller capacitance required by the entire system and accelerate the stabilization of output voltage without influencing stability.

Abstract: An amplifier circuit includes first, second, and third amplifiers each having an input and an output. The amplifier circuit further includes first and second capacitances and a resistance. The input of the second amplifier communicates with the output of the first amplifier. The first capacitance communicates with the input of the first amplifier and the output of the second amplifier. The input of the third amplifier communicates with the output of the second amplifier. The second capacitance communicates with the output of the third amplifier and the input of the second amplifier. The resistance directly communicates with the output of the third amplifier and the input of the first amplifier.

Abstract: The present invention solves characteristic deterioration caused by peaking and a ground inductance, and provides a transimpedance amplifier capable of achieving a higher gain and a wider band. For this purpose, the transimpedance amplifier is configured to include a feedback circuit having two or more extreme frequencies and having a filter characteristic which is flat with respect to frequencies in a frequency region not more than a smallest extreme frequency among the extreme frequencies, which is flat with respect to frequencies in a frequency region not less than a largest extreme frequency among the extreme frequencies, and which has at least one negative inclination portion with respect to frequencies in a frequency region between the smallest and largest extreme frequencies.

Abstract: A circuit arrangement and method for improving load regulation in an amplifier (e.g., LDO amplifier) uses a feedback circuit including a parallely connected feedback resistance Rf and a noise reduction feedback capacitance Cf, wherein an external capacitance has equivalent series resistance (ESR). The circuit arrangement includes a resistance Resr in the amplifier output, a junction point of the feedback resistance Rf and the feedback capacitor Cf being connected to a negative input of the LDO amplifier. Additionally, the circuit arrangement might include a resistance Rintentional in between Cf and Rf. The circuit arrangement provides good load regulation and better stability without increase in power/area. The arrangement supports external feedback mode providing design flexibility without compromising amplifier-stability, which provides high output current drive capability or enables driving heavy output capacitance.

Abstract: According to one embodiment of the invention, a circuit comprising a plurality of operational transconductance amplifiers (OTAS) is described. The first OTA has differential input and differential output. The second OTA also has differential input, where a first output of the first OTA is coupled to the first differential input of the second OTA, which is an inverting input. A second output of the first OTA is coupled to the second input of the second OTA, which is a non-inverting input. The first differential output being coupled to a first input of the first OTA and the second differential output being coupled to a second input of the first OTA for negative feedback and current biasing.

Abstract: [Problems] to provide a CMOS low-noise amplification circuit which can reduce a chip area and design time, and which is easy to be digital-controlled from outside. [Means For Solving the Problems] The amplification circuit includes; an amplification stage (12) which amplifies an input signal up to an intended value; a sample and hold circuit (13) which samples the output signal from the amplification stage (12) by sampling the output signal with a sampling frequency which is at least twice the frequency band of the output signal to convert the output signal to a discrete time signal; a moving average calculation unit (15) which selects and outputs a particular frequency from the discrete time signal outputted from the sample and hold circuit (13) by a moving average operation; and a smoothing filter (17) which smoothes the output signal from the moving average calculation unit (15) and feed it back to the input of the amplification stage (12).

Abstract: An amplifier circuit comprises a first capacitance having one end that communicates with an input of a first amplifier stage. An amplifier has a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance has a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of a second amplifier stage. A broadband buffer has an input that communicates with the output of the amplifier and an output that communicates with the one end of the second capacitance.

Abstract: A switched capacitor CMOS amplifier uses a first stage non-inverting CMOS amplifier driving a second stage inverting CMOS amplifier. The first stage amplifier is provided with positive feedback to substantially increase the gain of the first stage amplifier. In the described examples, the positive feedback is provided either by connecting a capacitor from the output to the input of the first stage amplifier or by connecting a shunt transistor in parallel with an input transistor and driving the transistor from the output of the first stage amplifier. The substantially increased gain resulting from the positive feedback allows the gain of the switched capacitor amplifier to be set by the ratio of the capacitance of an input capacitor to the capacitance of a feedback capacitor. The amplifier also includes switching transistors for periodically discharging the input capacitor and the feedback capacitor.

Abstract: A Cartesian loop transmitter having isolator eliminator circuitry is presented. The isolator eliminator circuitry includes a set of low pass and wide band pass as well as narrow band pass filters for each of I- and Q-channels, root mean square detectors and dividers connected to a means for comparing. Signals from the means for comparing are received by a microprocessor which controls attenuation setting. The output level of the transmitter is adjusted by generating a small signal measuring an on-channel signal level and a small signal level and then calculating a ratio of the small signal to the on-channel signal. The attenuation setting is increased if the ratio exceeds a defined threshold.

Abstract: A unilateral feedback power amplifier utilizes new feedback techniques and devices to make the amplified high-frequency signal unilateral, let the output power, power gain and impedance matching simultaneously accomplish the optimal values, and enhance the stability of the system. In this feedback amplifier, a generalized multi-port feedback circuit is in shunt with the input terminal and the output terminal of the power transistor. This generalized multi-port feedback circuit receives an amplified high-frequency signal and eliminates the reverse admittance of the amplified high-frequency signal to let the admittance value of the output amplified high-frequency signal approach zero so as to be unilateral. Moreover, the generalized multi-port feedback power amplifier differs from the conventional power amplifier of cascaded architecture in that the ground terminal of the power transistor is directly connected to the system ground.

Abstract: An amplifier circuit includes a first amplifier having an input and an output, and a second amplifier having an input that communicates with the output of the first amplifier, and an output. The amplifier circuit includes a first capacitance that communicates with the input of the first amplifier and the output of the second amplifier. The amplifier circuit includes a third amplifier having an input that communicates with the output of the second amplifier, and an output. The amplifier circuit includes a second capacitance that communicates with the output of the third amplifier and the input of the second amplifier.

Abstract: Embodiments related to resistive feedback amplifiers are presented herein.

Abstract: An amplifier circuit comprises a first capacitance having one end that communicates with an input of a first amplifier stage. An amplifier has a first gain, an input that communicates with an opposite end of the first capacitance, and an output. A second capacitance has a first end that communicates with the output of the amplifier and an opposite end that communicates with an input of a second amplifier stage. A broadband buffer has an input that communicates with the output of the amplifier and an output that communicates with the one end of the second capacitance.

Abstract: A method for double sampling loop negative feedback comprising: obtaining a low-frequency feedback signal from the output of the amplifier; obtaining a high-frequency feedback signal from part of the amplifier of which high-frequency phase shift is low, wherein two-ways sampling signals have the same amplifying phase; combining the two-ways sampling signals together using a series capacitor-inductor double signal combining circuit to form one signal, the signal having low phase shift at both high and low-frequency and being used for negative loop feedback. The invention also provides a double negative feedback amplifier using the method.

Abstract: An operational amplifier circuit is described. The operational amplifier circuit includes an operational amplifier, a high-pass filter portion, and a feedback loop, wherein the operational amplifier circuit is configured to output an amplified filtered version of a bio-signal. The operational amplifier includes a non-inverting input terminal, and an inverting input terminal, wherein the inverting input terminal and the non-inverting input terminal are configured to be coupled to a common reference potential through resistors. The high-pass filter portion is configured to receive a bio-signal as input and to provide input to the non-inverting input terminal of the operational amplifier. The feedback loop includes a low-pass filter portion, wherein the low-pass filter portion is configured to receive input from an output of the operational amplifier and to provide input to the inverting input terminal of the operational amplifier.

Abstract: A unilateral feedback power amplifier utilizes new feedback techniques and devices to make the amplified high-frequency signal unilateral, let the output power, power gain and impedance matching simultaneously accomplish the optimal values, and enhance the stability of the system. In this feedback amplifier, a generalized multi-port feedback circuit is in shunt with the input terminal and the output terminal of the power transistor. This generalized multi-port feedback circuit receives an amplified high-frequency signal and eliminates the reverse admittance of the amplified high-frequency signal to let the admittance value of the output amplified high-frequency signal approach zero so as to be unilateral. Moreover, the generalized multi-port feedback power amplifier differs from the conventional power amplifier of cascaded architecture in that the ground terminal of the power transistor is directly connected to the system ground.

Abstract: In accordance with the present invention there is those provided a Cartesian loop transmitter having an isolator eliminator circuitry comprising a set of low pass and band pass filters for each of an I- and Q-channels, root mean square detectors and a divider connected to a comparator are received by a microprocessor which controls attenuation setting. There is also provided a method of adjusting an output level of such transmitter. Said method comprises the step of measuring an on-channel signal level and a noise level and then calculating a ratio of said noise to said on-channel signal. If the ratio exceeds a defined threshold an attenuation of the input attenuators is increased.

Abstract: An operational amplifier is described. The operational amplifier includes a first stage, a second stage, a third stage, and a fourth stage. The amplifier includes a nested transconductance-capacitance compensation configuration. The third stage includes class AB control mechanism. The fourth stage includes a class AB output stage.

Abstract: A frequency compensation device for providing added compensation to an operational amplifier, such as a bipolar or MOS rail-to-rail output operational amplifier, when the output device of the operational amplifier is in saturation. The device comprises a detector circuit for detecting those conditions which can cause the output device to go into saturation. When saturation is detected, an auxiliary frequency compensation device provides added frequency. Thereby, in a normal mode of operation, the op-amp is not overcompensated. Yet, when an output device becomes saturated, the auxiliary compensation is added to improve stability and prevent the op-amp from becoming oscillatory.

Abstract: A negative feedback system includes a first summation module for receiving a system input and outputting a first summation output. A first forward module is coupled to the first summation module for receiving the first summation output and outputting a first forward output. A feedback module is coupled to the first summation module for receiving the first forward output and outputting a feedback output to the first summation module, wherein the first summation output equals the system input minus the feedback output. An error compensation module, having a compensation gain, is coupled to the first summation module for receiving the first summation output and outputting an error compensation output. The compensation gain is adjusted to provide the error compensation output with a predetermined value, such that an output error of a system output is substantially eliminated by combining the error compensation output with the first forward output.

Abstract: An amplitude adjustment device such as an amplitude compression device and amplitude expansion device is basically configured by a PWM modulator, a demodulator and an amplitude detector. Herein, the PWM modulator effects pulse-width modulation on an input signal to produce a pulse-width modulated signal, which is demodulated by the demodulator to produce an output signal. In addition, the amplitude detector detects an amplitude of a demodulated signal or an amplitude of the input signal to produce a control signal. A modulation factor of the pulse-width modulation is adjusted based on the control signal. In the case of the amplitude compression device, an input/output gain is changed inversely proportional to the amplitude of the input signal or amplitude of the output signal. Thus, it is possible to compress a dynamic range with respect to input/output characteristics.

Abstract: In a communications receiver for quadrature demodulation, a feedback technique for reducing the image response of the receiver. The communications receiver includes an I demodulator and a Q demodulator. A local oscillator (LO) signal is provided by a PLL to a quadrature LO generator that provides an LO_I signal to an I demodulator and an LO_Q signal to a Q demodulator. The LO_I and LO_Q signals are amplitude and phase-controlled versions of the LO signal. An image/signal ratio (I/S) detector detects the relative phase difference and the relative amplitude difference between the respective output terminals of the I demodulator and the Q demodulator and applies an amplitude control signal and a phase control signal to corresponding amplitude control and phase control inputs of the quadrature LO generator. The I/S detector calibrates the quadrature LO generator during the interstitial interval between the reception of data packets.

Abstract: A circuit for selectively controlling signal baseline and frequency emphasis. An amplifier with selectively controllable feedback circuitry allows higher frequency components of a signal to be emphasized over lower frequency components while also allowing control over the baseline of the signal. Additionally, a multiplexed video signal interface provides a multiplexed component video signal which includes component video signals with OSD data and user-controllable contrast, video gain and signal baseline, along with the ability to individually control such signal components.