Abstract: An amplifier system may include a power stage having inputs for three different supply voltages and an output for coupling to a load, a controller to generate control signals to the power stage that cause the power stage to vary an output voltage applied to the load among more than three distinct voltage levels, a monitor to provide a first control signal to the controller based on an input voltage signal, and a feedback system to provide a second control signal to the controller based on comparison of the output voltage and the input signal.

Abstract: The invention may be embodied in a resynchronizing, push-pull drive circuit for driving the gate electrodes of a digital Class-S Radio Frequency Power Amplifier (RF-PA). A binary bitstream received from a bitstream generator, such as a sigma-delta modulator, Viterbi-based optimal-bit-pattern modulator sigma-delta, or other suitable modulator, is resynchronized to a low-jitter master clock, then converted to fast-rise, high-swing complementary digital signals to drive the gates of the Class-S RF-PA. The drive circuit provides a high slew-rate, large-swing, quasi-digital gate drive circuit to drive the significant gate capacitance of the RF-PA with sufficient rise times. A combination of bipolar transistor current switches and cascoded CMOS devices is employed to attain requisite performance. For example, the driving circuit is well suited for use with Class-S RF-PAs used in wireless communication systems.

Abstract: The present application describes an apparatus and method for reducing distortion in a class-D amplifier. The power output section of the amplifier is driven by an adjusted PWM signal, rather than by a PWM signal created directly from the input analog signal. A reference output, designed to closely track the input analog signal, is compared to the amplifier output. The resulting difference is an error signal which is inverted and summed with a second analog signal corresponding to the directly created PWM signal and changes the timing of the voltage transitions of the second analog signal. The changed voltage transitions are used to create the adjusted PWM signal. The inversion of the error signal causes negative feedback which results in the adjustment of the PWM signal being in a direction which reduces the error signal and thus the distortion of the amplifier.

Abstract: There is disclosed a driver circuit for a power amplifier of class D type having a segmented architecture with at least one current branch which can be powered down in a low power mode of operation of the circuit. The branch comprising a switch with a cascode MOS transistor, the circuit further comprises a bias circuitry adapted for dynamically generating a dynamic bias control signal so as to cause the cascode MOS transistor of the switch to be ‘Off’ in the low power mode.

Abstract: The invention may be embodied in a resynchronizing, push-pull drive circuit for driving the gate electrodes of a digital Class-S Radio Frequency Power Amplifier (RF-PA). A binary bitstream received from a bitstream generator, such as a sigma-delta modulator, Viterbi-based optimal-bit-pattern modulator sigma-delta, or other suitable modulator, is resynchronized to a low-jitter master clock, then converted to fast-rise, high-swing complementary digital signals to drive the gates of the Class-S RF-PA. The drive circuit provides a high slew-rate, large-swing, quasi-digital gate drive circuit to drive the significant gate capacitance of the RF-PA with sufficient rise times. A combination of bipolar transistor current switches and cascoded CMOS devices is employed to attain requisite performance. For example, the driving circuit is well suited for use with Class-S RF-PAs used in wireless communication systems.

Abstract: A switching amplifier is provided. The switching amplifier includes an input unit which receives an audio signal; a first switching device and a second switching device which switch and output the audio signal; a first snubber circuit which is commonly connected to the first and second switching devices and which reduces overshoot of the audio signal that is output by the first and second switching devices via switching; and a second snubber circuit which is commonly connected to the first and second switching devices, which is connected in parallel to the first snubber circuit and which reduces the overshoot of the audio signal, wherein the first and second snubber circuits alternately reduce the overshoot of the audio signal.

Abstract: A switching amplifying method or a switching amplifier for obtaining one or more than one linearly amplified replicas of an input signal, is highly efficient, and does not have the disadvantage of “dead time” problem related to the class D amplifiers. Said switching amplifying method comprises the steps of: receiving the input signal; pulse modulating the input signal for generating a pulse modulated signal; switching at least one pulsed current flowing to a first input terminal of a filter according to the pulse modulated signal when the polarity of the input signal is positive; switching at least one pulsed current flowing from the first input terminal of the filter according to the pulse modulated signal when the polarity of the input signal is negative; filtering all said pulsed currents flowing through the first input terminal for getting an output signal.

Abstract: An electrostatic transducer loudspeaker includes a filterless class-D amplifier to modulate an audio input signal to generate a modulated signal containing a PWM switching carrier component, and a transformer directly connected at an output side of the filterless class-D amplifier and directly connected at an input side of an electrostatic transducer, whereby the equivalent capacitance of the electrostatic transducer and the equivalent inductance of the transformer establish a resonance circuit to demodulate the modulated signal to generate an AC voltage to drive the electrostatic transducer.

Abstract: A super-efficient single-stage switching power amplifier is realized by not incorporating a rectification process in its power conversion loop while incorporating a bidirectional active clamping circuit to not only remove or maximally reduce otherwise occurring disruptive ringing and spikes but also convert the energy otherwise associated with the ringing and spikes to return energy that goes back to the DC power supply.

Abstract: A system includes a power supply model component and a disturbance estimating component. The power supply model component receives an estimated disturbance. The disturbance estimating component provides said estimated disturbance from a difference between a sensed output of a power supply and an estimated output from said power supply model component.

Abstract: Circuits and methods for over-current protection of pulse-width modulation systems such as switch mode class D audio systems, DC-to-DC converters, or switch mode power supplies have been disclosed. Over-current protection has been achieved by introducing supply-scalable pulses to bring the modulation index of PWM pulses to a safe level. Additionally to the over-current protection a recovery circuit and method to be applied right after an over-current situation has been disclosed.

Abstract: A radio frequency (RF) transmitter is provided. The RF transmitter includes first and second drivers that are configured to receive first and second sets of complementary RF signals. Restoration circuits are coupled to the first and second drivers, and a bridge circuit is coupled to the first and second restoration circuits. By having the restoration circuits and the bridge circuit, a common mode impedance and a differential impedance can be provided, where the common mode impedance is lower than the differential impedance.

Abstract: An amplifier may use pulse-width modulators controlling respective sets of switches to produce an amplified version of a source signal. A phase locked loop in the amplifier may generate a differential clock signal. A first processing element operating according to a first supply voltage may generate a PWM signal representative of the source signal, and also generate a clock enable signal corresponding to the differential clock signal. A second processing element (PE2) may receive the differential clock signal, the PWM signal, and the clock enable signal, and level shift the PWM signal and the clock enable signal to operate according to a second supply voltage, and may generate a resampling clock signal from the differential clock signal according to the level shifted clock enable signal. The PE2 may provide a PWM output signal representative of the source signal by resampling the level shifted PWM signal with the resampling clock signal.

Abstract: A signal processing device includes: an amplifier, a bandwidth of which can be switched, and a controller which is configured to perform control to operate the amplifier in a wide bandwidth for a constant time after start of a signal input to the amplifier and then operate the amplifier in a narrow bandwidth thereafter.

Abstract: A beat frequency cancellation circuit, for an amplifier, includes a coupling device connected between two signal processing paths of the amplifier for compensating for beat frequency effects of output signals between the signal processing paths.

Abstract: Systems, methods and apparatus are disclosed for amplifiers for wireless power transfer. In one aspect a method is provided for controlling operation of an amplifier, such as a class E amplifier. The method may include monitoring an output of the amplifier. The method may further include adjusting a timing of an enabling switch of the amplifier based on the output of the amplifier.

Abstract: An amplifier circuit includes a modulation signal generating circuit, a driving stage circuit and an output stage circuit. The modulation signal generating circuit generates a pair of modulation signals according to a pair of differential input signals and a pair of clock signals. The pair of clock signals includes a first clock signal and a second clock signal having a phase difference therebetween. The driving stage circuit generates a pair of driving signals according to the pair of modulation signals. The output stage circuit generates a pair of amplified output signals according to the pair of driving signals.

Abstract: A radio frequency (RF) circuit includes a power supply configured to generate a plurality of voltages, a plurality of power amplifiers, each having an RF output port and a power supply input port, a switch network having a plurality of input ports coupled to the power supply and a plurality of switch network output ports coupled to the power supply input ports of the plurality of power amplifiers, wherein the switch network is configured to output selected ones of the plurality of voltages from the plurality of switch network output ports, at least two of the switch network output port voltages capable of being different ones of the plurality of voltages, and an RF power combiner circuit having a plurality of input ports coupled to RF output ports of the plurality of power amplifiers and an output port at which is provided an output signal of the RF circuit.

Abstract: An integrated circuit (IC) chip has a class D PWM (pulse width modulation) amplifier configured for generating first and second PWM signals. The class-D PWM modulator includes a differential output driver configured for driving a first and a second output signals in response to the first and the second PWM signals. A clipping detection circuit is configured to turn on a clipping indication signal when one or both of the first PWM signal and the second PWM signal maintain the same state between two consecutive edges of the oscillator clock signal. The clipping detection circuit is also configured to turn off the clipping indication signal when both the first PWM signal and the second PWM signal change states between two consecutive edges of the oscillator clock signal.

Abstract: An audio system includes a speaker and a class D amplifier with a class-D PWM (pulse width modulation) modulator configured for generating first and second PWM signals forming a differential signal with three differential output levels with three differential output levels. The class-D amplifier also has a differential output driver configured for driving a first and a second output signals onto a first and a second output terminals in response to the first and the second PWM signals, wherein the first and the second output signals form a differential output signal having three differential output levels. An inverse common-mode signal generator is coupled to first and second output signals for providing an inverse common-mode signal. The audio system also includes one or more output terminals for providing the inverse common mode signal, and further includes a wire or a trace on a PCB (printed circuit board).

Abstract: An apparatus for amplifying power is provided. The apparatus includes a supply modulator for generating a supply voltage based on an amplitude component of a transmission signal, and a power amplify module for amplifying power of the transmission signal using the supply voltage, wherein the power amplify module includes a first power amplifier and a second power amplifier, and when an output power of the transmission signal is greater than a reference power, the first power amplifier amplifies the power of the transmission signal using the supply voltage, and when the output power of the transmission signal is equal to or less than the reference power, the second power amplifier amplifies the power of the transmission signal using the supply voltage.

Abstract: An audio amplifier includes a compensation unit, an output unit and a calibration unit. The compensation unit generates a compensation signal based on a digital input signal, a digital reference code, a mode signal and a digital approximation code. The output unit generates an output signal based on the compensated input signal. The calibration unit generates the digital approximation code based on the output signal and the mode signal. The digital approximation code includes a plurality of bits that are generated sequentially.

Abstract: Techniques for efficiently generating a power supply are described. In one design, an apparatus includes an envelope amplifier and a boost converter. The boost converter generates a boosted supply voltage having a higher voltage than a first supply voltage (e.g., a battery voltage). The envelope amplifier generates a second supply voltage based on an envelope signal and the boosted supply voltage (and also possibly the first supply voltage). A power amplifier operates based on the second supply voltage. In another design, an apparatus includes a switcher, an envelope amplifier, and a power amplifier. The switcher receives a first supply voltage and provides a first supply current. The envelope amplifier provides a second supply current based on an envelope signal. The power amplifier receives a total supply current including the first and second supply currents. In one design, the switcher detects the second supply current and adds an offset to generate a larger first supply current than without the offset.

Abstract: An amplification unit reduces a duty cycle of a digital signal at a carrier radio frequency to optimize the efficiency of the RF power amplifier that amplifies the reduced duty cycle signal. An exemplary amplification unit includes a duty cycle controller and a digital power amplifier. A delay unit in the duty cycle controller applies a delay to an input digital signal at the carrier radio frequency to generate a delayed signal at the carrier radio frequency. A logic gate in the duty cycle controller logically combines the input digital signal with the delayed signal to generate a modified digital signal at the carrier radio frequency, where the modified input digital signal has a reduced duty cycle relative to that of the input digital signal. Amplifying the modified digital signal in the digital RF power amplifier generates an amplified analog signal at the carrier radio frequency while improving amplifier efficiency.

Abstract: A switch mode power supply converter and a feedback delay compensation circuit are disclosed. The switch mode power supply converter has a switching voltage output and provides a switching voltage at the switching voltage output, such that a target voltage for a power amplifier supply voltage at a power amplifier supply output is based on the switching voltage. Further, the switching voltage is based on an early indication of a change of the target voltage. The feedback delay compensation circuit provides the early indication of the change of the target voltage.

Abstract: A Class-D amplifier arrangement is disclosed that implements an auxiliary feedback loop and a primary feedback loop. The auxiliary feedback loop operates upon an input signal when the Class-D amplifier arrangement is operating under a power-up condition and a power-down condition so that a modulated signal is confined within the auxiliary feedback loop during the power-up condition and the power-down condition. The confinement of the modulated signal within the auxiliary feedback loop during the power-up condition and the power-down condition diverts transient signals coupled onto the modulated signal from an output device. The primary feedback loop operates upon the input signal when the Class-D amplifier arrangement is operating under a normal condition so that the modulated signal is introduced to the output device during the normal condition.

Abstract: An amplifier circuit comprising a driver (204, 304) configured to provide a switched mode input signal, a switching mode power amplifier (206, 306) configured to receive the switched mode input signal and provide an output signal for an external load (210, 310); and a sensor (208, 308) configured to sense the impedance of the external load (210, 310) The driver is configured to set the duty cycle of the switched mode input signal in accordance with the sensed impedance of the external load (210, 310).

Abstract: An electronic amplifier includes a configurable integrated circuit device structured to synthesize at least a first signal and a second signal, scale the first signal to create a scaled first signal and scale the second signal to create a scaled second signal, create a discrete time composite signal which comprises a summation of at least the scaled first signal and the scaled second signal, create a discrete time pulse width modulated signal based on the discrete time composite signal, and generate a number of control signals based on the discrete time pulse width modulated signal. The electronic amplifier also includes a power switching stage receiving the number of control signals from the configurable integrated circuit device, wherein the number of control signals are configured to control the power switching stage, and a low pass filter coupled to an output of the power switching stage.

Abstract: A power supply arrangement for a single ended class D amplifier, including a first primary winding connected in series with a first switch between the positive supply rail and ground, a second primary winding in phase with said first primary winding and connected in series with a second switch between the negative supply rail and ground, and a controller adapted to apply a control signal to said first and second switches, said control signal (Q) having ON-pulses of a predefined pulse time separated by a dead time. In use, the primary winding connected to the supply rail with the highest numerical voltage will transform the rail voltage difference to the supply rail with the lowest numerical voltage through the opposite primary winding thus reducing any voltage unbalance between the windings.

Abstract: A circuit includes a first input terminal for receiving a first pulsed voltage and a second input terminal for receiving a second pulsed voltage. The circuit further includes a load and an LC filter. The LC filter includes a coupled inductor pair that includes a first winding and a second winding magnetically coupled to each other. The first winding is coupled between the first input terminal and the load, and the second winding is coupled between the second input terminal and the load. A frequency of a first current flowing through the first winding is increased by the second pulsed voltage applied to the second winding.

Abstract: A pop-free single-ended output class-D amplifier includes: an input signal generator for generating an input signal; a power supply for supplying input power; a reference voltage generator for generating a reference voltage; a gain-adjustable stage for generating an amplified signal according to the reference voltage and adjusting a gain of the single-ended output class-D amplifier; a pulse width modulation module for outputting a pulse width modulation signal according to the reference voltage, the amplified signal, and the input power; a low-pass filter for low-pass filtering the pulse width modulation signal to generate an output voltage; and a logic controller for generating at least one control signal to control the reference voltage generator, the gain-adjustable stage, and the pulse width modulation module according to the input power, the reference voltage, and the pulse width modulation signal.

Abstract: A generator for use with an electrosurgical device is provided. The generator has a gain stage electrically disposed between a first voltage rail and a second voltage rail, wherein the gain stage includes an input and an output. A voltage source operably coupled to the gain stage input and configured to provide an input signal thereto responsive to a drive control signal is also provided. The generator also has one or more sensors configured to sense an operational parameter of the amplifier and to provide a sensor signal corresponding thereto and a controller adapted to receive the sensor signal(s) and in response thereto provide a drive control signal to the voltage source.

Abstract: An amplification system is provided that comprises a push-pull amplifier system having a first power transistor series coupled with a second power transistor that alternately switch between a push-pull amplifier mode of operation and a single-ended amplifier mode of operation. In the push-pull amplifier mode, both the first power transistor and the second power transistor alternately conduct to provide an amplified output signal to an output load in response to an input signal having an amplitude that is greater than or equal to a threshold level. In the single-ended amplifier mode of operation, the first power transistor conducts and the second power transistor is disabled for amplification purposes in response to the input signal having an amplitude that is less than the threshold level.

Abstract: An electronic circuit is disclosed for driving a switching amplifier. The electronic circuit is configured for generating, when operating in a switch-on mode, a driving signal for driving the switching amplifier. The driving signal carries a plurality of pulses having: an pulse width increasing between contiguous pulses of the plurality of pulses according to a step value having modulus equal to two and odd values; a polarity alternating between the contiguous pulses.

Abstract: A driving circuit for a sound outputting apparatus includes a H-bridge and a charge pump established by six switches for driving two types of loudspeakers, respectively. The six switches include two common switches to be configured in the H-bridge and the charge pump, thereby reducing the costs and circuit area of the driving circuit.

Abstract: An electrosurgical system may generally first and second electrodes coupled to an energy source operative to generate and deliver pulses of a biphasic radio frequency (RF) waveform to treat undesirable tissue in a patient. The pulses may induce non-thermal cell death in the patient's tissue while causing no or minimal muscle contractions in the treated patient. The pulses may be grouped in bursts wherein the pulses within a burst repeat at a particular pulse frequency.

Abstract: The present invention relates to a microphone assembly comprising a microphone assembly casing having a sound inlet port and a transducer for receiving acoustic waves through the sound inlet port. The transducer converts the received acoustic waves to analog audio signals. The assembly according to the present invention further comprises an electronic circuit positioned within the microphone assembly casing, said electronic circuit comprising a pre-amplifier and an analog-to-digital converter preferably in form of a sigma-delta modulator so as to convert amplified analog audio signals to digital audio signals.

Abstract: An amplifier includes a first stage, a second stage coupled to the first stage, and a summation circuit. The first stage is configured to receive an analog input signal, convert the analog input signal to a digital signal, and output an intermediate analog output signal in response to the digital signal. The second stage is configured to output a second analog intermediate output signal based on a scaled pulse width modulation quantization error of the first stage. The summation circuit is configured to combine the first and second analog intermediate output signals to generate an amplified output signal.

Abstract: Techniques to generate boosted multi-level switched output voltages from a boosted multi-level Class D amplifier. The amplifier may include a multi-level H-bridge, which may include pairs of transistor switches coupled to a first, second, and third supply potential. The second supply potential may be a boosted representation of the first supply potential. The amplifier may receive an input signal, and from the input signal may generate pulse-modulated control signals to control the switching for the transistor switches of the multi-level H-bridge. The amplifier may generate the boosted multi-level switched output voltages from output nodes of the multi-level H-bridge.

Abstract: In some embodiments, circuits for providing Class-E power amplifiers are provided, the circuits comprising: a first switch having a first side and a second side; a first Class-E load network coupled to the first side of the first switch; a second Class-E load network: and a second switch having a first side and a second side, the first side of the second switch being coupled the second side of the first switch and the second Class-E load network. In some embodiments, the circuits further comprise: a third switch having a first side and a second side; a third Class-E load network coupled to the first side of the third switch; a fourth Class-E load network; and a fourth switch having a first side and a second side, the first side of the fourth switch being coupled the second side of the third switch and the fourth Class-E load network.

Abstract: A tri-state control mechanism can be implemented for a line driver of a transmitter unit to switch the output impedance of the transmitter unit between a low impedance state in the transmit mode and a high impedance state in the receive mode while minimizing turn-off glitch. It may be determined whether a communication device comprising the transmitter unit is configured in a transmit operating mode or a receive operating mode. If the communication device is configured in the receive operating mode, a first bias voltage can be generated to bias output transistors of the line driver circuit in a sub-threshold state. If the communication device is configured in the transmit operating mode, a second bias voltage can be generated to bias output transistors of the line driver circuit in a saturation state.

Abstract: A method and apparatus for providing a power supply for an amplifier is provided. The power conversion is achieved using synchronous rectifiers in a regulated half bridge power supply, taking the sum of the positive and negative rails as feedback, in order facilitate energy transfer between positive and negative output rails. This minimizes the effects of off side charging and rail sag, as well as achieving good line regulation, while allowing use of very small, low value output capacitors.

Abstract: An antenna drive apparatus applying an antenna drive voltage to an antenna from an H-bridge circuit including four switching elements to drive the antenna, includes: a switching mechanism to switch between a full-bridge state in which a differential voltage between a pulse voltage and a reverse pulse voltage reversed from the pulse voltage is applied to the antenna as the antenna drive voltage, and a half-bridge state in which the pulse voltage or the reverse pulse voltage is applied to the antenna as the antenna drive voltage; and a control mechanism to control the switching mechanism so that the frequency of the full-bridge state per unit time during an initial period of driving of the antenna in a transmission period for transmitting a transmission signal by the antenna becomes higher than that during the subsequent period in the transmission period.

Abstract: Embodiments of the present invention provide an apparatus for amplifying an input-signal. The apparatus includes a switch-mode amplifier for amplifying a digital input-signal. The apparatus is characterized by a generator for generating the digital input-signal based on the input-signal, wherein the generator is configured to generate the digital input-signal such that the digital input-signal is located at a predefined frequency band and such that distortions are located at a frequency higher than the predefined frequency band.

Abstract: An audio power amplifier includes a first and a second amplification unit, each including a switching voltage amplifier, an output filter, a current compensator, an inner current feedback loop feeding a measurement of current measured at the output inductor back to a summing input of the current compensator, a voltage compensator coupled to the summing input of the current compensator, and an outer voltage feedback loop. A controlled signal path provides the output of the voltage compensator of the first amplification unit to the current compensator of the second amplification unit. The first and second amplification units are operable with separate loads, in parallel driving a common load, or across a bridge-tied-load. A second pair of amplification units may be added and operated together with the first pair to drive a single speaker with a parallel pair of amplifiers on each side of a bridge-tied-load.

Abstract: Disclosed are circuits, devices, systems and methods related to an enable circuit for a radio-frequency (RF) amplifier. In some embodiments, the enable circuit can be configured to control a low-noise amplifier (LNA). The enable circuit includes a plurality of input ports, with each input ports being configured to receive a control signal. The enable circuit further includes a logical section connected to the input ports and configured to be capable of generating a plurality of output signals based on different combinations of the plurality of control signals. The output signals include either or both of enable and power shut-off signals for the LNA.

Abstract: A switching amplifying method or a switching amplifier for obtaining one or more than one linearly amplified replicas of an input signal, is highly efficient, and does not have the disadvantage of “dead time” problem related to the class D amplifiers. Said switching amplifying method comprises the steps of: receiving the input signal; pulse modulating the input signal for generating a pulse modulated signal; switching one or more pulsed currents flowing to a first input terminal of a filter according to the pulse modulated signal when the polarity of the input signal is positive; switching one or more pulsed currents flowing from the first input terminal of the filter according to the pulse modulated signal when the polarity of the input signal is negative; filtering all said pulsed currents flowing through the first input terminal for getting an output signal.

Abstract: A class-D power amplifier includes a switching power source section, a synchronization signal generation section and a class-D power amplifying section. The synchronization signal generation section takes out of the switching power source section a clock signal having a second frequency which is “n” times of a first frequency. The class-D power amplifying section includes a comparator which compares an input signal with a feedback signal, a second switching section which switches a power source fed from the synchronization signal generation section, a filter section which smoothes an output signal from the second switching section, and a combining section which combines a delayed output signal with a clock signal from the synchronization signal generation section to generate the feedback signal.

Abstract: Various embodiments are described herein for a multi-channel class-D amplifier and an associated processing method. In general, the multi-channel class-D amplifier comprises a signal source that provides a plurality of input signals and generates synchronization information; and a plurality of class-D amplifier channel modules, each class-D amplifier channel module being configured to process a corresponding input signal from the plurality of input signals according to the synchronization information to produce an output signal. The switching frequencies employed by the plurality of class-D amplifier channel modules are substantially similar to one another and the processing of the plurality of input signals is offset in time across the plurality of class-D amplifier channel modules.

Abstract: A class-D power amplifier capable of reducing electromagnetic interference includes an integrator, a triangular wave generator, a comparator, a gate driver, a feedback circuit, and an output stage circuit. The integrator is used for receiving an input signal and potential of ground, and outputting a first voltage. The comparator is used for comparing the first voltage with a triangular wave generated by the triangular wave generator to output a pulse-width modulation signal. The gate driver is used for driving the output stage circuit to output an output voltage according to the pulse-width modulation signal. Therefore, the class-D power amplifier reduces the electromagnetic interference by the triangular wave.