Having Temperature Compensation Means Patents (Class 330/256)
  • Patent number: 10264355
    Abstract: An operating power level for a loudspeaker cabinet and a target power level for the loudspeaker cabinet are determined during output of an audio signal by the loudspeaker cabinet. The target power level is based on temperature data for the loudspeaker cabinet and varies as the temperature data changes. Based on the operating power level and the target power level, values of two or more control parameters for controlling audio output of the loudspeaker cabinet are generated, where at least one of the control parameters controls the gain of a specific audio frequency band. The audio signal is adjusted according to the generated values of the control parameters, where doing so reduces power consumption of the loudspeaker cabinet during the audio output. Other embodiments are also described.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: April 16, 2019
    Assignee: Apple Inc.
    Inventors: Daniel C. Klingler, Afrooz Family, Brandon J. Rice, James M. Hollabaugh
  • Patent number: 10234335
    Abstract: A compensator designed to function with any type of base metal thermocouple which reduces the measured source impedance of high resistance thermocouples to less than 100 ohms making them compatible with or readable by modern measuring instruments.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: March 19, 2019
    Assignee: THERMO-KINETICS COMPANY LIMITED
    Inventor: Michael Hunter
  • Patent number: 10024890
    Abstract: A system comprises an integrated circuit package, an inductor that is part of a power supply, and a printed circuit board (PCB) having a metal trace disposed directly below the inductor when viewed from a top-down perspective. The integrated circuit package includes a first terminal, a second terminal, and a novel inductor current detection and calibration circuit. The first terminal is coupled to a first end of the metal trace and the second terminal is coupled to a second end of the metal trace. During operation of the power supply, the novel circuit detects an OCP condition whereby an output current of the power supply exceeds an OCP level. The novel circuit detects the OCP condition in part by sensing a voltage across the metal trace. After calibration at room temperature, the novel circuit performs accurate OCP detection over a range of temperatures without using any temperature sensor near inductor.
    Type: Grant
    Filed: April 26, 2015
    Date of Patent: July 17, 2018
    Assignee: Active-Semi, Inc.
    Inventor: Narasimhan Trichy
  • Patent number: 9979364
    Abstract: In a semiconductor device, a first variable gain amplifier and a second variable gain amplifier constitute a switched capacitor type variable gain amplifier. A selection switch switches connection among the first variable gain amplifier, the second variable gain amplifier, and a load circuit such that the first variable gain amplifier and the load circuit are connected to each other when an amplification factor of the first variable gain amplifier is a predetermined gain or less, and the second variable gain amplifier is connected between the first variable gain amplifier and the load circuit when the amplification factor of the first variable gain amplifier is larger than the predetermined gain.
    Type: Grant
    Filed: October 19, 2017
    Date of Patent: May 22, 2018
    Assignee: OLYMPUS CORPORATION
    Inventors: Masato Osawa, Yasunari Harada, Hideki Kato
  • Patent number: 9847762
    Abstract: The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a line driver with transistors directly coupled to the ground, and a bias voltage is coupled common mode resistors of the line driver. There are other embodiments as well.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: December 19, 2017
    Assignee: INPHI CORPORATION
    Inventors: Rajasekhar Nagulapalli, Simon Forey, Parmanand Mishra
  • Patent number: 9785141
    Abstract: Disclosed are methods and systems for by identifying or generating an electrical schematic, generating a thermal schematic by associating thermal RC circuits of the electronic design with the electrical schematic, performing at least two analyses of an electrical analysis, a thermal analysis, and an electromagnetic interference compliance (EMC) analysis with the electrical schematic and the thermal schematic of the electronic design. The electrical, thermal, and EMC analyses may be performed concurrently by forwarding intermediate or final analysis results to each other, and the analysis results may be presented simultaneously in one or more user interface windows. The thermal schematic may be obtained by extracting the thermal RC circuits, identifying corresponding electrical circuit components that correspond to the extracted thermal RC circuits, and importing the thermal RC circuits into the electrical schematic so that the electrical and thermal schematics have the same nodes.
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: October 10, 2017
    Assignee: Cadence Design Systems, Inc.
    Inventors: Alok Tripathi, An-yu Kuo, Bradley Brim, Taranjit Singh Kukal
  • Patent number: 9447767
    Abstract: Aspects of the invention are directed to a single chip igniter such that it is possible to realize a reduction in operating voltage, an increase in noise tolerance, a reduction in size, and a reduction in cost. By reducing the gate threshold voltage of a MOS transistor, and reducing the operating voltages of a current limiter circuit, an overheat detector circuit, a timer circuit, an overvoltage protection circuit, an input hysteresis circuit, and the like, it is possible to reduce the operating voltage of a single chip igniter. In some aspects of the invention, the effective gate voltage of the MOS transistor is 1V or more, and the channel length of the MOS transistor is 4 ?m or less. Also, in some aspects of the invention, the thickness of a gate oxide film of the MOS transistor is 5 nm or more, 25 nm or less.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: September 20, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Kenichi Ishii
  • Patent number: 9391523
    Abstract: Methods and apparatuses are disclosed for generating a temperature independent current limit. The value of the temperature independent current limit may be determined based in part on an error signal representative of a difference between an actual output value and a desired output value of a power converter. When the error signal is below a lower threshold voltage, the temperature independent current limit may be set to a first value. When the error signal is above an upper threshold voltage, the temperature independent current limit may be set to a second, higher value. When the error signal is between the lower threshold voltage and the upper threshold voltage, the temperature independent current limit may change linearly with the error signal. The error signal may be adjusted to compensate for changes in the system caused by a change in temperature.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: July 12, 2016
    Assignee: Power Integrations, Inc.
    Inventors: Yury Gaknoki, Mingming Mao, Michael Y. Zhang
  • Patent number: 9182767
    Abstract: A device includes a snapback clamp circuit configured to clamp a supply voltage in response to the supply voltage exceeding a trigger voltage level. In at least one embodiment, the snapback clamp circuit includes a clamp transistor and a programmable resistance portion that is responsive to a control signal to calibrate the trigger voltage level. Alternatively or in addition, the snapback clamp circuit may include a programmable bias device configured to calibrate the trigger voltage level by biasing a gate terminal of the clamp transistor. In another particular embodiment, a method of calibrating a snapback clamp circuit is disclosed. In another particular embodiment, a method of operating an integrated circuit is disclosed.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: November 10, 2015
    Assignee: QUALCOMM INCORPORATED
    Inventors: Ankit Srivastava, Matthew David Sienko, Eugene Robert Worley
  • Patent number: 9087567
    Abstract: According to at least one example embodiment, a method and corresponding system for calibrating an amplifier offset include applying an input value to both input leads of an amplifier. The amplifier includes one or more digital-to-analog converters (DACs) used to calibrate an offset of the amplifier. A digital value, provided as input to the DAC, is updated over a number of iterations, by a control logic coupled to the amplifier, based on an output of the amplifier. A final value of the digital value being updated, e.g., associated with the last iteration, is employed as input to the DAC of the one or more DACs in the amplifier for calibrating the offset of the amplifier during a data reception phase.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: July 21, 2015
    Assignee: Cavium, Inc.
    Inventors: Omer O. Yildirim, David Lin, Scott E. Meninger
  • Patent number: 9030257
    Abstract: A differential circuit with a function to compensate unevenness observed in the differential gain thereof is disclosed. The differential circuit provides a low-pass filter in one of the paired transistors not receiving the input signal in addition to another low-pass filter that provides an average of output signals as a reference level of the differential circuit. The cut-off frequency of the filter is preferably set to be equal to the transition frequency at which the self-heating effect explicitly influences the trans-conductance of the transistor.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: May 12, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Naoki Itabashi, Yoshiyuki Sugimoto, Makoto Ito, Keiji Tanaka
  • Patent number: 8897728
    Abstract: The method for memory effects quantification and comparison in RF transmitters and amplifiers is a method in which a processor performs a spectrum analysis of an RF transmitter or RF amplifier device under test (DUT). The processor then calculates a normalized frequency (fn) according to the relation: f n = f - f c BW . The processor then utilizes the normalized frequency calculation in a spectrum asymmetry index (SAI) computation characterized by the relation: SAI = 1 K ? ? f n = f n , start f n = f n , stop ? ? ? P ? ( f n ) - P ? ( - f n ) ? . Next, utilizing the absolute value of the normalized frequency according to the relation: ? f n ? = ? f - f c BW ? , the processor displays the calculated SAI and causes a display device to display a mirrored spectrum as a function of the absolute value of the normalized frequency around a zero frequency.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: November 25, 2014
    Assignee: King Fahd University of Petroleum and Minerals
    Inventor: Oalid Hammi
  • Publication number: 20140327482
    Abstract: A radio frequency (RF) power amplifier with no reference voltage for biasing is disclosed. The RF power amplifier includes a three-terminal current source circuit, a current mirror circuit and an output-stage circuit. The three-terminal current source circuit receives a first system voltage and accordingly outputs a first current and a second current, and a source voltage exists between a first output terminal of the first current and a second output terminal of the second current. The current mirror circuit receives the first current and the second current and accordingly generates a bias current. The output-stage circuit receives the bias current so as to work at an operation point.
    Type: Application
    Filed: August 26, 2013
    Publication date: November 6, 2014
    Applicant: ADVANCED SIMICONDUCTOR ENGINEERING INC.
    Inventors: JAW-MING DING, HSIN CHIN CHANG
  • Patent number: 8879666
    Abstract: A radio frequency (RF) power amplifier is disclosed. The RF power amplifier includes an adder circuit, an output-stage circuit and a differential circuit. The adder circuit has a first ratio and a second ratio, and receives a reference voltage and a feedback voltage so as to output an adder voltage after an operation, wherein the feedback voltage is a voltage with a negative temperature coefficient, and the reference voltage is sum of a first voltage with a negative temperature coefficient and a second voltage with positive temperature coefficient. The output-stage circuit is used for providing the feedback voltage. The differential circuit has a first multiplier factor, and the differential circuit makes the first multiplier factor be multiplied with the adder voltage so as to provide a voltage to the output-stage circuit. The RF power amplifier stabilizes an output current through adjusting the temperature coefficient of the reference voltage.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: November 4, 2014
    Assignees: Universal Scientific Industrial (Shanghai) Co., Ltd., Universal Global Scientific Industrial Co., Ltd.
    Inventors: Jaw-Ming Ding, Wei-Hsuan Lee, Wen-Tou Chiu
  • Patent number: 8866551
    Abstract: A dual compensation operational amplifier is suitable for use in an environment that experiences fluctuations in ambient energy levels. A dual compensation impedance can be determined to nullify or compensate for effects of an input offset voltage or an input bias current or both. Adjustments to the dual compensation impedance can be made based on calibration data for various environmental conditions so that the dual compensation impedance can be either pre-set for anticipated conditions in different target operational environments, or automatically adjusted in-situ. Target operational environments that may benefit from such a dual compensation impedance include remote areas that experience extreme or variable temperatures, high altitudes, space, or high radiation environments.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: October 21, 2014
    Assignee: Crane Electronics, Inc.
    Inventors: Cuon Lam, Jay Kuehny, David Perchlik
  • Patent number: 8854135
    Abstract: An operational amplifier may include a differential stage comprising two transistors whose gates are respectively linked to the two inputs of the operational amplifier. The sources of the two transistors may be linked to a first current source whose delivered current depends negatively on temperature variations and to a second current source whose delivered current is proportional to absolute temperature. The sum of these two currents may be less dependent on temperature, in that this link of the sources of the two transistors with the two current sources is effected respectively by way of two resistors, and in that the current which passes through the two transistors is imposed of proportional with temperature type, so as to allow substantially temperature-independent elimination of the offset voltage of the operational amplifier while obtaining a temperature-independent constant gain-bandwidth product.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: October 7, 2014
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Michel Cuenca, Laurent Truphemus
  • Publication number: 20140167849
    Abstract: A differential amplification circuit includes a first current control unit configured to control driving current in response to a voltage level difference between first input voltage and second input voltage, a second current control unit configured to control the driving current in response to a voltage level difference between the second input voltage independent from temperature and a temperature voltage depending on the temperature, and a signal output unit configured to generate a detection signal in response to the driving current.
    Type: Application
    Filed: March 16, 2013
    Publication date: June 19, 2014
    Applicant: SK HYNIX INC.
    Inventors: Jae-Boum PARK, Cheol-Hoe KIM
  • Patent number: 8717083
    Abstract: A method including receiving an input signal; amplifying the input signal to generate an output signal using a cascade of a plurality of amplifier stages including a first amplifier stage and a last amplifier stage; generating a voltage signal by sensing the output signal in a noninvasive manner so that the sensing results in substantially no change to the output signal; generating a current signal from the voltage signal using a transconductance amplifier; and injecting the current signal into an output node of the first amplifier stage in a noninvasive manner so that the injecting results in substantially no change to an amplification function of the first amplifier stage.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 6, 2014
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chia-Liang Lin
  • Patent number: 8665015
    Abstract: A power amplifier circuit, comprising: an input for receiving an input signal to be amplified; a power supply; an amplifier, coupled to the input and the power supply; and a cascode device coupled between the power supply and the amplifier. The circuit is characterized by: a first current source coupled between the input and the amplifier, configured to provide a biasing current which is proportional to absolute temperature; and a second current source for controlling the cascode device, configured to provide a current which is complementary to absolute temperature (CTAT).
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: March 4, 2014
    Assignee: Cambridge Silicon Radio Limited
    Inventor: Konstantinos Manetakis
  • Patent number: 8509290
    Abstract: A closed loop power output calibration system for variable power output wireless devices. The wireless device includes a wireless transceiver having a transmit core coupled to a discrete power amplifier. Power detection circuitry formed in the wireless transceiver provides a detected power level of the power amplifier, and a reference power level, both of which are converted to digital signals using existing I and Q signal analog to digital converters in the receiver core. The digital signals are processed to cancel power distortion and temperature effects to provide a resulting power feedback signal. Corrective control signals are generated in response to the power feedback signal relative to a desired power output level. The gain in the transmit core is then adjusted in response to the corrective control signals such that the power amplifier outputs the target output power level.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: August 13, 2013
    Assignee: Icera Canada ULC
    Inventors: Abdellatif Bellaouar, Tajinder Manku
  • Patent number: 8385564
    Abstract: A thermally regulated amplifier system includes an amplifier unit, a temperature-sensing unit and a controller. The amplifier unit includes a power amplifier that has an adjustable gain function. The controller receives temperature readings from the temperature-sensing unit, computes the gain G(n) of the amplifier unit, and provides the computed gain of the amplifier G(n) to the power amplifier unit.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: February 26, 2013
    Assignee: Harman Becker Automotive Systems GmbH
    Inventors: Gerhard Pfaffinger, Andreas Suess
  • Patent number: 8212606
    Abstract: An apparatus is provided that includes a drift trimming stage that includes a first current source providing a current with a first temperature dependency and a second current source providing a current with a second temperature dependency. The first and the second current source are coupled at a first node and configured to have equal currents at a first temperature. There is further a third current source providing a current with a third temperature dependency and a fourth current source providing a current with a fourth temperature dependency. The third current source and the fourth current source are coupled at a second node and configured to have equal currents at the first temperature. There is a first resistor coupled between the first node and a third node, a second resistor coupled between the second node and the third node. The first node and the second node are coupled to provide a combined voltage drop across the first resistor and the second resistor for reducing the offset drift.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: July 3, 2012
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Martijn F. Snoeij, Mikhail V. Invanov
  • Patent number: 8086358
    Abstract: A method and system for utilizing the heat dissipated by quiescent IC leakage currents to control the start-up temperature of components. A temperature control sub-system utilizes a thermal sensor to sense the junction temperature of the component. When the temperature is below an operating threshold, the control sub-system applies power to the component, and the component is self-heated due to the quiescent leakage current inherent to the component. This quiescent self-heating property serves as a source of pre-heat to elevate the temperature of the component, until the temperature, as indicated by the thermal sensor, rises above the minimum specified operating temperature of the component. The system may then be reliably initialized by applying full system power, and triggering a hardware reset or defined initialization sequence/procedure. Once the component(s) is operational, self-heating continues to maintain the component's temperature above the minimum operating threshold.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: December 27, 2011
    Assignee: International Business Machines Corporation
    Inventors: Gary E. O'Neil, Michael E. Stopford, James B. Tate
  • Patent number: 8049653
    Abstract: An amplifier that is operated between first and second power supplies includes a transistor pair having control terminals to which input signals are input, a load resistor pair that is provided between each transistor of the transistor pair and the first power supply, a constant current source that is provided between the second power supply and the transistor pair, and a first switch that is connected with the constant current source in series between the second power supply and the transistor pair, the first switch being turned on or off in accordance with a clock signal.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: November 1, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Yuji Nakajima
  • Patent number: 8023422
    Abstract: A dual core crosspoint system includes a differential signal core for receiving N differential input channels with common mode voltage removed and providing m differential output channels with m output stages associated with the m output channels; and a common mode core for receiving N common mode voltage input channels derived from the N differential input channels and providing m common mode voltage output channels simultaneously with the m differential output channels.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: September 20, 2011
    Assignee: Analog Devices, Inc.
    Inventors: Stefano D′Aquino, Kimo Y. F. Tam
  • Patent number: 7948297
    Abstract: A circuit to minimize thermally generated offset voltages includes a differential pair of transistors having a first transistor and a second transistor and coupled to a current source, a differential input having a first input coupled to the first transistor and having a second input coupled to the second transistor, a pair of bypass transistors having a first bypass transistor and a second bypass transistor, the first bypass transistor coupled in parallel with the first transistor and the second bypass transistor coupled in parallel with the second transistor, wherein the pair of bypass transistors is coupled to the current source, and control circuitry coupled to the pair of bypass transistors for controlling current through the pair of bypass transistors.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: May 24, 2011
    Assignee: HRL Laboratories, LLC
    Inventor: Albert E. Cosand
  • Patent number: 7791401
    Abstract: An offset voltage temperature coefficient reduction system for a differential operational amplifier is disclosed. In one embodiment, the offset voltage temperature coefficient reduction system comprises a first current source generating a first current with a positive temperature coefficient and a second current source generating a second current with a negative temperature coefficient, where the first current source and the second current source are coupled to their respective output nodes of the differential op amp such that an error due to an input offset voltage of the differential operational amplifier is approximately constant over a range of temperature, and where a difference between the first current and the second current is approximately zero at a reference temperature. In similar manner, the offset voltage temperature coefficient can be also adjusted to desired value other than zero.
    Type: Grant
    Filed: February 8, 2008
    Date of Patent: September 7, 2010
    Assignee: National Semiconductor Corporation
    Inventor: Kwok-Fu Chiu
  • Patent number: 7746590
    Abstract: A current mirror circuit providing a fast turn on time. A node within the circuit is held at a first voltage when the current mirror is off to permit the node voltage to quickly reach a necessary value when the current mirror circuit is turned on.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: June 29, 2010
    Assignee: Agere Systems Inc.
    Inventor: Jonathan H. Fischer
  • Patent number: 7725087
    Abstract: A feedback compensation detector for a direct conversion transmitter includes a baseband processor, a direct up-converter, an antenna, and an impairment detection and compensation feedback circuit. The baseband processor generates an in-phase (I) baseband signal and a quadrature-phase (Q) baseband signal. The direct up-converter is coupled to the baseband processor, and combines the I and Q baseband signals with an RF carrier signal to generate an RF output signal. The antenna is coupled to the direct up-converter, and transmits the RF output signal. The impairment detection and compensation feedback circuit is coupled to the RF output signal and the I and Q baseband signals. The impairment detection and compensation feedback circuit down-converts the RF output signal to generate an intermediate frequency (IF) signal, measures at least one signal impairment in the IF signal, and pre-distorts the I and Q baseband signals to compensate for the measured signal impairment.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: May 25, 2010
    Assignee: Research In Motion Limited
    Inventor: Jorgen S. Nielsen
  • Patent number: 7622991
    Abstract: Operational transconductance amplifiers have a natural signal capacity format in which signal performance can be expressed in terms of fixed percentages. Input signal can be applied to Operational transconductance amplifiers in this natural signal capacity format in order to optimize performance. A signal which drives a given Operational transconductance amplifier architecture to produce an output current which is at 50% of it's maximum available output current can be thought of as applying an input voltage which is at 50% of an Operational transconductance amplifier's maximum input voltage capacity. In this input/output channel capacity format, dc offset, distortion, and noise all are temperature independent.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: November 24, 2009
    Inventor: Don Roy Sauer
  • Patent number: 7616059
    Abstract: The invention relates to an differential amplifier circuit comprising an amplifier stage comprising a first and a second transistor, the gates of which are connected to differential input terminals of the amplifier stage. The differential amplifier further comprises a temperature compensation circuit comprising a third and fourth transistor. The third transistor is connected to the source of the first transistor and the fourth transistor is connected to the source of the second transistor. Further, the temperature compensation circuit comprises a constant current source connected to the respective sources of the third and fourth transistors. Thereby the temperature compensation circuit is arranged to provide a feedback resistance in dependence on the operating temperature so as to compensate for variations of the resistance of the first and second transistors.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: November 10, 2009
    Assignee: Infineon Technologies AG
    Inventors: Christian Grewing, Detlev Theil, Stefan Van Waasen
  • Patent number: 7602273
    Abstract: A semiconductor device is disclosed that includes a resistive element including a first resistor having a positive temperature coefficient and a second resistor having a negative temperature coefficient. The first resistor includes a metal film.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: October 13, 2009
    Assignee: Ricoh Company, Ltd.
    Inventor: Rei Yoshikawa
  • Patent number: 7593701
    Abstract: A CMOS automatic gain control (AGC) circuit that receives an analog control voltage and generates a temperature compensated gain voltage to linearly control the gain of a variable gain circuit operating in the sub-threshold region. A PTAT circuit having a resistor network coupled to a current mirror circuit operating in the sub-threshold region establishes a current having an proportional relationship to temperature. This current is used as a supply for a voltage to voltage converter circuit which generates an intermediate voltage in response to the analog control voltage. A linearizing circuit operating in the sub-threshold region pre-conditions the intermediate voltage, which is then applied to a variable gain circuit. The variable gain circuit is operated in the sub-threshold region, and the preconditioned intermediate voltage will control the amount of gain to be substantially linear with respect to the analog control voltage, and with a range of about 85 dB.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: September 22, 2009
    Assignee: Icera Canada ULC
    Inventors: Abdellatif Bellaouar, Michel J. G. J. P. Frechette
  • Publication number: 20090115520
    Abstract: A temperature compensation system for compensating a collector-voltage controlled RF amplifier. To overcome variation that occurs with temperature which can result in signal degradation of the adjacent channel spectrum, a temperature compensated current is utilized to create an offset signal. The offset signal is processed in connection with a control or data signal to generate a temperature compensated voltage source control signal. A differential amplifier may process the data or control signal and the offset signal. The compensated voltage control signal tracks temperature to adapt the applied collector voltage to temperature. This in turn forces the applied collector voltage to vary in response to temperature changes thereby maintaining a constant output power or RF swing. One example environment of use is in an EDGE type GSM system.
    Type: Application
    Filed: December 4, 2006
    Publication date: May 7, 2009
    Inventors: David S. Ripley, Kerry Brent Phillips
  • Patent number: 7518453
    Abstract: A variable gain amplifier comprising a differential input amplifier comprising a pair of transistors each having an input across which an input voltage is provided, the transistors being coupled such that each transistor is provided in series with a respective current source providing a reference current and whereby a current is developed across a resistor element coupling the transistors that is proportional to the voltage between the inputs; further comprising further transistors each coupled in series with a transistor of the transistor pair, and wherein the further transistors are arranged such that a current is developed in each further transistor due to the voltage provided across the inputs that is substantially equal to, in one further transistor, a sum of the reference current and the current in the resistor element, and in the other further transistor, a difference between the reference current and the current in the resistor element; further comprising a gain stage for developing currents equal to
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: April 14, 2009
    Assignee: International Rectifier Corporation
    Inventor: Daniel J. Segarra
  • Patent number: 7518452
    Abstract: A voltage-controlled current source includes a current source having temperature dependency, a voltage source having process dependency, a first signal conversion circuit which generates second voltage having temperature dependency and process dependency by use of current of the current source and first voltage of the voltage source, a second signal conversion circuit which converts a first control signal used to control transfer conductance into a second control signal by using the second voltage as a reference, and a voltage-controlled current source circuit whose transfer conductance is controlled according to the second control signal.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: April 14, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shigeo Imai
  • Patent number: 7514998
    Abstract: The present invention relates to a reference current circuit. The reference circuit comprises a low-level current bias circuit, a voltage proportional-to-absolute temperature generator for creating a proportional-to-absolute temperature voltage (VPTAT), and a MOSFET-based constant-IC regulator circuit. The MOSFET-based constant-IC regulator circuit includes a constant-IC input and constant-IC output. The constant-IC input is electrically connected with the VPTAT generator such that the voltage proportional-to-absolute temperature is the input into the constant-IC regulator circuit. Thus the constant-IC output maintains the constant-IC ratio across any temperature range.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: April 7, 2009
    Assignee: California Institute of Technology
    Inventors: Mohammad Mojarradi, Greg Levanas, Yuan Chen, Raymond S. Cozy, Robert Greenwell, Stephen Terry, Benjamin J. Blalock
  • Patent number: 7514997
    Abstract: A waveform processing system, and associated methods and apparatus, may include a common mode feedback compensation circuit to adjust a voltage supplied to a differential circuit so as to substantially reduce or eliminate signal distortion associated with thermal tails. In an illustrative example, a feedback circuit may control a supply voltage to maintain a common mode voltage at the collectors of the input transistors of a differential amplifier. For example, the feedback may compensate for component tolerances and/or temperature changes that may cause the cause the input transistors to operate away from a nominal constant power operating point. In some embodiments, the differential circuit and common mode feedback compensation circuit may be configured to substantially reduce thermal tail effects by controlling the supply voltage to maintain a substantially constant power condition for the input transistors.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: April 7, 2009
    Assignee: LeCroy Corporation
    Inventor: Jozef Adut
  • Patent number: 7511538
    Abstract: A data input buffer in a semiconductor is capable of avoiding operation speed deterioration of the data input buffer due to the temperature condition or process characteristic. The data input buffer in a semiconductor device includes an input detecting unit for detecting logic level of input data by comparing the voltage level of the input data with a reference voltage, a current driving capability adjusting unit for adjusting current driving capability of the input detecting unit based on at least one of temperature condition and process characteristic, and a buffering unit for buffering the output signal from the input detecting unit.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: March 31, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hee-Bok Kang, Jin-Hong Ahn
  • Patent number: 7504886
    Abstract: A waveform processing system may include a compensation circuit to adjust a voltage supplied to an output stage, wherein a supplied voltage is controlled to substantially maintain constant power dissipation in the output stage, and wherein the compensation circuit is configurable independently from the amplification stage. In an illustrative embodiment, a control circuit may be independently configurable with respect to an amplifier that generates a signal for the output stage, and the control circuit may bias a compensation circuit that provides thermal tail compensation for an output stage transistor. In some embodiments, the bias may operate the compensation circuit (i) to maintain a substantially constant power condition in the output stage transistor to substantially reduce thermal tail effects, and (ii) to maintain the output stage transistor in an unsaturated operating condition.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: March 17, 2009
    Assignee: Lecroy Corporation
    Inventor: Pankaj Kataria
  • Publication number: 20090051439
    Abstract: Operational transconductance amplifiers have a natural signal capacity format in which signal performance can be expressed in terms of fixed percentages. Input signal can be applied to Operational transconductance amplifiers in this natural signal capacity format in order to optimize performance. A signal which drives a given Operational transconductance amplifier architecture to produce an output current which is at 50% of it's maximum available output current can be thought of as applying an input voltage which is at 50% of an Operational transconductance amplifier's maximum input voltage capacity. In this input/output channel capacity format, dc offset, distortion, and noise all are temperature independent.
    Type: Application
    Filed: August 22, 2007
    Publication date: February 26, 2009
    Inventor: Don Roy Sauer
  • Patent number: 7489186
    Abstract: A current sense amplifier for a voltage converter wherein the voltage converter has at least one channel providing an output current through an output inductor, the current sense amplifier monitoring the current in the at least one channel through the output inductor, the current sense amplifier comprising a plurality of variable gain amplifiers, there being at least one more variable gain amplifier than channels in the voltage converter, whereby at least one variable gain amplifier is in a calibration mode for a preset period of time during which the variable gain amplifier is compensated for an offset error and the gain of the variable gain amplifier is calibrated to compensate for temperature of the output inductor, while during said preset period of time any remaining variable gain amplifiers are connected to monitor the channel current in each output inductor.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: February 10, 2009
    Assignee: International Rectifier Corporation
    Inventor: Daniel J. Segarra
  • Publication number: 20080315949
    Abstract: An improved VGA design offering a purely ratiometric mechanism for controlling gain by current-steering. A control loop delivers a reference voltage to a control amplifier that steers current and match the common mode output voltage (CMOV) with said predefined reference voltage. The VGA is designed so that, although the absolute gain varies over process, voltage, and temperature (PVT), the gain steps retain their values. Moreover, a method for controlling the gain in a VGA in a way that is insensitive to PVT is also disclosed. First, a voltage representing the required gain of the VGA in injected to the outputs of the VGA. Then, the CMOV of the VGA is sampled. Finally, the CMOV is subtracted by a predefined reference voltage and is fed back as bias to bases of the transistors of the VGA, thus controlling it gain, until the CMOV and the reference voltage become equal.
    Type: Application
    Filed: June 25, 2007
    Publication date: December 25, 2008
    Inventor: Dale Scott Douglas
  • Patent number: 7369816
    Abstract: A radio transceiver includes circuitry that enables received RF signals to be down-converted to baseband frequencies and baseband signals to be up-converted to RF signals prior to transmission without requiring conversion to an intermediate frequency. The circuitry includes a temperature sensing module that produces accurate voltage level readings that may be mapped into corresponding temperature values. A processor, among other actions, adjusts gain level settings based upon detected temperature values. One aspect of the present invention further includes repetitively inverting voltage signals across a pair of semiconductor devices being used as temperature sensors to remove a common mode signal to produce an actual temperature-voltage curve. In one embodiment of the invention, the circuitry further includes a pair of amplifiers to facilitate setting a slope of the voltage-temperature curve.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: May 6, 2008
    Assignee: Broadcom Corporation
    Inventors: Michael Steven Kappes, Arya Reza Behzad
  • Patent number: 7345542
    Abstract: A signal processing circuit includes a circuit stage for operating on signals in a signal path of an input signal, including main circuitry for operating on relatively small-value signals and alternative circuitry for amplifying/processing signals during a condition which otherwise would cause thermal imbalance in the main circuitry. The circuit stage includes switching circuitry for coupling signals in the signal path of the input signal to the main input circuitry during normal small-signal operating conditions and for coupling signals in the signal path of the input signal to the alternative circuitry during the condition which otherwise would cause thermal imbalance in the main circuitry.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: March 18, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Ahmad Dashtestani, Joel M. Halbert
  • Publication number: 20080061877
    Abstract: A waveform processing system, and associated methods and apparatus, may include a common mode feedback compensation circuit to adjust a voltage supplied to a differential circuit so as to substantially reduce or eliminate signal distortion associated with thermal tails. In an illustrative example, a feedback circuit may control a supply voltage to maintain a common mode voltage at the collectors of the input transistors of a differential amplifier. For example, the feedback may compensate for component tolerances and/or temperature changes that may cause the cause the input transistors to operate away from a nominal constant power operating point. In some embodiments, the differential circuit and common mode feedback compensation circuit may be configured to substantially reduce thermal tail effects by controlling the supply voltage to maintain a substantially constant power condition for the input transistors.
    Type: Application
    Filed: September 11, 2006
    Publication date: March 13, 2008
    Applicant: LeCroy Corporation
    Inventor: Jozef Adut
  • Publication number: 20080018402
    Abstract: In accordance with the present disclosure current sensing methods, apparatuses and arrangements are disclosed. The arrangement can include a sense element to convey a current from a source to a load and a compensation element can be located proximate to the sense element. The compensation element can have a resistance that changes proportional to a change in temperature of the sense element. The arrangement can further include an operational amplifier having a first input connected to the sense element, a second input connected to the compensation element and an output that provides an output signal that biases a current through the compensation element in response to a voltage across the sense element. The bias current can provide an output signal proportional to the conveyed current and the compensation element can provide temperature compensation for the output signal.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 24, 2008
    Inventor: Viktor Vogman
  • Patent number: 7307476
    Abstract: A circuit and a method for nullifying temperature dependence of a circuit characteristic. The circuit includes a plurality of transistors configured such that they generate a gate voltage that includes a threshold voltage as a component. The gate voltage is applied to a transistor to generate a current that is proportional to a process transconductance parameter. The current is applied to a comparator having a differential pair of transistors, wherein each transistor has a process transconductance parameter. The circuit takes the ratios of the process transconductance parameter associated with the current to that of each transistor of the differential pair. By rationing the process transconductance parameters, temperature dependence is nullified or negated. The ratios can be used to set the hysteresis voltage of the comparator.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: December 11, 2007
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Senpeng Sheng, John D. Stone
  • Patent number: 7262661
    Abstract: A variable gain amplifier contains a plurality of differential transistor pairs. A temperature dependent current is generated in the current path of each differential transistor pair. A generated gain control current is converted to a temperature dependent gain control current and applied in circuit with control inputs of the transistors of the paired differential transistors. The temperature dependent gain control current is obtained from a gain control current corresponding to a desired gain which is then multiplying the control current by the temperature dependent current. The temperature dependent gain control current is modified to compensate for gain non-linearity by introducing an offset as a function of the gain control current.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: August 28, 2007
    Assignee: Linear Technology Corporation
    Inventor: Min Z. Zou
  • Patent number: 7236055
    Abstract: An amplifier includes a differential amplifier (10) having an input stage (20) for amplifying a differential input signal (Vin), and an output stage (6) coupled to the input stage (20) for producing and output signal (Vout). The input stage (20) includes main input circuitry (20A) for amplifying small-signal values of the input signal (Vin) and alternative input circuitry (20B) for amplifying the input signal (Vin) during conditions which cause thermal imbalance in the main input circuitry (20B). The input stage (20) includes switching circuitry (12) for coupling the input signal (Vin) to the main input circuitry (20A) during normal small-signal operating conditions and to the alternative input circuitry (20A) during large-signal operating conditions that cause thermal imbalance in the main input circuitry (20B).
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Joel M. Halbert, Ahmad Dashtestani