Abstract: An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more power amplifiers for amplifying a signal for transmission through the antenna. Radio-frequency power amplifier circuitry may include an amplifier, an input transformer for coupling radio-frequency input signals to the amplifier, an active inductor load coupled to the input transformer, and a second order intermodulation generation circuit configured to generate and inject a second order intermodulation product into the input transformer. The injected second order intermodulation product can be used to cancel out unwanted third order intermodulation products generated by the amplifier, which reduces intermodulation distortion experienced by the amplifier circuitry.

Abstract: An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more power amplifiers for amplifying a signal for transmission through the antenna. Radio-frequency power amplifier circuitry may include an amplifier, an input transformer for coupling radio-frequency input signals to the amplifier, an active inductor load coupled to the input transformer, and a second order intermodulation generation circuit configured to generate and inject a second order intermodulation product into the input transformer. The injected second order intermodulation product can be used to cancel out unwanted third order intermodulation products generated by the amplifier, which reduces intermodulation distortion experienced by the amplifier circuitry.

Abstract: Switchable feedback circuit for radio-frequency (RF) power amplifiers. In some embodiments, an RF power amplifier (PA) circuit can include a transistor having a base, a collector, and an emitter. The transistor can be configured to amplify an RF signal. The RF PA circuit can further include a switchable feedback circuit implemented between the collector and the base. The switchable feedback circuit can be configured to provide a plurality of resistance values between the collector and the base. Such a PA circuit can be implemented in products such as a die, a module, and a wireless device.

Abstract: Techniques are described herein that adaptively suppress harmonic distortion in an amplifier utilizing negative gain. The amplifier includes a first amplifier stage and a second amplifier stage, which are coupled in parallel. The first amplifier stage has a positive gain. The second amplifier stage has a negative gain to suppress total harmonic distortion of a system that includes the amplifier. The amplifier further includes shunt-peaking circuitry coupled to the first amplifier stage and the second amplifier stage to increase a maximum operating frequency at which the amplifier is capable of operating.

Abstract: An internally, resistively, sensed Darlington amplifier includes a Darlington amplifier, at least an input transistor, an output transistor, a resistive divider, a signal input node, and a signal output node. The Darlington amplifier is responsive to an input signal and configured to generate an output signal. An internal bias setting resistor is coupled between the signal output node, a collector of the output transistor, and the resistive divider. The bias setting resistor is configured to set and regulate the bias current of the Darlington amplifier.

Abstract: A method for compensating for a dielectric absorption effect in a measurement configuration during measurements by an instrument having measurement terminals includes providing a feedback loop in the instrument, the loop having a gain adjustment and a simulation impedance and being adapted to provide a signal counter to the dielectric absorption at the measurement terminals; applying a transient calibration signal to the test terminals for at least two values of the gain adjustment; measuring a response to the calibration signal for each of the at least two values; and determining an operating value of the gain adjustment based on the measured responses. The operating value is used for subsequent measurements by the instrument, the simulation impedance modeling the dielectric absorption characteristics of the measurement configuration.

Abstract: A radio frequency (RF) front-end circuit and an operating method thereof are provided. The proposed RF front-end circuit includes a first linear amplifier, a second linear amplifier, and a calibration unit. The first linear amplifier performs a high-frequency amplification on a RF signal to generate an amplified RF signal, and down-converts the amplified RF signal into an intermediate frequency (IF) signal. The second first linear amplifier performs a low-frequency amplification on the IF signal to generate an amplified IF signal. The calibration unit is coupled to the first and the second linear amplifiers, and receives a voltage gain fed back from the second linear amplifier. Then, the calibration unit performs an auto-calibration procedure according to the voltage gain fed back from the second linear amplifier to search for an input current value of the first linear amplifier, which correspondingly maximizes the voltage gain of the first amplifier.

Abstract: A high-frequency bandwidth amplifier circuit comprises: a push-pull amplifier, a feedback resistor, a first active inductor, and a second active inductor. An input terminal of the push-pull amplifier is connected with an external input terminal. An output terminal of the push-pull amplifier is connected with an output port. A first end of the feedback resistor is connected with the external input terminal A second end of the feedback resistor is connected with the output port. A first end of the first active inductor is connected with an external power source. A second end of the first active inductor is connected with the output port. A first end of the second active inductor is grounded. A second end of the second active inductor is connected with the output port.

Abstract: A radio frequency (RF) front-end circuit and an operating method thereof are provided. The proposed RF front-end circuit includes a first linear amplifier, a second linear amplifier, and a calibration unit. The first linear amplifier performs a high-frequency amplification on a RF signal to generate an amplified RF signal, and down-converts the amplified RF signal into an intermediate frequency (IF) signal. The second first linear amplifier performs a low-frequency amplification on the IF signal to generate an amplified IF signal. The calibration unit is coupled to the first and the second linear amplifiers, and receives a voltage gain fed back from the second linear amplifier. Then, the calibration unit performs an auto-calibration procedure according to the voltage gain fed back from the second linear amplifier to search for an input current value of the first linear amplifier, which correspondingly maximizes the voltage gain of the first amplifier.

Abstract: Power amplifiers (PAs) using a Doherty or other power output level sensitive configuration have been employed for several years in telecommunications (as well as other applications) to take advantage of efficiency gains. For many of these applications, baseband signals are predistorted to compensate for nonlinearities in the PAs, but because there is a “switching event” in a Doherty-type amplifier (for example), the nonlinearities become dynamically varying. As a result, digital predistortion (DPD) becomes increasingly difficult to perform. Here, DPD modules are provided that adapt to changes in dynamically varying PAs based on a determination of the average power or other relevant metric prior to transmission.

Abstract: An infrared light emitting diode circuit and related methods are disclosed. Exemplary features of embodiments comprise circuitry for controlling the voltage delivered to infrared light emitting diodes and for reducing the power consumption of the circuitry in the absence of audio signals to be transmitted.

Abstract: An amplifier circuit is used in a multimeter to amplify signals applied between a pair of test terminals. A voltage applied to one of the test terminals is amplified by a first operational amplifier configured as a voltage follower. An output of the first operational amplifier is applied to an inverting input of a second operational amplifier configured as an integrator. An output of the second operational amplifier is connected to the other of the test terminals. A voltage generated at the output of the second operational amplifier provides an indication of the magnitude and polarity of the voltage applied to the first and second test terminals.

Abstract: Disclosed are circuits, techniques and methods for buffering a high frequency signal for transmission over an integrated circuit. In one particular implementation, a plurality of amplification circuits are individually biased for amplifying a signal from a voltage controlled oscillator and/or digitally controlled oscillator to provide a local oscillator signal on a device.

Abstract: An amplifier circuit (100) has an input stage (OP1) and an output stage (Q1, Q2) operating with different supply voltages and different quiescent voltages. The output stage has a feedback input connected to receive a feedback signal from the output of the output stage. A biasing circuit (602) applies a bias signal (Ioff) to said input stage at an operating level appropriate to establish a quiescent output voltage different from a ground reference level of the input stage.

Abstract: The present invention relates to a gain control circuit, which detects an output signal of a front-end circuit to produce a detection signal. An operation unit performs an accumulation operation to the detection signal and thereby produces an operation signal. In addition, the operation unit also resets the operation unit according to a reset signal. A reset unit produces the reset signal for every predetermined interval of time. A control unit produces a control signal according to the operation signal and a first threshold value for controlling an output gain of the front-end circuit.

Abstract: An amplifier circuit is used in a multimeter to amplify signals applied between a pair of test terminals. A voltage applied to one of the test terminals is amplified by a first operational amplifier configured as a voltage follower. An output of the first operational amplifier is applied to an inverting input of a second operational amplifier configured as an integrator. An output of the second operational amplifier is connected to the other of the test terminals. A voltage generated at the output of the second operational amplifier provides an indication of the magnitude and polarity of the voltage applied to the first and second test terminals.

Abstract: An amplifier circuit is used in a multimeter to amplify signals applied between a pair of test terminals. A voltage applied to one of the test terminals is amplified by a first operational amplifier configured as a voltage follower. An output of the first operational amplifier is applied to an inverting input of a second operational amplifier configured as an integrator. An output of the second operational amplifier is connected to the other of the test terminals. A voltage generated at the output of the second operational amplifier provides an indication of the magnitude and polarity of the voltage applied to the first and second test terminals.

Abstract: An operational amplifier and a method for amplifying a signal. Embodiments provide a convenient and effective mechanism for reducing die area, design time and design verification time by sharing compensation components between the common-mode and differential feedback networks of the operational amplifier. As such, fewer compensation components are required, thereby reducing component die area. Additionally, given that the compensation components are shared between the common-mode and differential feedback networks, the feedback networks can be stabilized together with fewer compensation components to specify and verify, thereby reducing design and design verification time. Further, embodiments provide a compensation component coupling which does not couple directly to virtual ground, thereby reducing the noise of the operational amplifier.

Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals. Differential RF power amplifiers are also provided with inductive networks coupled at various nodes of the power amplifiers. In some examples, techniques are used to stabilize differential power amplifiers by stabilizing common-mode feedback loops.

Abstract: Techniques are provided for dynamically biasing an amplifier to extend the amplifier's operating range while conserving power. In an embodiment, a detector is provided to measure the amplifier output to determine an operating region of the amplifier. The output of the detector may be input to a bias adjuster, which outputs a dynamic voltage level supplied to at least one bias transistor in the amplifier. Multiple embodiments of the detector and bias adjuster are disclosed.

Abstract: A push-pull amplifier includes a pair of transistors, wherein each of the transistors has a control terminal, a first terminal, and a second terminal. A current that flows between the first terminal and the second terminal is controlled in accordance with signals applied to the control terminal, such that when an amount of current flowing between the first terminal and the second terminal of one of the transistors is within a predetermined range, a high-frequency component of the signals input to the control terminal of one of the transistors is amplified, and when this current is outside the predetermined range, the high frequency component is not amplified.

Abstract: A power amplifier includes an input circuit, three power supply lines with voltages successively decreasing in an order of first, second and third power supply lines, a push-side driving circuit and a pull-side driving circuit which receive control signals from the input circuit, three driving signal lines which are led out of the driving circuits, three output transistors which have current paths connected at one ends to the first, second and third power supply lines, and have gates connected to the three driving signal lines, respectively, an output terminal which is commonly connected to the other ends of the current paths of the output transistors, an impedance circuit which adjusts a gate impedance of the output transistor connected to the third power supply line, and a feedback circuit connected between the output terminal and the input circuit.

Abstract: To update the control value to a value of higher precision in a predistortion type distortion compensation apparatus for compensating the distortion occurring in an amplifier for amplifying an input signal by the control using a control value corresponding to the level of the input signal.

Abstract: A high frequency power amplifier circuit comprises an input circuit receiving an input signal; a first cascode stage connected to the input circuit and a DC voltage source and comprising at least one FET having a source, a drain, and a gate; an second cascode stage comprising: at least one bipolar transistor having an emitter, a collector and a base and being supplied by the first cascode stage and receiving the input signal from the first cascode stage, and a delimiting means, preferably a diode, connected to the bipolar transistor and adapted to reduce the voltage level at the drain of the FET or the emitter of the bipolar transistor respectively; and an output circuit connected to the second cascode stage and outputting an output signal.

Abstract: A three-stage transimpedance amplifier, where the first stage is a shunt-shunt feedback amplifier, the second stage is a simple voltage amplifier, and the third stage is a shunt-shunt feedback amplifier. The third stage comprises a pMOSFET serially connected with a nMOSFET, where their gates are connected together and to the output port of the second stage, and comprises a feedback pMOSFET or resistor to provide negative feedback from the drains of the pMOSFET and nMOSFET to the output port of the second stage.

Abstract: An apparatus and method for a sensing circuit for cancelling an offset voltage. Specifically, in one embodiment, a CMOS inverter amplifier amplifies an input signal present at an input node. A resistive feedback circuit is coupled to the CMOS inverter amplifier for cancelling an offset voltage that is associated with the CMOS inverter amplifier. This is accomplished by biasing the CMOS inverter amplifier to its threshold voltage. A bias circuit is coupled to the resistive feedback circuit for biasing MOSFET transistors in the resistive feedback circuit at a subthreshold conduction region. As such, the resistive feedback circuit presents a high impedance to the input node. A clamping circuit, coupled to the resistive feedback circuit, maintains operation of the transistors in the resistive feedback circuit in the subthreshold conduction region.

Abstract: A transimpedance amplifier having a first input port to connect to a signal source having an output impedance, and a second input port loaded by an impedance matched to the output impedance of the signal source, the amplifier comprising three stage pairs. The first stage pair comprises two inverting amplifiers, each employing negative feedback. The second stage pair comprises two inverting amplifiers with cross-coupled negative feedback. The third stage pair is similar in structure to the first stage pair. The inverter amplifiers in the third stage pair provide the differential voltage.

Abstract: A push pull amplifier is disclosed having upper and lower output devices operating in a mode in which the devices drive a load alternately. The amplifier includes bias means for providing a bias current to the output devices at all times. The bias means is incorporated in a feedback loop and is arranged such that transitions from load current to minimum bias current in the upper and lower output devices are sufficiently gradual so that harmonic frequencies generated by the transitions are within the capability of the amplifier under all signal conditions. The feedback loop includes a non-linear transform circuit for each upper and lower output device to prevent the bias current reducing to zero. The feedback loop also includes a linearity control circuit for controlling the harmonic frequencies in the upper and lower output devices.

Abstract: The present invention provides an high beta, high speed operational amplifier output stage (100). The advantages of the operational amplifier output stage over conventional methods disclosed is up to &bgr;2 rather than a single beta. The present invention achieves this using an pre-driver sub-stage (122) having a plurality of translinear loops so that there is no net signal loss to the final sub-stage (123). The output of the disclosed operational amplifier output stage takes the form: &dgr;Io≈&bgr;n*&bgr;p*&dgr;Iin. When used with a localized feedback circuitry, speed performance is increased and bandwidth is extended.

Abstract: An amplifier circuit includes a circuit input, and a circuit output. An inverter, including first and second MOS transistors is connected between first and second supply voltages, and has an inverter input connected to the circuit input, and an inverter output, which provides an inverter output current corresponding to a circuit input voltage. A first resistive element comprises a third MOS transistor and a fourth MOS transistor of opposite conductivity types, and each having their gate and drain terminals connected to the inverter output and the circuit output, and having their respective source terminals connected to respective ones of the first and second supply voltages. A second resistive element includes a fifth MOS transistor and a sixth MOS transistor of opposite conductivity types, and each having its drain-source path connected between the circuit output and the circuit input, and having its gate connected to a respective voltage source.

Abstract: A switched-mode power amplifier is configured for performing power amplification of a plurality of signals input thereto and integrally summing (combining) those signals. Conceptually, this is achieved by replacing the center-tapped input winding component of the transformer within a conventional, balanced-type transformer-coupled voltage switching amplifier with separate input components, one for each input signal, in similar manner to the configuration of the input components of a conventional three-port combiner (trifilar). Accordingly, the input winding of the amplifier's transformer is comprised of a plurality of series-coupled windings, one for each of the plurality of input components/signals. In one embodiment, using balanced amplifier input components comprising series-coupled center-tapped windings, the center tap of each input winding is connected to a voltage rail and each terminal end of the winding is driven by an amplifying active device (i.e.

Abstract: It is shown a low noise amplifier comprising a first circuit block suitable for converting a first amplifier input voltage signal into current, a second circuit block adapted to divide the current coming from said first block, said second block being controlled by a second voltage signal, said first and second blocks conferring a variable voltage gain to the amplifier. The amplifier comprises at least one first and at least one second resistors and a feedback network, said at least one first resistor connected with one first output terminal of said second block and with a supply voltage, and said at least one second resistor being connected between said at least one first and at least one second output terminals of said second block, and said feedback network being coupled with said at least one first terminal and with said first circuit block, and said at least one second terminal being coupled with at least one output terminal of said low noise amplifier.

Abstract: A negative feed-back amplifier is provided in which a distortion of signals is reduced and a dynamic range is increased. An input signal is input to a base of a transistor and is output from a collector as a reversed signal and a non-reversed signal is output from an emitter. The reversed signal is input to a base of a transistor and is output through a resistor from an emitter of the transistor. The non-reversed signal is input through a condenser to a base of a transistor and is output from a collector in a reversed form. An output signal from the transistor is input to an emitter follower of a transistor at high input impedance and output at low output impedance and then attenuated by resistors and negative feed-back signal is produced. The negative feed-back signal is input through a resistor to a base of the transistor to be added to the input signal.

Abstract: The present invention relates generally to an amplifier such as that with the radio frequency (RF) spectrum having a nonlinear feedback loop to cancel out distortions in the input signal, and method therefor.

Abstract: A power supply circuit is equipped with a first amplification path 10 in which a first potential is input and that supplies current to an output terminal when a control signal is in a first state; a second amplification path 20 in which a second potential is input and that absorbs current from the output terminal when a control signal is in a second state; an intermediate potential forming circuit that forms a third potential between the first potential and the second potential; and a comparison circuit 30 that compares the third potential with a potential at the output terminal to form a control signal and supplies the same to the first and second amplification paths.

Abstract: A wide bandwidth, multi-FET current sharing output stage, MOS audio power amplifier employs multiple feedback loops. An audio input is supplied to a voltage feedback amplifier stage driving a push-pull voltage gain/phase splitter stage. A bias adjustment stage driven from the push-pull voltage gain/phase splitter stage drives a current drive stage. The current drive stage drives an output stage comprising a plurality of paralleled current shared individual MOS output transistors driving an output node connected to a load. Up to three feedback loops are employed. A first voltage feedback loop comprises a voltage feedback stage having an input connected to a voltage divider driven from the first terminal of the load and an output connected to a feedback input node in the voltage feedback amplifier stage.

Abstract: The present invention concerns a circuit (30; 50) for supplying a first current (I3) to an external element (3), this current having to be supplied with high precision at a desired nominal value. The current supply circuit includes a first transistor (T3) through which the first current flows, an operational amplifier (A2) to a first input of which a reference voltage (Vref) is supplied, and to an output of which a control signal from the first transistor is supplied, and an external resistor (Re1; Re2). These the circuit is characterized in that it further includes a second transistor (T4) through which a second current (I4; I4/m) flows, said second current also flowing through the external resistor. Such an arrangement of the circuit according to the present invention allow the value of the first current to be trimmed with great precision to its nominal value.

Abstract: A push-pull wideband semiconductor amplifier for use in, for example, a CATV (cable television) system. The amplifier suppresses deterioration of composite second-order (CSO) distortion in output signals. The push-pull wideband amplifier includes: a divider which divides a signal inputted by way of an input terminal into two signals of differing phase, first and second amplifying circuits each of which amplifies the signal divided by the divider, and a combiner which combines the two signals amplified by the first and second amplifying circuits into one signal and outputs the result signal. The node between the first amplifying circuit and the second amplifying circuit is an imaginary ground point having a potential of 0 V from the standpoint of an alternating-current signal. A termination circuit is provided between this imaginary ground, point and ground and absorbs fluctuation in potential generated at the imaginary ground point.

Abstract: Each of a plurality of photodiodes forming a photodetector is mounted on a respective metal pad on the surface of a semiconductor integrated circuit chip including a corresponding number of amplifier circuits for detecting the photocurrent from respective photodiodes. Each circuit comprises a high gain, high input impedance amplifier and a feedback element, typically a resistor of high value, connected across the amplifier between input and output nodes thereof. Each photodiode mounting metal pad and each feedback resistor is connected to a common input node of a respective amplifier by metal paths within a connecting structure forming part of the integrated circuit. Adverse effects on the output current from the photodiodes are reduced by forming a junction of the path from each feedback resistor with the path from the corresponding photodiode at the metal pad on which the photodiode is mounted, and interconnecting such junction along a common path to the corresponding amplifier input node.

Abstract: An operational amplifier output circuit having a low, stable quiescent current includes an input stage (22) receiving an input voltage (v.sub.in ") and producing first (v.sub.1) and second (v.sub.2) signals. An output stage (23) includes a pull-up transistor (1) and a pull-down transistor (2), a base of the pull-up transistor (1) receiving the first signal (v.sub.1). An emitter of the pull-up transistor (1) is coupled by an output conductor (30) to a collector of the pull-down transistor (2). A base of the pull-down transistor is coupled to receive the second signal (v.sub.2), and an emitter of the pull-down transistor (2) is coupled to a second reference voltage conductor (GND). A feedback stage (24) includes a first sensing circuit (36) coupled to the pull-up transistor 1 and produces a third signal (v.sub.3) representing a collector current of the pull-up transistor (1), a second sensing circuit (37) coupled to the pull-down transistor (2) and producing a fourth signal (v.sub.

Abstract: An amplifier circuit (30) has the capability for driving a large number of loads while still maintaining the desirable gain response. The amplifier circuit (30) includes two push-pull amplifier circuits (31 and 41). A first push-pull amplifier circuit (31) has a pair of bipolar transistors (33 and 34) connected in a cascode circuit configuration and a second pair of bipolar transistors (35 and 36) connected in a cascode circuit configuration. In addition, the second push-pull amplifier circuit (41) has a first pair of bipolar transistors (43 and 44) connected in a cascode circuit configuration and a second pair of bipolar transistors (45 and 46) connected in a cascode circuit configuration. The channel distortion and gain response of the amplifier circuit (30) are significantly improved by the push-pull amplifier circuits (31 and 41).

Abstract: The present invention solves the gain, noise figure, and distortion problems of prior art thermal compensation circuits by incorporating a temperature-compensating circuit in the feedback loop of a transistor amplifier arrangement. Using this method, the insertion loss is reduced as the gain of the amplifier varies proportionately to the temperature. This method has a negligible effect on the noise figure and distortion, and the incremental cost is much lower than the conventional circuits. Furthermore, the present invention can be used in both single-ended or push-pull dual amplifier configurations.

Abstract: An amplifier circuit for a cable access television line amplifier has a circuit input and a circuit output and includes a first cascode amplifier having a first input and a first output, and a second cascode amplifier having a second input and a second output where the second cascode amplifier is coupled in a push-pull arrangement with the first cascode amplifier. The amplifier circuit further includes input circuitry for coupling the circuit input to the first and second inputs and output circuitry for coupling the first and second outputs to the circuit output. The first cascode amplifier includes a first field effect transistor coupled to the first input; the second cascode amplifier includes a second field effect transistor coupled to the second input; the first cascode amplifier further includes a third field effect transistor coupled to the first output; and the second cascode amplifier further includes a fourth field effect transistor coupled to the second output.

Abstract: Distortion control in a push-pull output stage of a speech amplifier of a telephone powered through the telephone line is more effectively and advantageously implemented by independently sensing an eventual state of saturation reached by any of the two output transistors of the amplifier, summing the current signals representative of the sensed state of saturation of either or both output transistors, integrating the resulting sum current signal to produce a DC signal and using the DC signal for activating an AGC loop. The DC signal indiscriminately accounts for any cause of saturation, though virtually representing the level of the amplified AC signal. Distortion may be controlled without penalizing output voltage swing and power consumption.

Abstract: A current sourcing output stage for a high voltage operational amplifier receives a low voltage input signal (V.sub.IN) and provides a high current output signal corresponding to the low voltage input signal at an output terminal (8). A first PNP transistor (Q1) is coupled between a voltage supply (V.sub.CC) and a plurality of cascaded PNP transistors (Q2, Q3, Q8-Q11) coupled to the output terminal (8). The base of the first PNP transistor (Q1) is coupled to receive the input signal (V.sub.IN) and the bases of the cascaded PNP transistors are coupled to receive different bias voltages A control circuit (Q5-Q7, R1-R5) is coupled to the voltage supply (V.sub.

Abstract: An amplification circuit includes a push-pull type output circuit including first and second output transistors operating complimentarily connected in series between dc current source terminals, the bases of the first and second transistors being driven by a pre-stage output, a current detecting resistance inserted between either one of the first and second transistors and the dc current source terminals for detecting a bias current of the output circuit, an error amplification circuit for amplifying difference between voltage across the current detecting resistance and reference voltage and for negative-feedback controlling the bias current of the output circuit, and a diode connected in parallel to the current detecting resistance for bypassing a current flowing during outputting of a signal.

Abstract: A push-pull output stage for electronic integrated circuits includes two NPN transistors (Q1, Q2) connected in series between two supply terminals. The output (S) is the junction point of the transistors. A third NPN transistor (Q3) has its base and its collector connected respectively to the base and to the collector of Q1. Two current flow arms (R1, Q4 and R2, Q5) are formed, one to establish a current depending on the potential of the emitter of Q3 and the other to establish a current depending on the potential of the emitter of Q1. The arms are mounted in a current mirror arrangement, the second arm tending to copy the current of the first arm; the current mirror generating a current output (S2) representing a difference between the current set up in the second arm and the current copied from the first arm. This current output is used to control the conduction of the second transistor (Q2).

Abstract: An output stage for an amplifier includes first and second load current-carrying n-p-n output transistors disposed in different respective amplifier branches having different amplification properties. Negative feedback and limiting circuitry provides a negative feedback current to the first one of the output transistors and limits the negative feedback current to a preselected maximum value over a predetermined output current range whereby the amplification properties of the first one of the output transistors are affected in a range of output voltages of the amplifier stage.

Abstract: A broadband RF amplifier with high efficiency and high reverse isolation having a common emitter stage connected in a cascode configuration to a common base stage, said cascode driving the common base stage in a push-pull operation with a common collector stage.

Abstract: An amplifier circuit comprising an input amplifier stage, a push-pull output stage, a bias stage having the same construction as the input amplifier stage, a first resistor to be given a current flowing through the bias stage, second and third resistors connected along with the first resistor between a power supply and the ground in series therewith, and fourth and fifth resistors connected between the output point of the push-pull output stage and the ground in series therewith. The point of connection between the fourth resistor and the fifth resistor is connected to the input amplifier stage to provide a negative feedback loop having no capacitor.