Including Push-pull Amplifier Patents (Class 330/262)
  • Patent number: 9641141
    Abstract: Even harmonics are suppressed by a harmonics-reducing bias generator that drives bias voltages to cascode control transistors in series with driver transistors in a power amplifier. A first bias voltage is generated by mirroring pull-up currents in the power amplifier. A p-channel source transistor and a p-channel cascode current-mirror transistor also mirror the power amplifier pull-up current to a midpoint node. An n-channel sink transistor and an n-channel cascode current-mirror transistor mirror the pull-down current in the power amplifier to the midpoint node. An op amp compares the midpoint node to VDD/2, and drives the gate of a p-channel feedback transistor. Current from the p-channel feedback transistor flows through an n-channel cascode current-mirror transistor that generates a second bias voltage. The second bias voltage is adjusted until the midpoint node reaches VDD/2, causing the pull-up and pull-down currents in the power amplifier to better match, reducing even harmonics.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: May 2, 2017
    Assignee: Hong Kong Applied Science and Technology Research Institute Company Limited
    Inventors: Shiyuan Zheng, Zhiwei Wu
  • Patent number: 9028479
    Abstract: A radio-frequency (RF) amplifier having a direct response to an arbitrary signal source to output one or more electrosurgical waveforms within an energy activation request, is disclosed. The RF amplifier includes a phase compensator coupled to an RF arbitrary source, the phase compensator configured to generate a reference signal as a function of an arbitrary RF signal from the RF arbitrary source and a phase control signal; at least one error correction amplifier coupled to the phase compensator, the at least one error correction amplifier configured to output a control signal at least as a function of the reference signal; and at least one power component coupled to the at least one error correction amplifier and to a high voltage power source configured to supply high voltage direct current thereto, the at least one power component configured to operate in response to the control signal to generate at least one component of the at least one electrosurgical waveform.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: May 12, 2015
    Assignee: Covidien LP
    Inventor: James H. Orszulak
  • Patent number: 8907728
    Abstract: An amplifier including a high supply voltage source and a low supply voltage source and two parallel signal paths. Each signal path is connected to the high and the low supply voltage sources and includes a first amplifier and a second amplifier. The two signal paths are connected to each other only at a common input node and a common output node, so that the respective first amplifiers operate independently of each other. The first amplifiers are configured to convert at least a part of an input voltage signal into a signal current. The signal paths are configured so that the signal current in use drives the respective second amplifier to provide an amplified output current to the common output node.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: December 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Gavin Watkins
  • Patent number: 8779801
    Abstract: A switching circuit includes a first input stage having an input for receiving a first input signal, an output, and a power terminal for receiving an increasing analog current, a second input stage having an input for receiving a second input signal, an output, and a power terminal for receiving a decreasing analog current, and an output node coupled to the outputs of the first input stage and the second input stage for providing a switched output signal. An output stage is coupled between the first and second input stages and the output node. The first and second input stages are operational amplifiers.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: July 15, 2014
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd.
    Inventors: Min Chen, Wen Liu, HongXia Li, XiaoWu Dai
  • Publication number: 20140155126
    Abstract: A push-pull amplifier has an input node and a series connection of two resistors. The series connection comprises a first terminal, a second terminal, and a third terminal. A first resistor of the two resistors is connected between the first terminal and the second terminal. A second resistor is connected between the second and third terminals. The input node is connected to the second terminal. A first controllable current source is connected to the first terminal of the series connection for sourcing a first current to the series connection. A second controllable current source is connected to the third terminal of the series connection for sinking a second current from the series connection. A first transistor and a second transistor are connected in push-pull configuration, wherein a control input of the first transistor is connected to the first terminal of the series connection and a control input of the second transistor is connected to the third terminal of the series connection.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Inventors: Werner Schelmbauer, Josef Holzleitner
  • Publication number: 20140077879
    Abstract: A push-pull amplifier includes an amplifier input, a push amplifier stage, a pull amplifier stage and an inverting amplifier output.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: Intel Mobile Communications GmbH
    Inventors: Ashkan Naeini, Martin Simon, Herbert Stockinger, Werner Schelmbauer, Bernd-Ulrich Klepser
  • Publication number: 20140022017
    Abstract: A circuit includes a first amplifier and a second amplifier, wherein first amplifier is configured to receive an input current at a first input of the first amplifier, and an output of the first op-mp is configured to drive a first input of the second amplifier. The circuit further includes a pull-up current source selectively coupled to the first input of the second amplifier, and a pull-down current source selectively coupled to the first input of the second amplifier. If the absolute value of the input current is larger than a predefined threshold current: i) the pull-up current source is configured to drive current into the first input of the second amplifier for a first polarity of the input current, and ii) the pull-down current source is configured to sink current from the first input of the second amplifier for a second polarity of the input current.
    Type: Application
    Filed: September 27, 2013
    Publication date: January 23, 2014
    Applicant: MARVELL WORLD TRADE LTD.
    Inventor: Sasan Cyrusian
  • Patent number: 8629727
    Abstract: A power amplifier includes a first transistor and a first inductor disposed between the first transistor and a voltage source. A first node between the first transistor and the first inductor is an output node. The power amplifier further includes a second inductor disposed between the first transistor and ground The power amplifier further includes a third inductor coupled to a gate of the first transistor and configured as a first AC input. The power amplifier further includes a first phase conditioner inductively coupled to the second inductor and the third inductor and configured to set phases of AC signals across the first inductor and the second inductor in phase. The second inductor is configured to release energy into the first inductor to raise a voltage of the AC signal and raise a power output at the output node.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: January 14, 2014
    Assignee: Marvell Internatonal Ltd.
    Inventors: Sehat Sutardja, Poh Boon Leong, Ping Song, Nuntha Kumar Krishnasamy Maniam
  • Publication number: 20140009233
    Abstract: An amplification system is provided that comprises a push-pull amplifier system having a first power transistor series coupled with a second power transistor that alternately switch between a push-pull amplifier mode of operation and a single-ended amplifier mode of operation. In the push-pull amplifier mode, both the first power transistor and the second power transistor alternately conduct to provide an amplified output signal to an output load in response to an input signal having an amplitude that is greater than or equal to a threshold level. In the single-ended amplifier mode of operation, the first power transistor conducts and the second power transistor is disabled for amplification purposes in response to the input signal having an amplitude that is less than the threshold level.
    Type: Application
    Filed: July 9, 2012
    Publication date: January 9, 2014
    Inventors: George CABRERA, Dmitri BORODULIN
  • Patent number: 8564370
    Abstract: An error amplifier and a LED circuit comprising the same are provided. The LED circuit comprises an inductor, a group of LEDs and a power MOS connected to the inductor, an error amplifier and a pulse width modulator controlling the gate of the power MOS according to an error amplifier output. The error amplifier comprises a differential input stage, an output stage having a NMOS, a PMOS and an adjusting current source connected to the gate of the PMOS. During a first operation mode, a control voltage makes the adjusting current source turn on, and during a second operation mode, the control voltage makes the adjusting current source turn off.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: October 22, 2013
    Assignee: Himax Analogic, Inc.
    Inventors: Aung Aung Yinn, Chow-Peng Lee
  • Patent number: 8476971
    Abstract: A driver utilizes selective biasing of the terminal of an operational amplifier to reduce offset in the operational amplifier output. Each operational amplifier input includes a differential input pair of transistors including a NMOS transistor and PMOS transistor. At low and high ends of the input voltage range these transistors are selectively and individually coupled to either a standard input or biased to be on so as to contribute offset for offset compensation. The transistors are biased in a conventional manner for input voltages between the low and high ends of the voltage range.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: July 2, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yung-Chow Peng, Wen-Shen Chou, Ching-Ho Chang, Wan-Te Chen
  • Publication number: 20130141165
    Abstract: There is provided an integrated circuit comprising a main push-pull amplifier (108, 110) with balanced outputs and an additional push-pull amplifier (862, 863) with balanced outputs. Each of these balanced outputs is connected to an off-chip load (822) via respective bonding wires (818, 828, 830, 880) to provide a combined amplified signal to the load. The additional amplifier serves to compensate for crossover distortions generated by the main amplifier.
    Type: Application
    Filed: June 13, 2011
    Publication date: June 6, 2013
    Applicant: NUJIRA LIMITED
    Inventor: Martin Paul Wilson
  • Patent number: 8446228
    Abstract: An oscillator circuit comprises a push-push oscillator and a differential output, comprising a first and a second output circuit. The push-push oscillator has a first and a second branch. Each of the first and second branch comprises an own voltage divider branch of a common bridge circuit. Each of the first and second voltage divider branches comprises an own pair of micro-strip lines connected in series. Each of the first and second voltage divider branches has an own tap. Both taps are connected to each other by at least one of a first capacity and a micro-strip line. The differential output comprises a first and a second output terminal. The first output terminal is connected via the first output circuit to a first node. The second output terminal is connected via the second output circuit to a second node. Each of the first and second nodes of the push-push oscillator is a common node of both of the first and the second branches.
    Type: Grant
    Filed: January 5, 2009
    Date of Patent: May 21, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Saverio Trotta
  • Publication number: 20130063211
    Abstract: The invention relates to a “push-pull” amplifier, comprising an input (12) and an output (14), which includes: a main amplification branch comprising two amplification transistors (18, 20) connected in opposite series between two supply voltages (V+, V?), the amplifier output (14) being connected between the two transistors (18, 20), and a control circuit (22, 24) for each amplification transistor (18, 20) connected to the input (12) to each receive as an input the signal to be amplified. The main amplification branch comprises, between each transistor (18, 20) and the output (14), a member having a nonlinear response (38, 40) and means (30, 32) for introducing at the input of the control circuit (22, 24) of each transistor (18, 20), a nonlinear compensating signal suitable for bringing about the circulation of a minimum current in the member having a nonlinear response (38, 40).
    Type: Application
    Filed: March 16, 2010
    Publication date: March 14, 2013
    Applicant: DEVIALET
    Inventors: Mathias Moronvalle, Pierre-Emmanuel Calmel
  • Publication number: 20120313707
    Abstract: A push-pull amplifier is provided for amplifying an input signal, having first and second amplifier elements. Each of the amplifier elements has a current-emitting electrode, a current-collecting electrode, and a current-controlling electrode. The input signal is supplied to the current-controlling electrodes of the amplifier elements via a respective input connection and a respective input inductor arranged between the respective input connection and the respective current-controlling electrode. The current-collecting electrodes are connected via a respective supply inductor having a common supply voltage. The current-emitting electrode of each amplifier element is connected to the current-collecting electrode of the other amplifier element via a respective capacitor. The current-emitting electrodes are connected to output connections on which the output signal can be picked up, and to a reference potential via a respective output inductor.
    Type: Application
    Filed: January 21, 2011
    Publication date: December 13, 2012
    Inventor: Oliver Heid
  • Publication number: 20120154045
    Abstract: A push-pull low noise amplifier (LNA) includes at least one amplifier block. Each amplifier block includes a bypass stage and at least one gain cell. The bypass stage has a first node and a second node. The gain cell has an input terminal and an output terminal, comprising a loading stage and a driving stage. When the push-pull LNA is in a first gain mode, the loading stage is enabled and the bypassing stage is disabled; and when the push-pull LNA is in a second gain mode, the loading stage is disabled and the bypassing stage is enabled.
    Type: Application
    Filed: May 17, 2011
    Publication date: June 21, 2012
    Inventors: Ming-Da Tsai, Yu-Hsin Lin
  • Publication number: 20110316630
    Abstract: Several push-pull linear hybrid class H amplifiers are disclosed. A split power rail provides a positive supply rail and a negative supply rail in response to a power supply control voltage. A push-pull amplifier stage is powered by the positive and negative supply rails. The amplifier stage receives an input signal and provides a corresponding amplified output signal. A power supply control circuit provides the power supply control voltage in response to the smaller of the positive and negative supply rails, and the input signal.
    Type: Application
    Filed: June 30, 2011
    Publication date: December 29, 2011
    Inventors: John Barry French, Andrew John Mason
  • Patent number: 8022776
    Abstract: The present disclosure relates to coupled circuits and methods of coupling circuits having a power supply wherein a plurality of transistors are inductively coupled directly to the power supply for providing a single DC supply voltage directly to each of the plurality of transistors, and wherein a plurality of transformers have primary and secondary windings, the primary and secondary windings providing, at least in part, inductive loads for inductively coupling the plurality of transistors to the power supply, the plurality of transformers also providing an AC signal path for coupling neighboring ones of the plurality of transistors together.
    Type: Grant
    Filed: August 2, 2006
    Date of Patent: September 20, 2011
    Assignee: The Regents of the University of California
    Inventors: Mau-Chung Frank Chang, Daquan Huang, Tim Richard LaRocca
  • Publication number: 20110163810
    Abstract: An audio amplifier circuit has a first cascode stage configured as a voltage gain stage and having an input for an audio signal, and an output. The circuit has a second cascode stage configured as a unity gain or near unity gain stage and having an input to receive an output from the first cascode stage, and a low impedance output to drive an output stage of an audio power amplifier. The first cascode stage has a first, input transistor having an input biased to a predetermined bias voltage, and a second, output transistor arranged to drive the second cascode stage. The first, input transistor of the first cascode stage may have a common-emitter configuration, and the second, output transistor may have a common-base configuration. The invention extends to an audio amplifier which includes a circuit of the invention.
    Type: Application
    Filed: September 8, 2009
    Publication date: July 7, 2011
    Inventor: Clive Thomas
  • Publication number: 20110115562
    Abstract: A generator for use with an electrosurgical device is provided. The generator has a gain stage electrically disposed between a first voltage rail and a second voltage rail, wherein the gain stage includes an input and an output. A voltage source operably coupled to the gain stage input and configured to provide an input signal thereto responsive to a drive control signal is also provided. The generator also has one or more sensors configured to sense an operational parameter of the amplifier and to provide a sensor signal corresponding thereto and a controller adapted to receive the sensor signal(s) and in response thereto provide a drive control signal to the voltage source.
    Type: Application
    Filed: November 16, 2009
    Publication date: May 19, 2011
    Inventor: James A. Gilbert
  • Patent number: 7920027
    Abstract: Techniques for biasing an amplifier using a replica circuit are disclosed. In an embodiment, a replica circuit having substantially the same topology and sizing as a push-pull amplifier circuit is coupled to a main push-pull amplifier circuit. A transistor in the replica circuit may be biased using feedback to generate a predetermined DC output voltage level, and such bias level may be applied to a corresponding transistor in the main push-pull amplifier circuit. In another embodiment, a transistor in a current bias module may be used to bias corresponding transistors in the main push-pull amplifier circuit and the replica circuit. Further techniques are disclosed for configuring the amplifier to have a non-uniform step size with finer resolution at lower power levels and coarser resolution at higher power levels to reduce power consumption at lower power levels.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: April 5, 2011
    Assignee: QUALCOMM Incorporated
    Inventor: Arvind Keerti
  • Patent number: 7889003
    Abstract: The invention describes a power amplifier comprising a first transistor (MHS) having a first control terminal and a first main current path coupled between a first supply terminal (Vdd) and a first node (VH), a second transistor (MLS) having a second control terminal and a second main current path coupled between a second supply terminal (Vss) and a second node (VL), a first controlled resistor (MHC) coupled between the first node and an output node (Vout) of the amplifier, a second controlled resistor (MLC) coupled between the second node and the output node (Vout) of the amplifier, the first transistor being controlled by a first driver comprising a level shifting circuit, and the second transistor being controlled by a second driver including a time delaying circuit.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: February 15, 2011
    Assignee: NXP B.V.
    Inventor: Roland Basten
  • Patent number: 7876162
    Abstract: An amplifier includes: a substrate; first to fourth amplifying units arranged on the substrate and each having first and second terminals, and each amplifying first and second signals to generate first and second amplified signals; a first inductive line arranged on the substrate, connecting the first terminal of the first amplifying unit and the first terminal of the second amplifying unit, and having a linear portion and a bending portion; a second inductive line arranged on the substrate, connecting the second terminal of the second amplifying unit and the first terminal of the third amplifying unit, and having a linear portion and a bending portion; a third inductive line arranged on the substrate, connecting the second terminal of the third amplifying unit and the first terminal of the fourth amplifying unit, and having a linear portion and a bending portion; a fourth inductive line arranged on the substrate, connecting the second terminal of the fourth amplifying unit and the second terminal of the firs
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: January 25, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kohei Onizuka, Masahiro Hosoya, Hiroaki Ishihara, Shoji Otaka, Osamu Watanabe
  • Patent number: 7821304
    Abstract: A semiconductor device stabilizes an operation of an input buffer. A semiconductor device includes an input potential detection unit, an input buffer, and a current sink unit. The input potential detection unit outputs a detection signal in response to a level of an input signal. The input buffer buffers the input signal by differentially amplifying the input signal through a first current sink unit. The current sink unit receives the detection signal, and in response to the detection signal, performs an auxiliary differential amplifying operation with respect to the input signal buffered by the input buffer.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: October 26, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Mi Hye Kim, Jae Jin Lee
  • Patent number: 7812667
    Abstract: A system and method of improving the power efficiency of a receiver for low duty cycle applications. In one aspect, the receiver includes a low noise amplifier (LNA) that is capable of being enabled in a relatively quick fashion so as to amplify an incoming signal when needed, and then being disabled to set the LNA in a low power consumption mode. In particular, the LNA includes a pair of complimentary devices, and an enable circuit adapted to quickly cause the complimentary devices to conduct substantially the same current. In another aspect, a bias voltage generating apparatus is provided that uses a residual voltage from a prior operation to establish the current bias voltage for the LNA. In particular, the apparatus includes a controller adapted to tune an adjustable capacitor to a capacitance based on a residual voltage applied to a fixed capacitor, and couple the capacitors together to establish the bias voltage.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: October 12, 2010
    Assignee: QUALCOMM Incorporated
    Inventor: Russell John Fagg
  • Patent number: 7804357
    Abstract: In order to allow to make compact a distributed amplifier by dispensing with any choke coil and reduce its cost, the distributed amplifier is configured such that it comprises an input side transmission line, an output side transmission line, and plural amplifier circuits connected to the input side transmission line and the output side transmission line, wherein push-pull amplifier circuits are employed as the amplifier circuits.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: September 28, 2010
    Assignee: Fujitsu Limited
    Inventor: Hisao Shigematsu
  • Publication number: 20100225397
    Abstract: An amplifier includes: a substrate; first to fourth amplifying units arranged on the substrate and each having first and second terminals, and each amplifying first and second signals to generate first and second amplified signals; a first inductive line arranged on the substrate, connecting the first terminal of the first amplifying unit and the first terminal of the second amplifying unit, and having a linear portion and a bending portion; a second inductive line arranged on the substrate, connecting the second terminal of the second amplifying unit and the first terminal of the third amplifying unit, and having a linear portion and a bending portion; a third inductive line arranged on the substrate, connecting the second terminal of the third amplifying unit and the first terminal of the fourth amplifying unit, and having a linear portion and a bending portion; a fourth inductive line arranged on the substrate, connecting the second terminal of the fourth amplifying unit and the second terminal of the firs
    Type: Application
    Filed: September 14, 2009
    Publication date: September 9, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kohei Onizuka, Masahiro Hosoya, Hiroaki Ishihara, Shoji Otaka, Osamu Watanabe
  • Publication number: 20100164628
    Abstract: A power amplifier formed by a plurality of pairs of transistors, each pair including a first transistor and a second transistor having each a respective input terminal and a respective output terminal. The output terminals of the first and second transistors of each pair are connected to an output distributed active transformer connected to a differential output of the power amplifier. The input terminals of the first and second transistors of each pair are connected to an input distributed active transformer connected to an input of the power amplifier.
    Type: Application
    Filed: December 28, 2009
    Publication date: July 1, 2010
    Applicant: STMicroelectronics S.r.I.
    Inventor: Andrea Pallotta
  • Patent number: 7719356
    Abstract: An amplifier stage capable of delivering a peak limited voltage pulse with sharp transitions, at a desired width and duty cycle, and with high efficiency is disclosed. One disclosed embodiment relates to a circuit that includes a tuned class D amplifier that receives an input signal and generates a pulsed RF output signal in response to the input signal. The pulsed RF output signal has a greater power than that of the input signal.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: May 18, 2010
    Assignee: Star RF, Inc.
    Inventor: Robert J. McMorrow
  • Patent number: 7705675
    Abstract: Exemplary techniques for implementing an amplifier suitable for RF amplification, such as a tuned class DE amplifier, are disclosed. One disclosed embodiment of a circuit for amplifying an RF signal includes a push-pull amplifier comprising a push transistor and a pull transistor. A first driver amplifier drives the push transistor of the push-pull amplifier with a first RF signal. A second driver amplifier drives the pull transistor of the push-pull amplifier with a second RF signal different from the first RF signal.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: April 27, 2010
    Assignee: Star RF, Inc.
    Inventor: Robert J. McMorrow
  • Patent number: 7602248
    Abstract: An idling current setting circuit (3) includes: current setting transistors (Q3, Q4) connected to output transistors (Q1, Q2) in a driver (2) in current mirror form; a plurality of current setting resistors (R1 to R4); and a plurality of switches (ASW1 to ASW4) for switching to any of the current setting resistors (R1 to R4). This enables the idling current to be set by the current mirror ratio between the current setting transistors (Q3, Q4) having no connection with the open gain of the power amplifier and the output transistors (Q1, Q2), so that the idling current can be arbitrarily set independently of the open gain.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: October 13, 2009
    Assignees: Niigata Seimitsu Co., Ltd., Ricoh Co., Ltd.
    Inventor: Kazuhisa Ishiguro
  • Patent number: 7567784
    Abstract: A tuner, a broadcast signal processing apparatus and method, which satisfy reception sensitivity of both terrestrial and cable televisions, when selecting a broadcast signal through a single conversion tuner, are provided. A tuner selects a broadcast signal of a selected channel. The tuner includes an input filter that filters a received broadcast signal into plural frequency bands based on a predetermined frequency band. An amplifier amplifies a second signal having an original phase induced by an output signal of the respective frequency bands, and a first signal having an opposite phase of the second signal, and outputs the signal induced by the amplified first and second signals as an amplification signal of the signal in the respective frequency bands. An inter-stage filter filters a frequency of the broadcast signal corresponding to the selected channel among the amplification signals output from the amplifier.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: July 28, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yong-ho Choi
  • Patent number: 7528651
    Abstract: An integrated noise isolation circuit on a single silicon substrate die having a structural arrangement that minimizes noise. The integrated circuit including a noise sensitive circuit including an input stage; a noise generating circuit including an output stage; at least one high voltage level shift circuit coupling the noise generating and noise sensitive circuits for transferring a signal from the input to the output stage; and at least one floating structure for isolating influence of the noise.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: May 5, 2009
    Assignee: International Rectifier Corporation
    Inventors: Jun Honda, Xiao-chang Cheng
  • Publication number: 20090102561
    Abstract: An amplifier with an output protection having an input stage defining a feedback node, an output stage connected to the feedback node and defining an output node supplying an output voltage, and a feedback stage connected between the output and the feedback nodes. A mirror stage is connected to the feedback node and has the same structure as the output stage, the mirror stage defining a reference node connected to the feedback stage for generating a reference voltage to be compared to the output voltage by the feedback stage. The feedback stage generates a current limitation signal fed to the feedback node when a difference between the output and the reference voltages is higher than a threshold.
    Type: Application
    Filed: April 4, 2008
    Publication date: April 23, 2009
    Applicant: STMicroelectronics Design and Application s.r.o.
    Inventors: Peter Murin, Hynek Saman
  • Publication number: 20090051434
    Abstract: A signal transfer circuit appropriate for use in realizing both high circuit stability and high current driving ability is disclosed. Signal transfer circuit A has current transfer circuit 3 that transfers a signal current via first reference current I1. In one embodiment, current transfer circuit 3 has current transcription circuit 30 that transcribes signal current Is to first current portion I1-1 of first reference current I1, and output current path 32 that transfers the first current portion I1-1. In one embodiment, current transfer circuit 30 has first current branching circuit 300 and second current branching circuit 302.
    Type: Application
    Filed: October 28, 2008
    Publication date: February 26, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Akira Takahashi
  • Patent number: 7477104
    Abstract: Power amplifier circuit outputs an output voltage corresponding to an input voltage supplied, and includes positive and negative-side output units including a positive or negative-side output resistor and a positive or negative-side transistor having its source terminal connected to one end of the positive or negative-side output resistor to make a current corresponding to a voltage supplied to its gate terminal flow to the positive or negative-side output resistor, positive and negative-side bias generating units which generate a positive or negative-side bias voltage corresponding to the input voltage, and positive and negative-side control units which control the voltage to be applied to the gate terminal of the positive or negative-side transistor such that the positive or negative-side bias voltage and source voltage of the positive or negative-side transistor become generally equal, and the voltage at connection node between the positive and negative-side output units is output as the output voltage.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: January 13, 2009
    Assignee: Advantest Corporation
    Inventor: Satoshi Kodera
  • Patent number: 7449951
    Abstract: An operational amplifier includes a differential amplifier for amplifying differential input signals to generate differential amplified signals. The operational amplifier also includes first and second single-ended amplifiers that each amplify the differential amplified signals to respectively generate first and second single-ended output signals that are differential with respect to each-other.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: November 11, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Tae-Hwan Oh
  • Patent number: 7425869
    Abstract: The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: September 16, 2008
    Assignee: California Institute of Technology
    Inventors: Ichiro Aoki, Seyed-Ali Hajimiri, David B. Ruthledge, Scott David Kee
  • Publication number: 20080116973
    Abstract: Exemplary techniques for implementing an amplifier suitable for RF amplification, such as a tuned class DE amplifier, are disclosed. One disclosed embodiment of a circuit for amplifying an RF signal includes a push-pull amplifier comprising a push transistor and a pull transistor. A first driver amplifier drives the push transistor of the push-pull amplifier with a first RF signal. A second driver amplifier drives the pull transistor of the push-pull amplifier with a second RF signal different from the first RF signal.
    Type: Application
    Filed: November 15, 2007
    Publication date: May 22, 2008
    Applicant: Star RF, Inc.
    Inventor: Robert J. McMorrow
  • Patent number: 7321752
    Abstract: A system and method to optimize the efficiency of an amplifier device is provided by the including a non-linear amplifier in a mobile radio device. A phase displaced signal in relation to the input signal is respectively produced in the amplifier device with a non-linear power amplifier and in a plurality of push-pull successive phase modifiers, and the outputs of the phase modifier are connected by a passive component.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: January 22, 2008
    Assignee: Siemens AG
    Inventor: Jörg Walbracht
  • Patent number: 7145392
    Abstract: Methods and apparatus for producing first and second drive signals from an input signal such that each drive signal is about 180 degrees out of phase with respect to the other; variably altering at least one of the first and second drive signals such that their respective magnitudes may be unbalanced to a varying degree; and producing an output signal from the first and second drive signals such that it includes harmonic distortion when the first and second drive signals are unbalanced.
    Type: Grant
    Filed: July 19, 2004
    Date of Patent: December 5, 2006
    Assignee: Peavey Electronics Corporation
    Inventors: Hartley D. Peavey, John Calvin Fields
  • Patent number: 7142017
    Abstract: An input/output buffer comprises an input/output pad operable to receive an input signal and transmit an output signal, an output driver coupled to the input/output pad, an input path comprising an input transistor coupled to the input/output pad operable to pass an input signal received at the input/output pad to a core circuit coupled to the input/output buffer. The input/output buffer further comprises an output path coupled to the output driver operable to pass an output signal received from the core circuit to the input/output pad, a feedback path coupled to the input transistor in the input path and operable to cut off the output path during input mode, and a biasing circuit coupled to selected transistors in the output path, feedback path and output driver.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: November 28, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Ker Min Chen
  • Patent number: 7075371
    Abstract: The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: July 11, 2006
    Assignee: California Institute of Technology
    Inventors: Ichiro Aoki, Seyed-Ali Hajimiri, David B. Rutledge, Scott David Kee
  • Patent number: 7034616
    Abstract: In a circuit according to the present invention, a multi-collector transistor is provided which includes first to third collectors so that, when a current does not flow from the second collector, a current from the first collector increases but a current from the third collector does not vary. When transistors of the circuit turn off because the voltage of an input signal gets out of an in-phase input voltage range, the supply of the current from the second collector comes to a stop and, hence, the current from the first collector increases. In this situation, further transistors carry out their on/off operations, thereby fixing the output of the circuit to a low level. That is, this circuit can, irrespective of poor pair compatibility between the transistors, fix the output logical level to a desired level when the voltage of an input signal gets out of an in-phase input voltage range.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: April 25, 2006
    Assignee: Denso Corporation
    Inventors: Naoya Tsuchiya, Hirofumi Abe, Shoichi Okuda
  • Patent number: 7015756
    Abstract: A differential circuit comprises first, second, third and fourth devices that have first, second, third and fourth control terminals, respectively. The second and fourth devices are arranged in series with the first and third devices, respectively. A first output communicates with the first device and the second device. A second output communicates with the third device and the fourth device. First and second inputs communicate with the first and fourth control terminals, respectively. The first, second, third and fourth devices are the same type of devices. The third and second control terminals follow the first and fourth control terminals. When the first device pushes, the third device pulls. When the first device pulls, the third device pushes. When the fourth device pushes, the second device pulls. When the fourth device pulls, the second device pushes. The second and third devices and the first and fourth devices are matched.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: March 21, 2006
    Assignee: Marvell International Ltd.
    Inventor: Swee-Ann Teo
  • Patent number: 6838940
    Abstract: A high frequency power amplifier circuit comprises an input circuit receiving an input signal; a first cascode stage connected to the input circuit and a DC voltage source and comprising at least one FET having a source, a drain, and a gate; an second cascode stage comprising: at least one bipolar transistor having an emitter, a collector and a base and being supplied by the first cascode stage and receiving the input signal from the first cascode stage, and a delimiting means, preferably a diode, connected to the bipolar transistor and adapted to reduce the voltage level at the drain of the FET or the emitter of the bipolar transistor respectively; and an output circuit connected to the second cascode stage and outputting an output signal.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: January 4, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Marcel Henricus Wilhelmus Van De Westerlo, Shikhar Sinha
  • Patent number: 6816012
    Abstract: The present invention discloses a distributed power amplifier topology and device that efficiently and economically enhances the power output of an RF signal to be amplified. The power amplifier comprises a plurality of push-pull amplifiers interconnected in a novel circular geometry that preferably function as a first winding of an active transformer having signal inputs of adjacent amplification devices driven with an input signal of equal magnitude and opposite phase. The topology also discloses the use of a secondary winding that matches the geometry of primary winding and variations thereof that serve to efficiently combine the power of the individual power amplifiers. The novel architecture enables the design of low-cost, fully-integrated, high-power amplifiers in the RF, microwave, and millimeter-wave frequencies.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: November 9, 2004
    Assignee: California Institute of Technology
    Inventors: Ichiro Aoki, Seyed-Ali Hajimiri, David B. Rutledge, Scott David Kee
  • Patent number: 6792121
    Abstract: An audio signal amplifier circuit includes an external output terminal of an IC to which an output line of a power amplifier circuit is connected, a first resistor connected between a certain terminal of the IC other than the external output terminal and a feedback input of a differential amplifier circuit, a first capacitor connected between the external output terminal and a loud speaker, a second capacitor between the certain terminal of the IC and a wiring line between the external output terminal and the loud speaker, a filter circuit provided on a signal input side of the differential amplifier circuit and including a second resistor and a third capacitor for attenuating signal components having frequencies in a middle and high frequency ranges and voltage follower means provided between an input stage and an output stage of the audio signal amplifier circuit, wherein the first capacitor is a small capacitor having a capacitance value in the order of 30 &mgr;F or smaller and an attenuation characteristi
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: September 14, 2004
    Assignee: Rohm Co., Ltd.
    Inventors: Yasuyuki Koyama, Masanori Fujisawa
  • Patent number: 6765438
    Abstract: A transconductance power amplifier for amplifying a signal to a capacitive load, including a first N-channel enhancement MOSFET transistor operatively arranged to source current to the capacitive load, wherein the first N-channel MOSFET transistor has a threshold gate to source voltage, a second N-channel enhancement MOSFET transistor operatively arranged to sink current to the capacitive load, an operational amplifier operatively arranged to transmit and amplify an input signal to both of the first and second MOSFET transistors, and, means for biasing the first N-channel enhancement MOSFET transistor such that its gate to source voltage is always at or above its threshold when the load draws near zero current so that very little additional gate charge is required to turn it on more fully.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: July 20, 2004
    Assignee: Bae Systems Information and Electronic Systems Integration, Inc.
    Inventors: Richard Brosh, Scott C. Willis
  • Patent number: 6731170
    Abstract: A source drive amplifier has a first input circuit controlled by a polarity switching signal for being switched into an NMOS differential amplifying circuit or a bias circuit, and a second input circuit controlled by a polarity switching signal for being switched into a bias circuit or a PMOS differential amplifying circuit. The output of the first input circuit switched into an NMOS differential amplifying circuit drives the PMOS transistor of an output transistor pair for being used as a source out amplifying output stage, and a current provided by the NMOS transistor is used as a bias. The output of the second output circuit switched into a PMOS differential amplifying circuit drives the NMOS transistor of the output transistor pair for being used as a sink in amplifying output stage, and a current provided by the PMOS transistor is used as a bias.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: May 4, 2004
    Assignee: Sunplus Technology Co., Ltd.
    Inventor: Dar-Chang Juang