Abstract: A zero-crossing detection circuit includes a comparator and circuitry. The comparator produces an output signal that is indicative of zero-crossing events in an input Alternating Current (AC) waveform. The circuitry may be configured to feed the comparator with first and second rails voltages, and to progressively increase the rails voltages during time intervals derived from the input AC waveform, so as to feed the comparator with target values of the rails voltages in time-proximity to the zero-crossing events. The circuitry may be configured to compensate for an error in detecting the zero crossing events caused by differences in amplitude of the input AC waveform, by correcting the input AC waveform provided to the comparator. The circuitry may be configured to activate the comparator during time intervals preceding respective anticipated times of the zero-crossing events, and to deactivate the comparator at least once during time periods other than the time intervals.

Abstract: An amplification stage comprising: a combiner to generate a sum input signal by combining a voltage signal with a DC bias voltage; a subtractor to generate a difference input signal by subtracting the voltage signal from the DC bias voltage; a first transistor for generating a first part of an amplifier output signal from the sum input signal; a second transistor for generating a second part of an amplifier output signal from the difference input signal; a combiner for combining the first and second parts of the amplifier output signal; a sensing circuit arranged to sense a current flowing in each of the first and second transistors; a control circuit arranged to determine the quiescent current of the first and second transistors in dependence on the sensed currents; and an adjustment circuit arranged to adjust the DC bias voltage in order to minimize variation in the quiescent current.

Abstract: There is provided an amplifier arrangement comprising a main push pull amplifier (100) connected to receive an input signal and generate an amplified version of the input signal and an additional amplifier (624) that is a scaled down version of the main push pull amplifier. The main push pull amplifier (100) and the additional amplifier (624) are coupled in parallel to receive an input signal (122) and generate an amplified output signal (114), wherein the amplifier arrangement comprises optionally a high-pass filter (622) between the overall amplifier input (122) and the input of the additional amplifier (624). In order to reduce crossover distortions generated by the main push pull amplifier, the additional amplifier is designed to amplify the input signal during crossover, thus the output signal always follows the input signal.

Abstract: Power amplifiers (PAs) using a Doherty or other power output level sensitive configuration have been employed for several years in telecommunications (as well as other applications) to take advantage of efficiency gains. For many of these applications, baseband signals are predistorted to compensate for nonlinearities in the PAs, but because there is a “switching event” in a Doherty-type amplifier (for example), the nonlinearities become dynamically varying. As a result, digital predistortion (DPD) becomes increasingly difficult to perform. Here, DPD modules are provided that adapt to changes in dynamically varying PAs based on a determination of the average power or other relevant metric prior to transmission.

Abstract: Power amplifiers with reduced idle currents are described. In some examples, a power amplifier includes a driver configured to generate a control signal based on an input signal. The power amplifier also includes a first output transistor configured to selectively provide an output signal via an output channel that has a resistance based on the control signal, and a channel adjuster configured to generate several digital signals based on the control signal. A composite switch, which includes several segment transistors, is included to selectively increase or decrease the output channel resistance based on the digital signals.

Abstract: A method and apparatus for correcting the delay between the phase and the envelope of a digital signal are described. In particular, the application of this correction in digital broadcasting transmitters is described. The present invention makes it possible to offer an alternative solution in which the use of the initial signal is not necessary. No temporal comparison with the initial signal is necessary. A subject of the invention is a method of correcting at least one parameter to be corrected pc of the envelope of a digital signal including the decomposition of the digital signal into an envelope signal and a phase signal and the determination of the corrector to be applied to the parameter of the envelope by searching for the minimum out-of-band noise powers of the signal.

Abstract: Amplifier circuit for amplifying an input signal, having a vertically integrated cascode that has a collector semiconductor region of a collector, adjacent to the collector semiconductor region, a first base semiconductor region of a first base, a second base semiconductor region of a second base, an intermediate base semiconductor region adjoining both the first base semiconductor region and the second base semiconductor region, and an emitter semiconductor region of an emitter adjacent to the second base semiconductor region, wherein a signal input is connected to the second base, and the first base is electrically coupled both to a voltage source that is independent of the input signal and to the collector.

Abstract: A push-pull amplifier having low output impedance and low crossover distortion is provided. A least one of a current through a sourcing current path of an output stage and a current through a sinking current path of the output stage is determinative of a quiescent current control signal produced for controlling a quiescent current of the amplifier. The quiescent current is controlled by symmetrically controlling a bias voltage applied to a sourcing active output device and a bias voltage applied to a sinking active output device in response to the quiescent current control signal. An output stage sourcing control signal for controlling the sourcing active output device is referenced directly to a shared terminal of the sourcing active output device, and an output stage sinking control signal for controlling the sinking active output device is referenced directly to a shared terminal of the sinking active output device.

Abstract: In a push-pull power amplifier having an end stage (10) in which two power transistors (ML, MH) are connected in series, a dead time is normally used to ensure that the power transistors do not conduct simultaneously. The invention provides an end stage in which the dead time can be omitted. This is achieved by dimensioning the driver circuits (11, 12) in such a way that during switching the control voltages (Vgh, Vgl) of the power transistors cross their threshold level (VT) substantially simultaneously.

Abstract: An adjustable gain control (AGC) system with improved gain control accuracy and method thereof is disclosed. The system includes an offset circuit for providing an offset signal that is selectable; a gain setting source for providing a gain set signal that is dependent on a desired gain and the offset signal; and an AGC circuit, coupled to the offset signal and gain set signal, for providing a gain control signal, the AGC circuit compensating, according to the offset signal, the gain control signal for process variables corresponding to the AGC circuit to provide a plurality of predetermined gains for the amplifier that correspond, respectively, to a plurality of desired gains indicated by respective gain select signals.

Abstract: A push pull amplifier is disclosed having upper and lower output devices operating in a mode in which the devices drive a load alternately. The amplifier includes bias means for providing a bias current to the output devices at all times. The bias means is incorporated in a feedback loop and is arranged such that transitions from load current to minimum bias current in the upper and lower output devices are sufficiently gradual so that harmonic frequencies generated by the transitions are within the capability of the amplifier under all signal conditions. The feedback loop includes a non-linear transform circuit for each upper and lower output device to prevent the bias current reducing to zero. The feedback loop also includes a linearity control circuit for controlling the harmonic frequencies in the upper and lower output devices.

Abstract: An output stage (10) is provided having transistors of the same polarity type, which function to amplify the input signal at a wide range of frequencies, with low power consumption and low crossover distortion. By biasing the output transistors to remain on during both the positive and negative voltage swing of the input signal, low power consumption as well as low output crossover distortion is achieved. A high efficiency, low crossover distortion, current amplifier circuit for amplifying an input signal (VIN) in accordance with this present invention includes an output driver (12), a current source (IS1) and a translinear loop circuit (14). The output driver (12) includes a sourcing circuit (Q6). The current source (IS1), connected to the output driver (12), provides bias current to the sourcing circuit. The translinear loop circuit (14), connected to the output driver (12), receives the input signal (VIN).

Abstract: A Class AB amplifier (10) having a top booster section (14) and a bottom booster section (12) adapted to prevent crossover distortion, latchup, and provides high output voltage swing output. The amplifier 10 has a positive feedback loop including a current mirror comprising transistors (M1, M2) that get activated during extreme sourcing conditions. The feedback loop provides the necessary biasing current to a biasing transistor (Q9) of an output sinking transistor (Q11) to allow high output sourcing current and high sinking current to prevent crossover distortion and latching. The output transistors (Q8, Q9, Q10 and Q11) of the amplifier (10) are all NPN-type transistors.

Abstract: A class AB amplifier biasing circuit is provided for controlling the quiescent state of a pull-up output device and a complimentary pull-down output device. The biasing circuit includes first and second current sources, each having a floating resistor configured to supply current to the pull-up and pull-down devices, respectively. The biasing circuit also includes gate control circuits for controlling the gate voltages of the first and second floating resistors. A device replica transistor is connected to a voltage node associated with the gate of the either the pull-up device or the pull-down device.

Abstract: A circuit (40) and method for applying drive voltages to a voice coil motor (VCM) (22) of a mass data storage device (10) has two driver sets, each having a high side driver (HSD) (42,46) and a low side driver (LSD) (44,48) connected to the VCM (22). Each driver set has two SENSEFETs (50,52), each having a power FET and a sense FET. A circuit (106,104) is provided for sensing a sense current in the sense FET of the LSD, and a circuit (60,76,74) is provided for increasing the bias on the gates of the SENSEFET (52) in the LSD when the sense current falls below a predetermined level (VREF). Also, a circuit (113,114,110) is provided for driving a predetermined current in the SENSEFET of the HSD when the sense current falls below the predetermined level. Thus, a current at the predetermined level always flows in the SENSEFETs (50,52).

Abstract: Responsive to an external load, an output stage (201) of an amplifier (200) in accordance with the present invention provides a current boosting scheme capable of generating a large output current while maintaining a low quiescent current. The output stage (201) includes a sink control circuit (204) coupled to the input terminal (202) for receiving the output of the input amplifier stage. A translinear loop circuit (210) is coupled to the sink control circuit (204), for receiving the sink pass-through current and for producing a source pass-through current. A current mirror circuit (222) is coupled to the translinear loop circuit (210) for receiving the source pass-through and for producing a bias current output therefrom. An output driver (230) is coupled to the current mirror circuit (222) and the sink control circuit (204), wherein the output driver (230) receives the bias output current and the sink pass-though current to provide an output current.

Abstract: A power stage for an operational amplifier includes an output stage, a current source stage, and a gain stage. The output stage is formed by first and second NPN output transistors arranged in a Totem-Pole configuration, each having respective resistors connected between their respective base and emitter terminals. The output transistors are biased in class AB by a quiescent current supplied by the current source stage and are controlled dynamically by the gain stage. The gain stage includes an NPN gain transistor having a collector terminal connected to the base terminal of the first output transistor and an emitter terminal connected to the base terminal of the second output transistor.

Abstract: While no signals are being supplied to first and second drive circuits, the drive circuits keep supplying idling currents to the bases of first and second transistors which constitute a push-pull amplifier. A first control circuit is provided in the base-emitter path of the first transistor, to control the first transistor in accordance with an input signal. A second control circuit is provided in the base-emitter path of the second transistor, to control the second transistor in accordance with an input signal. The first control circuit comprises a third transistor, a first resistor connected between the collector and base of the third transistor, a third resistor connected between the collector of the third transistor and the base of the first transistor, a constant current source connected to the base of the third transistor.

Abstract: An electronic component with reduced capacitance includes a substrate (12) with an interconnect line (14), an additional substrate (11) with an interconnect line (13) wherein the substrate (12) overlies the additional substrate (11), an electronic device (15) overlying the substrate (12) and electrically coupled to the interconnect line (14) of the substrate (12), and an additional electronic device (17) having a lead (23) and an additional lead (26) wherein the lead (23) overlies the substrate (12) and is electrically coupled to the interconnect line (14) of the substrate (12) and wherein the additional lead (26) overlies the additional substrate (11) and is electrically coupled to the interconnect line (13) of the additional substrate (11).

Abstract: An amplifier circuit (10) is provided. The amplifier (10) includes an amplifier stage (14) coupled to an output stage (18). Output stage (18) comprises a sourcing circuit (20) and a sinking circuit (22). The current in sinking circuit (22) is approximately mirrored at low current in mirror circuit (34). At higher currents, resistor (36) maintains the current in mirror circuit (34) below the current in sinking circuit (22). A diode (38) diverts current to mirror circuit (34) to aid sinking circuit (22) in sinking current from a load (12). A current source (29) supplies current to sourcing circuit (20) and mirror circuit (34). A control signal output by amplifier stage (14) causes mirror circuit (34) to draw or not draw current from current source (29). If mirror circuit (34) draws current from current source (29), output stage (18) sinks current in sinking circuit (22). If mirror circuit (34) does not draw current from current source (29), output stage (18) sources current through sourcing circuit (20).

Abstract: An improved push-pull amplifier having a driver circuit for driving a source follower output transistor. The driver circuit includes a replicating transistor having electrical characteristics substantially similar to those of the source follower transistor, a buffer amplifier, and a circuit, coupled to the replicating transistor and the buffer amplifier, for summing the voltage across the replicating transistor and the buffer output signal to provide a gate signal to the source follower output transistor. A cross current feedback circuit regulates the quiescent current flow through the output transistors by adjusting the gate signal provided to the upper, source follower output transistor in response to a sensed current flow through the lower output transistor.

Abstract: The present invention provides a B class push-pull amplifying circuit suitable for use in a headphone type tape recorder and the like. The amplifying circuit utilizes a current mirror circuit system in its output transistors to provide an idling current for compensating for crossover distortion by using the mirror ratio. The current mirror circuit system includes a pair of output current mirror circuits complimentarily coupled with each other. One branch of these output current mirror circuits includes a diode-connected transistor, the emitter current path of which is ON-OFF controlled by a drive transistor in the other branch. Thus, when no signal is input, the respective one of the current mirror output circuits complimentarily coupled with each other functions as a current mirror circuit such that the small idling current determined by the mirror ratio will pass therethrough.

Abstract: A push-pull amplifier circuit includes an NPN pullup transistor and an pulldown transistor, an emitter of the pullup transistor being coupled to a collector of the pulldown transistor. A first resistor is coupled between an output conductor and the emitter of the pullup transistor, and a second resistor is coupled between an emitter of the pulldown transistor and a supply voltage. A bias circuit includes a phase splitting transistor having an emitter coupled to a constant bias current source and a base of the pullup transistor, a collector coupled to a base of the pulldown transistor, and a control electrode coupled to an input signal. The phase splitting transistor steers a portion of the bias current into a first conductor connected to the base of the pullup transistor and a portion of the bias current into a second conductor connected to the base of the pulldown transistor in response to an input signal applied to the control electrode of the phase splitting transistor.

Abstract: A current amplifier is provided with three active transistors of the same polarity type, which function to amplify the input signal at a wide range of frequencies, with low power consumption and low or no output crossover distortion. One transistor, in cooperation with the second transistor, significantly amplifies the current during one swing of the input singal while the third transistor is switched off, and switches on the third transistor just prior to a reversal of the input signal swing. By the proper and immediate biasing of the third transistor according to the circuit needs, low power consumption as well as low or zero output crossover distortion is achieved.

Abstract: Apparatus and method for driving a non-centertapped load such as a loudspeaker from a low voltage supply such as a single dry cell, with increased efficiency. A push-pull signal having similar polarity voltage excursions is applied to opposite terminals of the load. Alternate individual terminals of the load which are opposite to the terminals to which the non-idle phases of the push-pull signal are alternately applied are connected to a common terminal via a pair of transistors. The pair of transistors are driven by an amplified representation of the push-pull input signal. Since pulse signals are not used to drive the pair of transistors, capacitors need not be used to eliminate switching transients which would otherwise appear, and increased efficiency results.

Abstract: A class AB monolithic silicon IC output stage is shown wherein the main output transistors are NPN structures. The current sourcing transistor is provided with an additional scaled down reference emitter and the two emitters connected to the inputs of an op amp which has its output coupled to drive the current sink transistor. The base of the current source transistor is driven from a high gain driver transistor stage which may also contain a d-c level shifter that permits the inclusion of a complementary current sink transistor that can greatly reduce cross-over distortion while conducting only quiescent current.

Abstract: An emitter-follower type SEPP circuit in which, by detecting idle currents and distortion components and feeding such signals back to an error amplifier in a real time mode, a very stable circuit with little crossover distortion is provided. The input signal is applied through opposite-polarity bias potential sources to noninverting first terminals of first and second error amplifiers, one for the positive half cycle and the other for the negative half cycle. The outputs of the two error amplifiers are applied through constant current sources to bases of respective bipolar transistors, the emitters of which are connected in a feedback arrangement to noninverting input terminals of the two amplifiers. The emitters of the two bipolar transistors are further connected through a resistance network to an output terminal. The resistance network also has a feedback terminal, which is connected through third and fourth bias potential sources to respective noninverting input terminals of the two amplifiers.

Abstract: For a satisfactory cross-over behavior of the transistors T.sub.1 and T.sub.2 of push-pull amplifier comprising an input 2 and an output 3, it is necessary that the sum of the base-emitter voltages of the transistors T.sub.1 and T.sub.2 remains substantially constant. For this purpose a first voltage-current converter 5 is coupled between the base and the emitter of transistor T.sub.1, the inverting input of this converter being coupled to the base of transistor T.sub.1 via a first reference-voltage source 8 and the non-inverting input to the emitter of transistor T.sub.1. Similarly, a second voltage-current converter 9 and a second reference-voltage source 12 are arranged between the base and the emitter of transistor T.sub.2. The output currents of the first and the second voltage-current converters 5 and 9 are compared with each other in the combining circuit 14 which drives the control amplifier 15, which in its turn controls the base-emitter voltage of transistor T.sub.

Abstract: An output stage having a small quiescent current is provided. A current source portion provides an output current via an output terminal in proportion to a drive current. A current sink portion sinks output current in proportion to an input control voltage. A cross-over distortion portion and a shunt portion are coupled to the current source portion to minimize output quiescent current in proportion to the input control voltage.

Abstract: A push-pull amplifier having like conductivity output transistors is driven by a phase-splitter transistor amplifier. The collector load of the phase-splitter includes a diode bridge for establishing the amplifier idling current. One arm of the bridge incorporates the pull-up output transistor base-emitter junction-the current conducted therein being accurately determined by bridge parameters.

Abstract: The invention provides an improved class-B push-pull output stage comprising a first and a second output transistor of a first conductivity type, which stage is provided with a control loop for driving the second transistor in phase opposition as a function of the drive of the first transistor. Said control loop is adapted so that a stable quiescent-current setting is obtained and that the effect of poor high-frequency properties of a third transistor of a conductivity type opposite to the first conductivity type, which transistor is necessarily included in the control loop, is eliminated, so that a wide frequency range is obtained.

Abstract: A power-amplifying circuit embodying this invention includes a pre-amplifier stage which comprises two emitter-connected transitors, one of whose bases is supplied with an input signal and an output stage comprising complementary pair of a first transistor of a PNP type and an emitter-grounded second transistor of an NPN type which carry out a class-AB push-pull operation in accordance with the amplitude of a current from the pre-amplifier stage.

Abstract: In a single-ended push-pull power amplifier circuit having a first transistor of a first driver stage, a second transistor of a first output stage where the first and second transistors are Darlington connected, a third transistor of a second driver stage and a fourth transistor of a second output stage, where the third and fourth transistors are also Darlington connected, first and second resistors are connected between the respective emitters of the first and second transistors and a common output terminal, third and fourth resistors are connected between the respective emitters of the third and fourth transistors and the common output terminal, and a bias circuit for providing a bias voltage of a fixed value between the bases of the first and third transistors, the improvement comprising at least two series circuits of resistors and constant voltage sources for passing the base currents of the second and fourth transistors between (a) the emitter of the first transistor and the emitter of the fourth transi

Abstract: A push-pull output circuit which is capable of producing a relatively-high maximum output voltage without the use of a bootstrap capacitor provides positive and negative half cycle output circuits which are constructed as inverted Darlington output circuits to which current mirror circuits and level shifting elements are coupled. As a result, the distortion factor of an open loop characteristic in the push-pull output circuit is improved.

Abstract: A power amplifier being controlled by a feedback signal which is related to a product of currents each flowing through power transistors in an SEPP configuration. Current detecting transistors are connected in parallel at their base-emitter paths to the base-emitter paths of the power transistors, respectively, and detect respective currents flowing through the power transistors. An operating circuit is coupled to the current detecting transistors, and generates a current related to the product of the detected currents.

Abstract: A push-pull amplifier comprises first and second output circuits each comprising at least one transistor which circuits are mutually connected in push-pull configuration, first and second detection circuits for respectively detecting the differences between the input and output voltages of the first and second output circuits, and first and second variable bias circuits operating in response to the detection outputs of the first and second detection circuits, respectively, to apply constant bias voltages to the transistors of the first and second output circuits in the case where the absolute values of the output currents of the first and second output circuits are below a specific level and to apply, as bias voltages, voltages equal to the sums of the constant bias voltages and voltages corresponding to the detection outputs of the first and second detection circuits to the first and second output circuits in the case where the absolute values of the output currents are above a specific level.

Abstract: A push-pull amplifier, having a first and a second transistor of the same conductivity type, whose collector-emitter paths are included in series between two power-supply terminals, the emitter electrode of the first transistor being connected to the collector electrode of the second transistor and to an output terminal, and the base electrode of the first transistor being connected to an input terminal, is improved in respect of its linearity, temperature dependence and bandwidth by measuring the base-emitter voltage of the first transistor with the aid of a series connection of a semiconductor junction and a resistor and by applying said voltage with opposite a.c. component to the base-emitter junction of the second transistor via a coupling circuit.

Abstract: A linear alternating-current amplifier with push-pull-connected first and second output transistors Q.sub.1, Q.sub.2 includes a pilot transistor Q.sub.4 and a control transistor Q.sub.3 which drives the first output transistor Q.sub.1 into saturation when the resistance of the pilot transistor Q.sub.4 is high. The control transistor Q.sub.3 has its base connected to the collector of the pilot transistor Q.sub.4 and its emitter connected to the junction of the emitter of the first output transistor Q.sub.1 with the collector of the second output transistor Q.sub.2, the latter connection including a biasing resistor R in series with a constant-current generator G (or an equivalent resistor R.sub.G or fixedly biased transistor Q.sub.G) which maintains the potential difference between the base and the emitter of the control transistor Q.sub.3 at its conduction threshold during saturation of the pilot transistor Q.sub.4 and the second output transistor Q.sub.2.

Abstract: An output amplifying circuit which comprises a Push Pull amplifier section, a power supply circuit section and an amplifier section for amplifying a power source. The circuit eliminates an occurrence of switching distortion and minimizes heat loss therein. The input terminals of the Push Pull amplifier section and the power source amplifier section are connected in common, while the positive and the negative terminals of the power source amplifier section are connected to those of the power supply circuit section, respectively.

Abstract: A push-pull amplifier having a pair of output transistors and a pair of emitter coupled resistors, one terminal of each resistor coupled to an emitter of a respective transistor and the other terminals being commonly connected to an output point. A comparison circuit is employed for comparing the voltages across each of the emitter resistors with a predetermined voltage. A bias circuit is connected in series between the bases of the output transistors and a short circuit controlled by the output of the comparison circuit selectively shorts a resistor element in the bias circuit.