Abstract: A power amplifier circuit includes a first transistor configured to receive a first signal at a base, amplify the first signal, and output a second signal from a collector; and a bias circuit configured to supply a bias current to the base of the first transistor. The bias circuit includes a second transistor configured to supply a bias current to the base of the first transistor, a third transistor including a base connected to a base of the second transistor and a collector connected to a collector of the second transistor, and a fourth transistor including a base connected to an emitter of the third transistor and a collector connected to an emitter of the second transistor and configured to draw at least part of the bias current.

Abstract: A method performed by at least one processor of a wireless communication apparatus including a plurality of internal components, the method includes generating a plurality of sets of noise information corresponding to a plurality of test noise signals generated by the plurality of internal components under a plurality of state conditions, receiving a radio frequency (RF) signal, determining a magnitude of a noise signal that interferes with the RF signal by using a set of noise information corresponding to a current state condition from among the plurality of sets of noise information, and performing noise filtering on the RF signal based on a magnitude of the RF signal and the magnitude of the noise signal.

Abstract: An RF power amplifier biasing circuit has a start ramp signal input, a main current source input, an auxiliary current source input, and a circuit output. A ramp-up capacitor is connected to the auxiliary current source input. A ramp-up switch transistor is connected to the start ramp signal input and is selectively thereby to connect the auxiliary current source input to the ramp-up capacitor. A buffer stage has an input connected to the ramp-up capacitor and an output connected to the main current source input at a sum node. A mirror transistor has a gate terminal corresponding to the circuit output and a source terminal connected to the sum node and to the gate terminal.

Abstract: A reception device includes a low noise amplifier that amplifies a radio signal by a first gain, a variable gain amplifier that amplifies an output of the low noise amplifier by a second gain, an analog-to-digital converter that converts an output of the variable gain amplifier into a digital signal, a gain controller, and a saturation detection unit. The gain controller, when an amplitude of the radio signal exceeds a predetermined value, controls the first and second gains according to the amplitude of the radio signal, and completes the control within a predetermined period. The saturation detection unit detects saturation of the analog-to-digital converter based on the output of the low noise amplifier or the digital signal. The gain controller, after controlling the first and second gains a first time and the saturation is detected by the saturation detection unit, controls the first and second gains a second time.

Abstract: Disclosed is a communication apparatus including an amplification part and a transient characteristics control part. The amplification part is configured to amplify a signal level of a received signal. The transient characteristics control part is configured to control transient characteristics of the amplification part.

Abstract: An ultrasound diagnostic apparatus to improve picture quality of images by automatically adjusting image parameters, and a control method thereof are provided. The ultrasound diagnostic apparatus includes an image signal processor to perform envelope detection processing on ultrasound image data, and an image parameter processor to calculate a Time Gain Compensation (TGC) parameter from the envelope detection processed ultrasound image data, adjust the envelope detection processed ultrasound image data based on the TGC parameter, and calculate a Dynamic Range (DR) parameter from the envelope detection processed ultrasound image data adjusted based on the TGC parameter to apply the DR parameter to the envelope detection processed ultrasound image data.

Abstract: A radio frequency signal amplifying system includes an amplifier having an input terminal and an output terminal, an attenuator electrically connected to the input terminal of the amplifier, a peak power detecting module configured to apply a peak power attenuation signal to the attenuator by taking a peak power level of an input signal into consideration, and an average power detecting module configured to apply an average power attenuation signal to the attenuator by taking an average power level of an output signal from the output terminal into consideration. The attenuator is configured to generate the attenuated signal to the input terminal of the amplifier by taking the peak power attenuation signal, the average power attenuation signal, or the combination thereof into consideration.

Abstract: A circuit and method for a saturation correction of a power amplifier (PA) is provided in order to maintain a desirable switching spectrum. The circuit includes a closed loop system that is responsive to a dynamic PA control signal known as VRAMP. The method samples a detector voltage that represents the output of the PA at the maximum voltage level of VRAMP. The sampled detector voltage is then reduced by a predetermined amount and applied as a fixed voltage PA control signal in the place of VRAMP. As a result, the closed loop system responds to the fixed voltage PA control signal to bring the PA out of saturation before VRAMP can begin a voltage decrease. Once the VRAMP voltage decreases, VRAMP is reapplied as a dynamic PA control signal in place of the fixed voltage control signal.

Abstract: A gain control circuit includes: a voltage generation circuit that generates first voltage that is linearly changed over time; a voltage square circuit that outputs second voltage that is obtained by squaring the first voltage generated by the voltage generation circuit; a resistance circuit that has a resistance characteristic by which a resistance value is squared-changed over time depending on the second voltage output from the voltage square circuit; and a gain adjustment circuit in which gain is squared-changed over time depending on the resistance value of the resistance circuit.

Abstract: Disclosed is a linear amplifier which includes: a common source transistor with the gate connected with an input node; a first common gate transistor connected with the common source transistor in a cascode type, with the drain connected with an output node; and a second common gate transistor connected in parallel with the first common gate transistor, with the gate connected with the input node and the drain connected with the output node.

Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.

Abstract: A circuit for providing audio signals to a load such as a speaker is provided that uses the speaker or headphone amplifier structure as a current to voltage converter, thereby eliminating a separate current to voltage converter from the circuit. Such a design removes one of the elements that creates noise in the circuit architecture and improves the dynamic range for the audio signal. For example, the output of a digital to analog converter is a single ended output provided to the speaker or headphone amplifier. The digital to analog converter can include a series of current sources that are summed up to provide the single ended output. Where the current sources have positive and negative current source mismatch, a feedback mechanism is employed to correct for the mismatch and reduce introduction of harmonic noise into the signal through the digital to analog converter.

Abstract: A dynamic voltage scaling system for a packet-based data communication transceiver includes a constant voltage supply, a variable voltage supply, and a voltage control unit. The constant voltage supply is configured to supply a constant voltage to at least one parameter-independent function of the transceiver, and the variable voltage supply is configured to supply a variable voltage in accordance with a control signal to at least one parameter-dependent function of the transceiver. Parameter-independent transceiver functions perform operations independent of a predetermined parameter and parameter-dependent transceiver functions perform operations dependent on the predetermined parameter The voltage control unit is configured to generate the control signal based on information provided by at least one parameter-independent transceiver function about the predetermined parameter.

Abstract: Systems, devices and techniques relating to power amplifier protection include, in some implementations, a circuit including: attenuation circuitry to couple with an output of detection circuitry that provides a protection signal and to couple with an input of power amplifier circuitry; turn off circuitry to couple with the power amplifier circuitry, the turn off circuitry configured to turn off the power amplifier circuitry responsive to the protection signal; and the attenuation circuitry configured to reduce a gain of the power amplifier circuitry responsive to the protection signal, the attenuation circuitry comprising a delay stage configured to continue attenuating an RF input signal of the power amplifier circuitry until after the power amplifier circuitry turns on.

Abstract: A step gain amplifier has an amplifier with an input and an output, and a bias circuit connected to the input and to a bias node. A passive feedback circuit using only passive elements connects the output to the input. A control circuit is connected to the bias circuit at the bias node.

Abstract: Disclosed is an automatic audio distortion control method and apparatus, wherein the automatic audio distortion control apparatus comprises an amplifier (6) and a feedback loop which has its both ends coupled to an input and an output of the amplifier (6), wherein said feedback loop has clipping distortion of signals outputted from the amplifier (6) as a control parameter for automatic control on the distortion of the amplifier (6). Once the outputted level gets close to a limit-value of speakers, the method and the apparatus will regulate power amplifier gain automatically, in order to control distortion, prevent damage to the speakers, and provide compatibility with high or low levels inputted from various audio sources.

Abstract: An amplifier assembly and also a receiver including such an amplifier assembly is disclosed, wherein the amplifier includes a programming input for setting the gain thereof. The signal level at the output of the amplifier is compared with a reference level and a counter is incremented in a step-by-step fashion such that the gain in the amplifier is reduced for as long as the output level lies above the reference level. The amplifier assembly enables frequency-dependent received field strength fluctuations that occur in frequency hopping methods to be corrected in a manner dependent on the conditions in the current time slot. The assembly is also suitable for modulation methods that use a modulation with phase and amplitude variation.

Abstract: An electronic circuit includes an input terminal, a transimpedance amplifier connected to the input terminal and including an amplifier and a feedback resistor, a first time constant circuit smoothing an output from the transimpedance amplifier, a gain control circuit arranged between the input terminal and ground potential and controlling current flowing between the input terminal and the ground potential on the basis of the output from the first time constant circuit, and a safeguard circuit controlling the gain control circuit and blocking the current flowing between the input terminal and the ground potential, when a signal to be input into the input terminal is stopped.

Abstract: A low noise amplifier includes a main amplifier configured to amplify a first input signal to generate a first output signal and an auxiliary amplifier configured to amplify a second input signal to generate a second output signal. The auxiliary amplifier is coupled to the main amplifier for superposing the second output signal and the first output signal. The low noise amplifier also includes an adjusting unit configured to adjust a time constant for reducing a third order intermodulation distortion of the superposed signal in response to a control signal. The adjusting unit is configured to generate the second input signal based on the time constant and the first input signal.

Abstract: An automatic gain control circuit for controlling the gain of a variable gain amplifier block includes a count control signal generating block, an up-down counter, a gain control signal generating block, and a downcount clock signal generating block. The up-down counter upcounts an upcount clock signal or downcounts a downcount clock signal according to a count control signal generated by the count control signal generating block. The gain control signal generating block generates a gain control signal corresponding to a count value of the up-down counter. The downcount clock signal generating block generates a downcount clock signal whose frequency corresponds to the count value of the up-down counter.

Abstract: A low noise amplifier includes a main amplifier configured to amplify a first input signal to generate a first output signal and an auxiliary amplifier configured to amplify a second input signal to generate a second output signal. The auxiliary amplifier is coupled to the main amplifier for superposing the second output signal and the first output signal. The low noise amplifier also includes an adjusting unit configured to adjust a time constant for reducing a third order intermodulation distortion of the superposed signal in response to a control signal. The adjusting unit is configured to generate the second input signal based on the time constant and the first input signal.

Abstract: An attenuator attenuates input signals and outputs the signals to an amplifier arranged to amplify signals applied to two input terminals. The attenuator includes first and second output terminals to be respectively connected to the two input terminals of the amplifier, a comparison determination circuit arranged to compare a data variable corresponding to a current attenuation factor with target data corresponding to an attenuation factor as a target value, to output an up signal or a down signal, and an up-down counter arranged to increase or decrease the data variable based upon the up signal or the down signal which is outputted from the comparison determination circuit. The input signals respectively attenuated by different attenuation factors are outputted to the first and second output terminals based upon the data variable outputted from the up-down counter.

Abstract: In an electronic volume apparatus, a gain having an initial value g1 at time t=0 in an initial state is transited to a target value g2 at time t=Tp after a certain transition period Tp elapses. A gain control unit controls the gain of the amplifier depending on a control function g(t) which satisfies the following conditions (1) to (3): g(0)=g1, g(Tp)=g2; ??(1) g?(Tp/2)>g?(0); and ??(2) g?(Tp/2)>g?(Tp). ??(3) where g?(t) is time differentiation of g(t).

Abstract: An electronic circuit includes an input terminal, a transimpedance amplifier connected to the input terminal and including an amplifier and a feedback resistor, a first time constant circuit smoothing an output from the transimpedance amplifier, a gain control circuit arranged between the input terminal and ground potential and controlling current flowing between the input terminal and the ground potential on the basis of the output from the first time constant circuit, and a safeguard circuit controlling the gain control circuit and blocking the current flowing between the input terminal and the ground potential, when a signal to be input into the input terminal is stopped.

Abstract: The present invention relates to an AGC circuit, a AGC circuit gain control method, and a program for the AGC circuit gain control method, and may be applied to IC recorders, for example, as a portable recording/reproducing device, in order to ameliorate problems of listening to talk, music and the like during playback from IC recorders. In the invention, a signal level L1cyc is detected in units of the period of an input signal, and a recovery time constant r is switched on the basis of a decision as to the signal level L1cyc based on an average shift Lavg of the signal level L1cyc.

Abstract: A window comparator compares a level of an output signal with an attack reference level, and outputs an attack signal based upon an attack reference comparison result signal thus obtained, and compares the output signal level with a recovery reference level, and outputs a recovery signal based upon a recovery reference comparison result signal thus obtained. An attack timing signal generating unit outputs an attack timing signal at first predetermined time intervals. A recovery timing signal generating unit outputs a recovery timing signal at second time intervals which are longer than the first predetermined time interval. An action determining circuit generates a gain reduction signal and a gain increase signal. The amplification gain of the variable gain amplifier is reduced or increased based upon the gain reduction signal or the gain increase signal.

Abstract: An amplifier includes a plurality of power amplifier elements connected in cascaded multiple stages, a first bias power supply, a second bias power supply, a switching circuit configured to switch a first output supplied from the first bias power supply in response to a modulation pulse so as to transmit the first output to the plurality of power amplifier elements, a pulse differentiating circuit configured to differentiate the modulation pulse by a given time constant, and an adder circuit configured to add the differentiated modulation pulse and a second output of the second bias power supply so as to transmit the differentiated modulation pulse added to the second output as an input bias voltage to at least one of the plurality of power amplifier elements except for a final stage in the cascaded multiple stages.

Abstract: A feedback circuit for amplification of the output signal of an analog front end and suppression of its DC and low frequency components comprises a variable gain amplification unit (2) controlled by a gain control signal and a reverse path unit (6) comprising a filter unit (8) with variable time constant. A control unit (13) produces the gain control signal as well as a reverse path control signal (S) which causes adaptation of variable resistances (12) and capacitances (10) in such a way that the time constant of the filter unit (8) varies essentially proportionally with the gain of the variable amplifier unit (2). Thereby the gain of the feedback circuit as a function of the frequency retains its shape with varying gain.

Abstract: A low distortion compression amplifier comprising an amplifier circuit having an input and an output, wherein an input signal is received at the input and amplified in accordance with a gain to form an output signal at the output. The amplifier circuit further comprises a comparator circuit operable to receive the output signal and generate a first control signal in response thereto. A digital gain control circuit is coupled to the amplifier circuit, and is operable to generate a digital gain control signal based at least in part on the first control signal. The gain control signal is then employed to modulate the gain of the amplifier circuit in a digital fashion. The invention also comprises a method of digitally controlling a gain associated with an amplifier circuit. The method comprises comparing an output signal to a threshold and modulating the gain in a digital fashion, wherein the gain is modulated up in a plurality of rates or down in a plurality of rates in response to the comparison.

Abstract: An automatic gain control circuit integrally fabricated on a semiconductor substrate. An AGC circuit 17 controls the gain of an intermediate-frequency amplifier circuit 15 so that the average level of the output signal (sound signal) of an AM detector 16 may be substantially constant. The AGC circuit 17 includes a time-constant circuit 100, which comprises a charging circuit for intermittently charging the capacitor and a discharging circuit for intermittently discharging the same. By this intermittent charging and discharging of the capacitor having a small capacitance, a large time constant is set.

Abstract: Discrete data of a base-band signal obtained by a control unit is multiplied by data equivalent to a time constant of a wave detector unit, thus enabling the deterioration in a detection voltage generated during detection of a modulation wave having a marked variation in amplitudes such as CDMA. It is possible to obtain a stable power outputted by an RF unit. Accordingly, the stable automatic gain control can be performed in consideration of the variation in the detection voltages due to the type of signals inputted to the wave detector unit, irrespective of the type of inputted signals.

Abstract: A voltage amplifying circuit (100) that may have a selectable gain has been disclosed. Voltage amplifying circuit (100) may include a voltage amplifier (2) and a gain changing unit (7). A gain changing unit (2) may be capable of changing at least one of: a capacitance between a signal input terminal (6) and an input terminal of a voltage amplifier, the capacitance between an input terminal of a voltage amplifier and a ground (or reference potential), and a capacitance between an input and an output terminal (3) of a voltage amplifier. In this way, a gain from a signal input terminal (6) to an output terminal (3) of a voltage amplifier of a voltage amplifying circuit (100) may be changed.

Abstract: A bias circuit having a relatively long time constant improves the linearity of a radio frequency power amplifier of a spread spectrum mobile telephone by causing a power transistor of the amplifier to operate in class A or AB mode. The power amplifier thus derives an output signal that is a substantial replica of the spread spectrum input signal for all amplitudes of the input signal. The bias circuit has transistors connected in a feedback circuit which tends to oscillate to affect the amplifier operation. A low pass filter connected to the transistors suppresses the tendency. An interstage high pass matching circuit between a linear amplifier that drives the power amplifier includes a series capacitor and an inductor connected between an output terminal of the linear amplifier and a DC power supply terminal.

Abstract: In a gain control device for packet signal receiver, a variable gain amplifier amplifies an input signal with a gain corresponding to a control voltage applied thereto, and a power detector detects output power of the variable gain amplifier. A packet detection circuit detects a packet signal based on the detected output power. A control circuit outputs the control voltage variable with the detected output power, and the control voltage is provided for the amplifier. Thus high-speed gain control is performed immediately after the start of detection of the packet signal. When the elapsed time after the start of detection of the packet signal exceeds a predetermined time, a sample-hold circuit sample-and-holds the control voltage. This control voltage is provided for the amplifier up to the end of reception of the packet signal thereafter. Thus low-speed gain control is performed to provide stable power without distorting the signal wave.

Abstract: The invention relates to a variable gain and low noise amplifier for received signals in ultrasound or nuclear magnetic resonance imaging apparata. This variable gain and low noise amplifier comprises at least one amplifier unit having at least one input and at least one output and at least one feedback circuit which connects one of the output signals with a feedback input. The variable gain and low noise amplifier is characterized in that at least one feedback circuit comprises at least one capacitive divider.

Abstract: An electronic device comprises an audio amplifier, a main microprocessor and a user interface microprocessor. The UI microprocessor has a control pin for muting the audio amplifier. A muting circuit is provided for muting the audio amplifier when a signal representative of a switch to an OFF mode of the device is generated by a mode pin of the main microprocessor. A delay part is also provided in order to switch the audio amplifier to standby during a given period of time when a signal representative of a switch to an ON mode of the device is generated by the mode pin. Methods for controlling the electronic device are also proposed.

Abstract: A bias circuit having a relatively long time constant improves the linearity of a radio frequency power amplifier of a spread spectrum mobile telephone by causing a power transistor of the amplifier to operate in class A or AB mode. The power amplifier thus derives an output signal that is a substantial replica of the spread spectrum input signal for all amplitudes of the input signal. The bias circuit has transistors connected in a feedback circuit which tends to oscillate to affect the amplifier operation. A low pass filter connected to the transistors suppresses the tendency. An interstage high pass matching circuit between a linear amplifier that drives the power amplifier includes a series capacitor and an inductor connected between an output terminal of the linear amplifier and a DC power supply terminal.

Abstract: A system for detecting and compensating for a saturation condition of a power amplifier where an error signal is produced by differencing a signal representative of or derived from a control signal for controlling the shape of the output of the power amplifier and a signal representative of or derived from the output of the power amplifier. An integrator integrates the error signal to produce a cumulative error signal. A detection circuit detects a saturation condition when the value of the cumulative error equals or exceeds a predetermined value determined during device calibration. Upon the detection of a saturation condition, a compensation circuit derives a compensation value by multiplying the value of the error signal at the time saturation is detected by a predetermined constant, and subtracts this value from the control signal. The input to the power amplifier is derived from the adjusted control signal.

Abstract: In an automatic level controlling circuit, an output from a full-wave rectifying circuit 12 is supplied to a first and a second time constant circuit. The first time constant circuit includes a first amplifier 22 and a capacitor 15. The second time constant circuit includes a second amplifier 23 and the capacitor 15. The first amplifier 22 operates when the output V1 from the full-wave rectifying circuit 12 is larger than a DC level VDC. In this configuration, the attack times when an input signal is switched from no signal into a middle level signal and when the input signal is switched from the middle signal into a high level signal can be set at optimum values, respectively.

Abstract: A linearization bias circuit for an RF BJT amplifier including a reference circuit, a current device and a transconductance amplifier. The linearization bias circuit controls the operating point of the BJT amplifier based on signal level of an input RF signal. The current device provides a constant reference current to the reference circuit, where the constant reference current has a level that is based on a desired collector current of the BJT amplifier. The reference circuit applies a predetermined relationship between DC and AC scale factors of collector current of the BJT amplifier. The transconductance amplifier asserts its output to maintain the constant reference current into the reference terminal of the reference circuit, and in doing so controls the base terminal of the BJT amplifier to modify its operating point to substantially maintain constant transconductance in the presence of varying input voltage amplitudes of the input RF signal.

Abstract: An AC-coupled pre-amplifier is provided for amplifying a signal received in a packet transmitted in burst mode. The pre-amplifier provides a fast time constant for a driven edge of a received signal and a slower time constant for a undriven edge of the received signal. The decay of the undriven edge is faster than the inter-packet time between two received packets. The dual response times, allows for the inter-packet time to be less than the longest string of constant data received in a packet.

Abstract: Circuits for continuously varying the gain control for a low noise amplifier (LNA) of a wireless receiver are described. The gain, input third order intercept point (IIP3) and noise figure (NF) of an LNA are continuously varied according to the received power levels, causing the receiver to utilize less current at different power levels. At high gain levels the IIP3and NF are at a minimum, while at low gain levels the IIP3and the NF are at a maximum. By continuously varying the gain of an LNA throughout the operational range, the present invention achieves wider dynamic range and higher power efficiency. According to one aspect, the present invention includes a power coupler and a power detector which are utilized to produce a rectified voltage which is proportional to the input power or output power of an LNA. The rectified voltage is utilized by a control circuit which produces a signal which controls the gain, IIP3and NF of the LNA.

Abstract: To reduce power consumption by increasing amplifying efficiency in a low power mode, there is provided a radio communication apparatus in which each of field effect transistors of a radio frequency power module in a multi-stage configuration is controlled by an APC circuit based on a power level instruction signal, and in which a correction circuit is incorporated between the gate of a final stage transistor and the APC circuit to apply a linear gate voltage to the final stage transistor when a High level signal based on the power level instruction signal is applied and to provide a maximum gate voltage of the final stage transistor which is equal to or lower than the gate voltages of other transistors and whose rate of increase relative to the output voltage of the APC circuit gradually reduces when a Low level signal based on the power instruction signal is applied.

Abstract: In an automatic level controlling circuit, an output from a full-wave rectifying circuit 12 is supplied to a first and a second time constant circuit. The first time constant circuit includes a first amplifier 22 and a capacitor 15. The second time constant circuit includes a second amplifier 23 and the capacitor 15. The first amplifier 22 operates when the output V1 from the full-wave rectifying circuit 12 is larger than a DC level VDC. In this configuration, the attack times when an input signal is switched from no signal into a middle level signal and when the input signal is switched from the middle signal into a high level signal can be set at optimum values, respectively.

Abstract: In a gain control device for packet signal receiver, a variable gain amplifier amplifies an input signal with a gain corresponding to a control voltage applied thereto, and a power detector detects output power of the variable gain amplifier. A packet detection circuit detects a packet signal based on the detected output power. A control circuit outputs the control voltage variable with the detected output power, and the control voltage is provided for the amplifier. Thus high-speed gain control is performed immediately after the start of detection of the packet signal. When the elapsed time after the start of detection of the packet signal exceeds a predetermined time, a sample-hold circuit sample-and-holds the control voltage. This control voltage is provided for the amplifier up to the end of reception of the packet signal thereafter. Thus low-speed gain control is performed to provide stable power without distorting the signal wave.

Abstract: To reduce power consumption by increasing amplifying efficiency in a low power mode, there is provided a radio communication apparatus in which each of field effect transistors of a radio frequency power module in a multi-stage configuration is controlled by an APC circuit based on a power level instruction signal, and in which a correction circuit is incorporated between the gate of a final stage transistor and the APC circuit to apply a linear gate voltage to the final stage transistor when a High level signal based on the power level instruction signal is applied and to provide a maximum gate voltage of the final stage transistor which is equal to or lower than the gate voltages of other transistors and whose rate of increase relative to the output voltage of the APC circuit gradually reduces when a Low level signal based on the power instruction signal is applied.

Abstract: RF power detectors having a linear variation in differential output with the output power in dBm of a power amplifier. The detectors include a rectifying diode sensing the peak RF signal coupled thereto. Additional circuitry adds additional incremental loads to the detector output at various increased power amplifier outputs to maintain a substantially linear variation in detector output with the output power in dBm of the power amplifier. The second output of the differential output of the detector is referenced to the same number of forward conduction diode voltage drops as the output from the rectifying diode, so that the differential output of the detector is substantially temperature independent A resonant circuit may be used to enhance the sensitivity of the detector circuit.

Abstract: To make variable time constant of an AGC loop of an AGC circuit, there is provided an AGC circuit including a control circuit for controlling a level of an input signal and outputting an output signal, a rectifying circuit for rectifying the output signal from the control circuit and outputting a voltage V DET having a level in correspondence with a level of the output signal and a voltage to current converting circuit for converting the output voltage V DET from the rectifying circuit into a current. The voltage to current converting circuit is constituted to provide a differential amplifier supplied with the output voltage V DET from the rectifying circuit. A current I DET outputted by the differential amplifier is converted into AGC voltage V AGC by being supplied to a capacitor. By the AGC voltage V AGC, AGC is carried out by controlling the level of the input signal at the control circuit.

Abstract: An automatic gain control circuit comprising a variable gain amplifier having first and second differential gain control terminals, the first gain control terminal being connected to a constant reference voltage, a peak detector connected to the output of the variable gain amplifier and an integrator connected between the output of the peak detector and the second differential gain control terminal. The circuit further includes an integrating capacitor coupled to a ground terminal and a second capacitor connected between the first and second differential gain control terminals.

Abstract: An electric circuit having a switchable feedback branch switchable between a first feedback state, in which the circuit arrangement has a frequency response that is stable with respect to an oscillation tendency, and a second feedback state, in which the circuit arrangement has a frequency response that is unstable with respect to an oscillation tendency. The circuit includes a switchable frequency response compensation circuit which during the first feedback state of the feedback branch can be controlled to an ineffective state and during the second feedback state of the feedback branch can be controlled to an effective state, and in the effective state causes such compensation of the frequency response of the circuit arrangement in the second feedback state that the circuit arrangement in the second feedback state remains stable with respect to an oscillation tendency.