Including Gain Control Means Patents (Class 330/278)
  • Patent number: 10193586
    Abstract: A direct conversion radio frequency receiver comprising: a clock generator to provide a first clock signal and a second clock signal; a first node; a second node; a zero-intermediate frequency (zero-IF) mixer coupled to the first and second nodes, clocked by the first and second clock signals, and comprising a first transimpedance amplifier and a second transimpedance amplifier to provide a direct-conversion voltage; a current injector, coupled to the first and second nodes, configurable to inject into the first and second nodes a common mode current or a differential mode current; and a controller, coupled to the zero-IF mixer and the current injector, to adjust at least one of the first and second transimpedance amplifiers based on the direct-conversion voltage when the current injector is to inject the common mode current.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: January 29, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jagannathan Venkataraman, Eeshan Miglani
  • Patent number: 10187023
    Abstract: Multiband power amplifier with cascode switching. A power amplification system can include a first transistor having a base configured to receive an input radio-frequency (RF) signal and having an emitter coupled to a ground potential. The power amplification system can include a plurality of second transistors. Each one of the plurality of second transistors can have a respective emitter coupled to a collector of the first transistor and can be configured to, when biased at a respective base, output an output RF signal at a respective collector. The power amplification system can further include a biasing circuit configured to bias one or more of the plurality of second transistors based on a control signal.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: January 22, 2019
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Paul Raymond Andrys, David Steven Ripley
  • Patent number: 10122190
    Abstract: A power adapter, a terminal, and a method for handling an impedance anomaly in a charging loop are provided. The power adapter includes a power conversion unit and a charging interface. The power conversion unit forms a charging loop with a terminal through the charging interface. The power adapter includes a communications unit, a detection unit, and an anomaly handling unit. The communications unit is configured to receive voltage indicative information from the terminal, the voltage indicative information indicating an input voltage of the terminal. The detection unit is configured to detect an output voltage of the power adapter. The exception processing unit is configured to determine whether an impedance of the charging loop is abnormal according to a difference between the input voltage and the output voltage, and to control the charging loop to enter into a protection state if the impedance of the charging loop is abnormal.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: November 6, 2018
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventor: Jialiang Zhang
  • Patent number: 10097929
    Abstract: When, in conventional sound systems, signals of sounds collected by a microphone are amplified and the amplified signals are applied to an ear by an earphone and a headphone, too loud sounds and environmental noises are unpleasant, and the intelligibility of words are poor. Hence, such problems are to be addressed. In addition, downsizing and performance improvement for sound apparatuses are to be accomplished. A signal having undergone an amplitude limitation with reference to an output potential of a high cut filter 17 which is an output by a low cut filter 12 in a high frequency band and inverted by an inverter 14 is added with, by an adder 15, an output signal from the high cut filter 17, and an addition signal is output.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: October 9, 2018
    Assignee: Large. inc
    Inventor: Kenichi Oshima
  • Patent number: 10050452
    Abstract: A power adapter and a terminal are provided. The power adapter includes a power conversion component and a charging interface, the power conversion component being configured to form a charging loop with a terminal via the charging interface for charging a battery of the terminal. The power adapter further includes a communication component and an adjustment component, the communication component is configured to receive a battery parameter sent by the terminal, the battery parameter being used for indicating at least one of a current electric quantity and a current voltage value of the battery of the terminal; and the adjustment component is configured to determine a target current value corresponding to the at least one of current voltage value and the current electric quantity of the battery, and to adjust an output current value of the power adapter to the target current value.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: August 14, 2018
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventor: Jialiang Zhang
  • Patent number: 10033344
    Abstract: A digital signal processor that is capable of suppressing a signal level of an input analog signal at not more than the maximum voltage for A/D conversion and capable of preventing distortion of an A/D converted digital signal while maintaining a good S/N ratio. The digital signal processor 2 of the present invention includes amplification factor setting mechanisms to set amplification factors of the analog amplifiers to second amplification factors lower than first amplification factors specified by amplification factor adjustment knobs, digital amplifier mechanisms to amplify A/D converted digital signals by third amplification factors lower than the first amplification factors, and digital limiter mechanisms to compare the signal levels of the digital signals amplified by the third amplification factors with a threshold defined in advance and attenuate the digital signals within the range of the third amplification factors based on a result of the comparison.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: July 24, 2018
    Assignee: ZOOM CORPORATION
    Inventor: Michihito Nozokido
  • Patent number: 10008995
    Abstract: Variable gain amplifiers and methods of designing the same include a first amplifying transistor configured to receive a first input signal and to provide a first amplified output signal based on the first input signal. A phase compensating resistor is connected to the first amplifying transistor and has a resistance that compensates for a phase dependence of the first amplifying transistor, such that an output phase of the amplified output signal is dependent only on a phase of the input signal and is independent of an amplification of the first amplifying transistor.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: June 26, 2018
    Assignee: International Business Machines Corporation
    Inventors: John F. Bulzacchelli, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Patent number: 9955441
    Abstract: Provided is a receiver configured to perform automatic gain control (AGC), the receiver including a first variable gain amplifier configured to amplify, according to a first variable gain, a signal of a first frequency band, a second variable gain amplifier configured to amplify, according to a second variable gain, a signal of a second frequency band generated by frequency converting the amplified signal of the first frequency band, and an AGC circuit configured to control a total gain by controlling a gain ratio between the first variable gain and the second variable gain to be within a set target range by adjusting at least one of the first variable gain and the second variable gain.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: April 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seok-Ju Yun, Joonseong Kang, Young-Jun Hong
  • Patent number: 9899960
    Abstract: Aspects of this disclosure relate to a cascode circuit electrically coupled between an amplifier configured to amplify a radio frequency (RF) signal and different loads. The cascode circuit can function as a switch to selectively provide an output from the amplifier to a number of different loads. In certain embodiments, the cascode circuit can be electrically coupled between different stages of a multi-stage power amplifier. For instance, the amplifier can be a first stage of the multi-stage power amplifier and the different loads can include different power amplifier transistors of a second stage of the multi-stage amplifier. The cascode circuit can be implemented by bipolar transistors according to certain embodiments.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: February 20, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventor: Kenneth Michael Searle
  • Patent number: 9897483
    Abstract: A photoelectric conversion apparatus includes a photoelectric conversion unit, a signal line, a circuit block, and a control circuit. The circuit block includes a differential amplifier circuit including a feedback path, a first switch that controls conduction between an output terminal and the signal line, a second switch that controls conduction between an inverting input terminal and the signal line, and a third switch that controls conduction between the inverting input terminal and the output terminal. The control circuit controls a signal for controlling the first switch and a signal for controlling the third switch to have the relation of logical NOT.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: February 20, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Satoshi Kato
  • Patent number: 9887678
    Abstract: A linear low noise amplifier is disclosed. In at least one exemplary embodiment, the linear low noise amplifier may include a first metal oxide semiconductor field effect transistor (MOSFET) configured to operate in a triode mode coupled to a second MOSFET configured to operate in a saturation mode. Linearity of the low noise amplifier may be determined, at least in part, by a transconductance associated with the second MOSFET and a channel resistance associated the first MOSFET.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: February 6, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Amir Hossein Masnadi Shirazi Nejad, Mazhareddin Taghivand, Seyed Hossein Miri Lavasani, Mohammad Emadi
  • Patent number: 9864068
    Abstract: According to an embodiment, a circuit includes a shunt and a controller. The shunt shunts input current into a plurality of current paths. The controller controls a gain of current inputted to the shunt by combining the current that is shunted into the current paths by the shunt in combination corresponding to a first signal from the outside or changing a shunt ratio with which the shunt shunts the current into the current paths corresponding to the first signal.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: January 9, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke Kimura, Hirokatsu Shirahama, Go Kawata, Masanori Furuta, Hideyuki Funaki, Tetsuro Itakura
  • Patent number: 9859854
    Abstract: A power amplifier circuit comprising a transistor for receiving a signal to be amplified at an input and for outputting an amplified signal at an output; a modulated power supply connected to the transistor output; and a resistive element connected at the transistor output such that a low impedance is maintained at the transistor output across a range of operational frequencies.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: January 2, 2018
    Assignee: SnapTrack, Inc.
    Inventor: Martin Paul Wilson
  • Patent number: 9831883
    Abstract: In one aspect a system is provided. The system a plurality of flash compare modules to output a set of unordered output signals based on an analog input signal; a plurality of device selection modules that receive the unordered output signals and generate ordered signals representing the analog input; and a temperature and voltage compensation module for receiving one or more of temperature and voltage signals from at least a temperature and voltage sensor module that senses one or more of temperature and voltage values that are used to compensate for changes in output signals caused by changes in one or more of die temperature and core voltage.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: November 28, 2017
    Inventor: Frank R. Dropps
  • Patent number: 9831718
    Abstract: Disclosed here is a TV system with an integrated wireless power transmitter. The wireless power transmitter enables the TV system to provide a power source in the form of pockets of energy. A wireless power receiver may be coupled to the electrical devices to receive an electrical power source and transfer it to the electrical device. The receivers in the devices may capture energy from the pockets of energy formed by the wireless transmitter component in the TV system in order to power an electrical device.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: November 28, 2017
    Assignee: Energous Corporation
    Inventors: Michael A. Leabman, Gregory Scott Brewer
  • Patent number: 9806747
    Abstract: A system is provided with circuits and methods for dynamically reducing interference to maintain linear system operation and mitigate interference degradation to desired signal components. The system can include a binning subcircuit system configured to divide the digitized input signal into a plurality of spectral bins each having a power level. A power analysis subcircuit can be coupled to the binning subcircuit and configured to compare a collective power level of spectral bins to a threshold level that would produce nonlinear system operation. Based upon the collective power level exceeding the threshold level, outputting a gain control signal to a variable gain amplifier so that the system remains linear. This dynamic gain control can be applied to systems that receive and/or transmit signals. Residual interference components that degrade signal components can be dynamically removed by excision and the distortion introduced by the excision process can be reduced with equalization circuitry.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: October 31, 2017
    Assignee: The Aerospace Corporation
    Inventors: Christopher J. Clark, Robert B. Dybdal, Fei Wang
  • Patent number: 9799342
    Abstract: To provide a bandwidth extension method which allows reduction of computation amount in bandwidth extension and suppression of deterioration of quality in the bandwidth to be extended. In the bandwidth extension method: a low frequency bandwidth signal is transformed into a QMF domain to generate a first low frequency QMF spectrum; pitch-shifted signals are generated by applying different shifting factors on the low frequency bandwidth signal; a high frequency QMF spectrum is generated by time-stretching the pitch-shifted signals in the QMF domain; the high frequency QMF spectrum is modified; and the modified high frequency QMF spectrum is combined with the first low frequency QMF spectrum.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: October 24, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tomokazu Ishikawa, Takeshi Norimatsu, Huan Zhou, Kok Seng Chong, Haishan Zhong
  • Patent number: 9774302
    Abstract: Disclosed is an amplifier circuit having a single-ended input and differential outputs. The differential outputs are achieved using a first output branch and a second output branch, each including a common source FET (CS-FET) and a common gate FET (CG-FET) connected in series between ground and a corresponding out node connected to a load. An input signal is applied to the CS-FET in the first output branch and an intermediate signal at an intermediate node between the CS-FET and the CG-FET in the first output branch is applied to the CS-FET in the second output branch. The CG-FET in the first output branch and the CS-FET in the second output branch are equal in size such that their transconductances are approximately equal, such that currents in the two output branches are inverted and the outputs at the output nodes of the two output branches are differential outputs.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: September 26, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Abdellatif Bellaouar, Sher Jiun Fang
  • Patent number: 9768740
    Abstract: Feedback compensation for multistage amplifiers. In some embodiments, an amplifier can include a first stage, a second stage, and a third stage implemented in series between an input node and an output node. The amplifier can further include a first feedback path implemented between an output of the third stage and a node between the first and second stages, with the first feedback including a first capacitance. The amplifier can further include a second feedback path implemented between the output of the third stage and an output of the second stage. The second feedback pack can include a transconductance element and a second capacitance arranged in series. In some embodiments, such an amplifier can be configured as an operational-amplifier.
    Type: Grant
    Filed: January 31, 2016
    Date of Patent: September 19, 2017
    Assignee: Skyworks Solutions, Inc.
    Inventors: Xu Zhang, Gregory A. Blum
  • Patent number: 9762227
    Abstract: An apparatus of processing a signal or a biosignal, and a method of processing a signal or a biosignal are provided. The method of processing signal involves receiving a first reference signal having a frequency component of a measurement signal to be applied to a subject, receiving a second reference signal having a frequency component within a frequency bandwidth of an amplifier, and converting a first signal measured from the subject to a second signal within the frequency bandwidth of the amplifier, based on the first reference signal and the second reference signal.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: September 12, 2017
    Assignees: Samsung Electronics Co., Ltd., THE INDUSTRY & ACADEMIC COOPERATION IN CHUNGNAM NATIONAL UNIVERSITY (IAC)
    Inventors: Jong Pal Kim, Hyoung Ho Ko, Tak Hyung Lee
  • Patent number: 9748981
    Abstract: A radio frequency receiver comprises a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: August 29, 2017
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventors: Daniele Mastantuono, Sven Mattisson, Roland Strandberg, Lars Sundström
  • Patent number: 9728024
    Abstract: A key fob includes a power amplifier including an output having an output impedance. A radio frequency antenna connected to the power amplifier output represents a first load impedance to the power amplifier output in a space substantially free of interference for radio frequency transmissions, and a second load impedance to the power amplifier output when a hand of a user is capacitively coupled to the antenna. The difference between the second load impedance and the output impedance of the power amplifier is less than the difference between the first load impedance and the output impedance.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: August 8, 2017
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Mark Wisnewski, Tye Arthur Winkel, John Frederick Locke, Lawrence Banasky, Thomas Joseph Hermann
  • Patent number: 9623091
    Abstract: The present invention provides methods of administering Factor IX; methods of administering chimeric and hybrid polypeptides comprising Factor IX; chimeric and hybrid polypeptides comprising Factor IX; polynucleotides encoding such chimeric and hybrid polypeptides; cells comprising such polynucleotides; and methods of producing such chimeric and hybrid polypeptides using such cells.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: April 18, 2017
    Assignee: BIOVERATIV THERAPEUTICS INC.
    Inventors: Glenn Pierce, Samantha Truex, Robert T. Peters, Haiyan Jiang
  • Patent number: 9588240
    Abstract: An imager tile including four-side buttable sub-imager pixel arrays with on-chip digitizing electronic readout circuit. Pixel groupings formed from among the plurality of imagers. Readout electronics including a buffer amplifier for each of the pixel groupings are connected to respective outputs of buttable imagers. Shared analog front ends connect to respective buffer amplifiers of pixel groupings. An analog-to-digital converter at a common centroid location relative to the shared analog front ends includes three data lines—selection input/output line to individually select an output, a clock input line, and a shared digital output line. A pixel output from a respective buffer amplifier is addressable by data provided on the selection input/output line, and the pixel output is provided on the shared digital output line. The I/O lines connected to a programmable logic device where the imager serial data input is output as a massively parallel data stream.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: March 7, 2017
    Assignee: General Electric Company
    Inventors: Ibrahim Issoufou Kouada, Brian David Yanoff, Jonathan David Short, Jianjun Guo, Biju Jacob
  • Patent number: 9584085
    Abstract: An amplifying system with increased linearity is disclosed. The amplifying system includes a first gain stage with a first gain characteristic, a second gain stage with a second gain characteristic, and bias circuitry configured to substantially maintain alignment of distortion inflection points between the first gain characteristic and the second gain characteristic during operation. The bias circuitry is configured to further maintain alignment of the distortion inflection points between the first gain characteristic and the second gain characteristic over design corners by providing substantially constant headroom between quiescent bias voltage and turnoff of the first gain stage and the second gain stage. In some embodiments the first gain characteristic is expansive and the second gain characteristic is compressive. In other embodiments the first gain characteristic is compressive and the second gain characteristic is expansive.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: February 28, 2017
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, George Maxim, Dirk Robert Walter Leipold
  • Patent number: 9515619
    Abstract: An amplifier arrangement for amplifying an audio input signal AES into an audio output signal AAS, having a conditioning apparatus for converting the audio input signal AES into a conditioned intermediate signal ZS. The conditioning apparatus includes an audio input interface for accepting the audio input signal and a digital data processing device. The amplifier arrangement also includes an amplifier apparatus for amplifying the intermediate signal ZS into the audio output signal AAS and the amplifier apparatus has at least one operating voltage BS. The amplifier arrangement also includes a limiting module for limiting the audio output signal AAS by changing a gain parameter VK.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: December 6, 2016
    Assignee: Robert Bosch GmbH
    Inventors: Josef Plager, Patrick Engl, Thomas Stein
  • Patent number: 9473186
    Abstract: A method of controlling an automatic gain in a receiver includes receiving an input signal through an antenna of the receiver, by an automatic gain control unit of the receiver, setting a final RF gain, and by the automatic gain control unit, setting an IF gain in a state that the final RF gain is set.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: October 18, 2016
    Assignee: GCT SEMICONDUCTOR, INC.
    Inventors: Inho Song, Ei Ho Lee, Ki Tae Moon
  • Patent number: 9461594
    Abstract: Consumption current may be reduced in a power amplifier module in which a power supply voltage supplied to a power amplification transistor is controlled according to the level of output power. The power amplifier module includes an amplification transistor supplied with the power supply voltage according to the level of output power to amplify a radio-frequency signal, a bias control circuit for generating a bias voltage according to the power supply voltage, and a bias circuit for supplying a bias current according to the bias voltage to the amplification transistor, wherein current flowing through the amplification transistor when the radio-frequency signal is not input is varied according to the level of output power.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: October 4, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Makoto Tabei
  • Patent number: 9385764
    Abstract: A digital pre-distortion arrangement is disclosed. The arrangement comprises a respective filter bank for each of two or more initial signals to be amplified simultaneously by a non-linear power amplifier, N combiners, N pre-distorters and a multiplexer. Each respective filter bank comprises N interrelated filters. Multiplexed impulse responses of the interrelated filters define an overall filter function comprising a pass band associated with a transmission frequency of the initial signal. Each respective filter bank is configured to filter the respective initial signal in each of the interrelated filters to produce N digital filtered signals. The initial signal and each of the digital filtered signals have sample rate R. Each of the combiners is configured to combine corresponding digital filtered signals of each of the two or more initial signals to produce a composite digital signal having sample rate R.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: July 5, 2016
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Leonard Rexberg, Håkan Malmqvist
  • Patent number: 9374039
    Abstract: A power amplifier includes an amplification transistor which performs power amplification, a bias circuit which outputs a bias voltage to a base of the amplification transistor, a control terminal to which a control voltage is applied for controlling switching between an operating state and a stopping state of the bias circuit, and a bias voltage adjustment circuit connected to the control terminal. The bias voltage adjustment circuit includes a variable capacitance element which is connected to the control terminal and whose capacitance value decreases as the control voltage increases, a discharge circuit which discharges electric charge accumulated in the variable capacitance element to the control terminal, and a control circuit which is connected to the bias circuit and controls the bias voltage. The bias voltage adjustment circuit outputs, to the bias circuit, a bias voltage adjustment signal which increases the bias voltage for a predetermined period after the control voltage is applied.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: June 21, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masatoshi Kamitani, Kazuya Wakita, Shingo Enomoto, Masato Seki
  • Patent number: 9374043
    Abstract: A device includes a load circuit configured to receive an amplified communication signal, the load circuit having a center tapped inductor structure configured to divide the amplified communication signal into a first portion and a second portion, the load circuit configured to resonate at a harmonic of the amplified communication signal.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: June 21, 2016
    Assignee: Qualcomm Incorporated
    Inventors: Chuan Wang, Dongling Pan, Yiwu Tang, Klaas van Zalinge, Muhammad Hassan
  • Patent number: 9356585
    Abstract: An electronic device according to one or more embodiments of the present invention comprises an output line, a current mirror circuit and a comparator. Current signals from a plurality of signal sources are output to the output line. The current mirror circuit is electrically connected to the output line. The comparator is configured to compare a mirrored current signal from the current mirror circuit with a reference current signal. The comparator is configured to output a signal representing a comparison result of amplitudes of the mirrored current signal and the reference current signal.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: May 31, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsuhito Sakurai, Itsutaku Sano
  • Patent number: 9343380
    Abstract: A high-frequency power amplifier includes: a semiconductor substrate; transistor cells separated from each other and located on the semiconductor substrate; and testing electrodes respectively connected to individual transistor cells, wherein an electrical signal and power to individually operate each corresponding transistor cell are supplied to each transistor cell, independently, from outside, using the testing electrodes.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: May 17, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kunihiro Sato, Shin Chaki, Takashi Yamasaki, Takaaki Yoshioka
  • Patent number: 9329610
    Abstract: A biasing circuit for an acoustic transducer is provided with: a voltage-booster stage, which supplies, on a biasing terminal, a boosted voltage for biasing a first terminal of the acoustic transducer; and filtering elements, set between the biasing terminal and the acoustic transducer, for filtering disturbances on the boosted voltage. The biasing circuit is further provided with switches, which can be actuated so as to connect the first terminal to the biasing terminal of the voltage-booster stage, directly during a start-up step of the biasing circuit, and through the filtering elements at the end of the start-up step.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: May 3, 2016
    Assignee: STMicroelectronics S.r.l.
    Inventors: Filippo David, Alessandro Gasparini
  • Patent number: 9326066
    Abstract: An arrangement and method for converting an input signal z(t) into a mechanical or acoustical output signal p(t) comprising an electro-magnetic transducer using a coil at a fixed position and a moving armature, a sensor, a parameter measurement device and a controller. The parameter measurement device identifies parameter information P of an nonlinear model of the transducer considering and the saturation and the geometry of the magnetic elements. A diagnostic system reveals the physical causes of signal distortion and generates information for optimizing the design and manufacturing process of this transducer. The controller compensates for nonlinear signal distortion, stabilizes the rest position of the armature and protects the transducer against mechanical and thermal overload.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: April 26, 2016
    Inventor: Wolfgang Klippel
  • Patent number: 9252725
    Abstract: An amplifier includes a bootstrap circuit for improving a linearity of the amplifier and a feed-forward circuit for modifying a voltage of the bootstrap circuit in response to a change in an input signal. Modifying the voltage using the feed-forward circuit prevents a phase-inversion condition of the amplifier.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: February 2, 2016
    Assignee: Analog Devices, Inc.
    Inventors: Moshe Gerstenhaber, Derek Bowers, Oljeta Bida Qirko, Chau C Tran
  • Patent number: 9244580
    Abstract: A driving apparatus for an electrode in a capacitive touch control system is provided. The driving apparatus includes a signal generating module and an adjusting module. The signal generating module generates a driving signal. The adjusting module is connected between the signal generating module and the electrode, and generates an adjusted signal according to the driving signal to replace the driving signal. The adjusting module controls a rising edge or a falling edge of the waveform of the adjusted signal, so that a high-frequency component in the adjusted signal is less than that in the driving signal.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: January 26, 2016
    Assignee: MStar Semiconductor, Inc.
    Inventors: Guo-Kiang Hung, Hsuan-I Pan, Kai-Ting Ho
  • Patent number: 9243951
    Abstract: A photoelectric sensor amplifies a received light intensity signal generated through light projection processing and light receiving processing, and performs detection processing using the amplified received light intensity signal. The photoelectric sensor is provided with a variable resistor that generates an adjustment command signal that changes linearly with respect to sensitivity adjustment manipulations performed by a user. Further, the sensor is provided with an amplifier including a variable gain amplifier configured such that the aforementioned adjustment command signal is inputted thereto. Further, the variable gain amplifier is adapted to convert the signal into a gain control signal that changes exponentially with respect to sensitivity adjustment manipulations and, further, is adapted to perform amplification processing using a gain according to the gain control signal.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: January 26, 2016
    Assignee: OMRON CORPORATION
    Inventors: Ryosuke Tsuzuki, Takehiro Kawai, Motoharu Okuno
  • Patent number: 9222962
    Abstract: An automatic gain control apparatus includes: a first counter configured to calculate a first count value that is the number of times when a voltage of an input signal exceeds a first voltage threshold within a predetermined period; a second counter configured to calculate a second count value that is the number of times when the voltage of the input signal drops below a second voltage threshold in the predetermined period; and an over-range detector configured to detect an over-range, based on a comparison result obtained by comparing either one of each of the first count value and the second count value and a calculation result of the first count value and the second count value with a predetermined threshold, and output a detection result.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: December 29, 2015
    Assignee: Sony Corporation
    Inventors: Keitarou Kondou, Makoto Noda, Shinya Tamonoki
  • Patent number: 9184707
    Abstract: An amplifier having a switchable common gate gain buffer is disclosed. In an exemplary embodiment, an apparatus includes a plurality of selectable gain channels that provide constant input impedance at a common input to receive an input signal and generate an output signal having at least one of selected gain and current characteristics. At least two gain channels utilize transistors having different transconductance values. The apparatus also includes at least one impedance network coupled to at least one gain channel to provide the constant input impedance.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: November 10, 2015
    Assignee: Qualcomm Incorporated
    Inventors: Rajagopalan Rangarajan, Chirag D Patel
  • Patent number: 9184716
    Abstract: A low noise amplifier is disclosed. The low noise amplifier comprises a current mirror circuit, a bias circuit, a cascode amplifying circuit and a power gain compensating circuit. The current mirror circuit is used for providing a first current and third current. The bias circuit is used for receiving a first current and third current and outputting a first bias voltage and a second bias voltage according to the first current and third current. The cascode amplifying circuit respectively receives the first bias voltage and the second bias voltage, and accordingly to work at an operation bias point. The power gain compensating circuit is used for receiving a RF output signal and accordingly outputs a gain compensating signal to the current mirror circuit so as to dynamically adjust current value of the first current and third current and further to compensates power gain of the low noise amplifier in order to increase 1 dB gain compression point (P1 dB).
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: November 10, 2015
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING INC.
    Inventors: Jaw-Ming Ding, Jia-Hong Mou
  • Patent number: 9160376
    Abstract: The present disclosure includes programmable stabilization circuits and methods. In one embodiment, a power amplifier in a wireless transmitter includes a transistor comprising a gate, a source, and a drain. Feedback from the drain to the gate is modified dynamically to stabilize the amplifier under changing operating conditions. In one embodiment, a series RC circuit is configured between the drain the gate and the RC circuit value is adjusted based on different power supply voltage modes.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: October 13, 2015
    Assignee: QUALCOMM, Inc.
    Inventor: Antonino Scuderi
  • Patent number: 9136656
    Abstract: A device that incorporates teachings of the present disclosure may include, for example, a controller to provide low loss connectivity to a plurality of coaxial ports over a wide range of frequencies from D.C. to 2 GigaHertz in a coaxial network providing Ethernet networking, detune secondary coaxial splitters in the coaxial network that reduces an output-to-output isolation loss among secondary coaxial splitter output ports, and enable re-distribution of modulated radio frequency video signals from any point on the coaxial network to any alternative point on the coaxial network. Other embodiments are disclosed.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: September 15, 2015
    Assignee: AT&T INTELLECTUAL PROPERTY I, LP
    Inventors: Vernon Reed, Ahmad Ansari, David Rackley
  • Patent number: 9124228
    Abstract: Amplifiers with boosted or deboosted source degeneration inductance are disclosed. In an exemplary design, an apparatus includes an amplifier circuit and a feedback circuit. The amplifier circuit receives an input signal and provides an output signal and includes a source degeneration inductor. The feedback circuit is coupled between a node of the amplifier circuit and the source degeneration inductor. The feedback circuit provides feedback to vary an input impedance of an amplifier including the amplifier circuit and the feedback circuit. The feedback circuit may be programmable and may be enabled to provide feedback or disabled to provide no feedback. Alternatively, the feedback circuit may always be enabled to provide feedback. In either case, the feedback circuit may have a variable gain to provide a variable input impedance for the amplifier.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: September 1, 2015
    Assignee: Qualcomm Incorporated
    Inventors: Rui Xu, Li-Chung Chang
  • Patent number: 9124232
    Abstract: A gain controlling system, a sound playback system, and a gain controlling method thereof are disclosed. The gain controlling system includes a main gain control unit, a sub gain control unit, and a logic control unit. The main gain control unit has a first step-by-step adjusting magnitude; the sub gain control unit has a second step-by-step adjusting magnitude; wherein the second step-by-step adjusting magnitude is smaller than the first step-by-step adjusting magnitude. The logic control unit is used for controlling the main and the sub gain control unit to transform an analog signal into a converted signal according to an adjustment command signal and further determining whether an adjusting magnitude required by the adjustment command signal is larger than a maximum gain range of the sub gain control unit. If yes, the logic control unit controls the main control unit and the sub gain control unit repeatedly.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: September 1, 2015
    Assignee: Princeton Technology Corporation
    Inventors: Ming-Chung Li, Yi-Fan Shih, I-Chi Lin
  • Patent number: 9065408
    Abstract: A simplified VCA circuit is presented. The VCA of the present invention uses fewer components and is less complex than prior art OTA-based VCAs. Further, the VCA of the present invention has improved total harmonic distortion (THD) and DC offset characteristics as compared to prior art VCAs. The VCA may be used to prevent clipping with the addition of clipping detection circuitry.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: June 23, 2015
    Assignee: RGB Systems, Inc.
    Inventors: Eric Mendenhall, Jared Huntington
  • Patent number: 9035700
    Abstract: A variable gain amplifier (100) includes a transistor (110), an FB impedance section (120), a source impedance section (130), a drain impedance section (140), a gain controller (150), and a frequency characteristic controller (160). The gain controller (150) varies impedance of one of the FB impedance section (140), the source impedance section (130), and the drain impedance section (140), and outputs a gain control signal. The frequency characteristic controller (160) varies the impedance of different impedance section, based on the gain control signal.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: May 19, 2015
    Assignee: PANASONIC CORPORATION
    Inventor: Ryo Kitamura
  • Publication number: 20150123732
    Abstract: A two-stage RF amplifier is provided. The first stage is a common-emitter transistor arrangement with a purely reactive degeneration impedance and an output impedance with a reactive component matched in frequency response to the degeneration impedance. The second stage is a buffer amplifier. The first amplifier can be designed for high gain which is flat over frequency by virtue of the reactive degeneration impedance. The first amplifier provides input matching, and the buffer provides output matching, with decoupling between the input and output.
    Type: Application
    Filed: October 30, 2014
    Publication date: May 7, 2015
    Inventors: Gian Hoogzaad, Alexander Simin, Hasan Gui
  • Patent number: 9000845
    Abstract: The electronic circuit is arranged for the fast, automatic gain control of an input amplifier. It includes a non-linear amplifier-comparator for comparing a reference signal (VR) to an amplitude signal (VP) at the output of the input amplifier. The amplifier-comparator performs dual slope adaptation of the input amplifier gain according to a defined deviation threshold between the two input signals. The amplifier-comparator includes two branches each with three transistors connected in series between the terminals of a supply voltage source. First and second polarization transistors (M5, M6) are connected to the first and second input transistors (M1, M2) controlled by the first and second input signals, which are respectively connected to a first diode-connected transistor (M3) and a second transistor (M4) of a current mirror. A non-linear transconductance element (RNL) connects the sources of the input transistors to define a dual slope gain adaptation of the non-linear amplifier-comparator.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: April 7, 2015
    Assignee: EM Microelectronic-Marin S.A.
    Inventor: Armin Tajalli
  • Publication number: 20150091648
    Abstract: An amplifier circuit and an operation method thereof are provided. The amplifier circuit includes two stages of amplifiers. When the amplifier circuit is operated in a high gain mode, the two stages of amplifiers are operated normally to provide high gain. When the amplifier circuit is operated in a low gain mode, the second stage of amplifier is turned off, and the first stage of amplifier is coupled to output terminals of the amplifier circuit through signal isolation elements so as to form a single stage of amplifier. Therefore, the amplifier circuit can change the total gain value thereof according to a requirement of gain.
    Type: Application
    Filed: November 25, 2013
    Publication date: April 2, 2015
    Applicant: Novatek Microelectronics Corp.
    Inventor: Ying-Chung Chiu