Including Gain Control Means Patents (Class 330/278)
  • Patent number: 11888553
    Abstract: Inter-alia, an apparatus is disclosed comprising: at least one power amplifier coupled to at least one radio frequency power storage device, wherein the at least one power amplifier is configured to supply power to the at least one radio frequency power storage device, wherein the at least one power amplifier provides power to be used to amplify one or more radio frequency signals; wherein the at least one radio frequency power storage device is configured to store the power of the at least one power amplifier for a certain time period; and one or more antenna elements coupled to the at least one radio frequency power storage device, wherein the at least one radio frequency power storage device is configured to output stored power to at least one of the one or more antenna elements, wherein the power is output variably dependent upon a power demand of a required radio frequency power and/or amplitude needed to transmit the one or more radio frequency signals, wherein the power demand represents a power demand
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: January 30, 2024
    Assignee: NOKIA TECHNOLOGIES OY
    Inventors: Wolfgang Zirwas, Rakash Sivasiva Ganesan, Berthold Panzner
  • Patent number: 11863139
    Abstract: An amplifier includes an amplification circuit, an equalization circuit, an output circuit, a first gain adjusting circuit, and a second gain adjusting circuit. The amplification circuit changes voltage levels of first and second amplification nodes based on first and second input signals. The equalization circuit changes the voltage levels of the first and second amplification nodes. The output circuit generates an output signal based on the voltage levels of the first and second amplification nodes. The first gain adjusting circuit changes voltage levels applied to the first and second amplification nodes based on the voltage levels of the first and second amplification nodes and a first gain control signal. The second gain adjusting circuit changes a voltage level of the output signal based on a second gain control signal.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: January 2, 2024
    Assignee: SK hynix Inc.
    Inventor: Ji Hyo Kang
  • Patent number: 11838072
    Abstract: Certain aspects of the present disclosure provide techniques for determining a cable loss associated with a transmission cable of an apparatus. An example method includes sending, to a radio modem of the apparatus, a request for the radio modem to use a target power when sending one or more signals to the signal compensator device for determining a cable loss associated with a transmission cable communicatively coupling the radio modem with the signal compensator device, receiving, at a signal compensator device of the apparatus, the one or more signals from the radio modem sent using the target power, and determining the cable loss associated with the transmission cable based on the one or more signals.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: December 5, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Cheng Tan, Lei Sun, Sean Vincent Maschue, Bruce Charles Fischer, Jr., Brian French
  • Patent number: 11711105
    Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The low noise amplifier is operable in a non-carrier-aggregation (NCA) mode and a carrier aggregation (CA) mode. The low noise amplifier may include a first input stage, a second input stage, a complementary degeneration transformer, and an input impedance compensation circuit. During the NCA mode, the first input stage is turned on while the second input stage is turned off, the degeneration transformer is controlled to provide maximum inductance, and the compensation circuit is turned on to provide input matching. During the CA mode, the first and second input stages are turned on, the degeneration transformer is adjusted to provide less inductance, and the compensation circuit is turned off.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: July 25, 2023
    Assignee: Apple Inc.
    Inventors: Seyed Mohammad Hossein Mohammadnezhad, Aly Ismail, Xi Yao
  • Patent number: 11588476
    Abstract: An amplitude modulation circuit includes: first, second, and third input terminals; first and second output terminals; a current source; first and second transistors including a base electrically connected to the first and second input terminals, a collector electrically connected to the first and second output terminals, and an emitter electrically connected to a grounding terminal via the current source; first and second resistive elements electrically connected between the first and second output terminals and a power line; and a first MOS transistor including a drain connected to the first output terminal, a source connected to the second output terminal, and a gate connected to the third input terminal. The MOS transistor is configured to operate in a non-saturated region, and a resistance between the source and the drain of the MOS transistor is larger than resistances of the first and second resistive elements.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: February 21, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroshi Uemura, Keiji Tanaka
  • Patent number: 11527997
    Abstract: Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores in a particular gain mode to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a low noise figure amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity. The disclosed signal amplifiers can switch between a first active core and a second active core for a single or particular gain mode to achieve desired signal characteristics during different time periods.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: December 13, 2022
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
  • Patent number: 11425499
    Abstract: The present invention provides methods and systems for digital processing of an input audio signal. Specifically, the present invention includes a high pass filter configured to filter the input audio signal to create a high pass signal. A first filter module then filters the high pass signal to create a first filtered signal. A first compressor modulates the first filtered signal to create a modulated signal. A second filter module then filters the modulated signal to create a second filtered signal. The second filtered signal is processed by a first processing module. A band splitter splits the processed signal into low band, mid band, and high band signals. The low band and high band signals are modulated by respective compressors. A second processing module further processes the modulated low band, mid band, and modulated high band signals to create an output signal.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: August 23, 2022
    Assignee: BONGIOVI ACOUSTICS LLC
    Inventors: Anthony Bongiovi, Glenn Zelniker, Phillip Fuller
  • Patent number: 11346918
    Abstract: An interrogation device, for locating a wireless device, includes a receiver and digital processing circuitry. The receiver includes one or more receiver stages having adjustable gains, and is configured to receive from the wireless device a signal that carries a packet including a direction-finding field, wherein, during reception of the direction-finding field, multiple different temporal sections of the received signal traverse different wireless channels due to switching among different antennas in the interrogation device or in the wireless device and thus have multiple different received-signal levels. The digital processing circuitry is configured, based on the multiple received temporal sections of the signal during reception of the direction-finding field, to (i) adapt the adjustable gains of the receiver stages and (ii) estimate a position of the wireless device.
    Type: Grant
    Filed: September 15, 2019
    Date of Patent: May 31, 2022
    Assignee: MARVELL ASIA PTE LTD
    Inventors: Vijay Ganwani, Christian Raimund Berger, Sih-Yu Lin, Niranjan Grandhe
  • Patent number: 11277211
    Abstract: A method comprises: measuring reflected and forward power at a power amplifier output; determining if the reflected power equals to or exceeds a first level; if the reflected power is equal to or exceeds the first level, then reduce power of a power amplifier input signal; determining if a standing wave ratio at the power amplifier output equals or exceeds a second level; if the standing wave ratio at the power amplifier output equals or exceeds the second level, then reducing the power amplifier input signal power level and/or sending an alarm; determining if the power amplifier output power equals or exceeds a third level; and if the power output from the power amplifier equals or exceeds the third level, then reducing the power amplifier input signal power level until such power level is less than or equal to the third level and/or sending an alarm.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: March 15, 2022
    Assignee: Andrew Wireless Systems GmbH
    Inventors: Felix Lübbers, Rainer Friedrich
  • Patent number: 11258404
    Abstract: A variable-gain power amplifying technique includes generating, with a network of one or more reactive components included in an oscillator, a first oscillating signal, and outputting, via one or more taps included in the network of the reactive components, a second oscillating signal. The second oscillating signal has a magnitude that is proportional to and less than the first oscillating signal. The power amplifying technique further includes selecting one of the first and second oscillating signals to use for generating a power-amplified output signal, and amplifying the selected one of the first and second oscillating signals to generate the power-amplified output signal.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: February 22, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Sudipto Chakraborty
  • Patent number: 11258383
    Abstract: An electric motor control system comprising an electronic switch configured to control a current flow in a motor winding based on a pre-distorted signal and a digital pre-distorter configured to generate the pre-distorted signal based on an input signal and a plurality of coefficients, wherein the plurality of coefficients are based on a feedback signal that represents the current flow in the motor winding.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: February 22, 2022
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Gavin Tomas Watkins
  • Patent number: 11196388
    Abstract: Radio Frequency (RF) amplifier design with RFIC suffers gain variations from gain variations due to wafer process variations, temperature changes, and supply voltage changes. Three methods are proposed to achieve constant amplifier gain, either through on-chip wafer calibration, or self-calibration. Through automatic adjustment of amplifier bias current, the proposed methods maintain constant amplifier gain over process, temperature, supply voltage variations. Under the proposed Method 1, a constant transconductance Gm with enhanced gain accuracy is maintained via wafer calibration. Under the proposed Method 2, a constant transconductance Gm is maintained by time-domain averaging through different transistors. Under the proposed Method 3, a constant Gm*R or RF gain is maintained considering the impedance of a matching network of the RF amplifier.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: December 7, 2021
    Assignee: TubisTechnology INC.
    Inventors: Kenny Wu, Yuhmin Lin, James Wang
  • Patent number: 11189324
    Abstract: A voltage generating circuit includes a voltage supplying circuit and a current biasing circuit. The voltage supplying circuit is configured to supply a first power voltage to an output node based on a first enable signal. The current biasing circuit is configured to control a bias current to flow from the output node based on a second enable signal. The second enable signal is enabled after the first enable signal is enabled.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: November 30, 2021
    Assignee: SK hynix Inc.
    Inventor: Jun Ho Cheon
  • Patent number: 11171691
    Abstract: A communication device includes a donor receiver that receives a first beam of input radio frequency (RF) signals from a base station or a network node. The communication device further includes a service transmitter that transmits a second beam of RF signals in a first radiation pattern to a user equipment (UE). The communication device further includes control circuitry that detects an amount and a direction of echo signals at the donor receiver. The control circuitry applies polarization to the second beam of RF signals transmitted to the UE and calibrates the polarization to minimize the echo signals at the donor receiver. A second radiation pattern is generated for the second beam of RF signals and communicated to the UE based on the calibrated polarization. The communication of the second beam of RF signals in the generated second radiation pattern further reduces the echo signals at the donor receiver.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: November 9, 2021
    Assignee: SILICON VALLEY BANK
    Inventors: Ahmadreza Rofougaran, Maryam Rofougaran, Sam Gharavi, Qiyue “Jack” Zou, Alan Wang, Farid Shirinfar, Mike Boers
  • Patent number: 11171565
    Abstract: In an embodiment, A device includes an operational amplifier and a feedback loop. The feedback loop is coupled between a first input of the operational amplifier and an output of the operational amplifier. The feedback loop is controllable according to a saturation of the operational amplifier. In one example, the device is incorporated in a microcontroller.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: November 9, 2021
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: David Chesneau, Helene Esch, Francois Amiard
  • Patent number: 11159191
    Abstract: An electronic device may include wireless circuitry with a baseband processor, a transceiver circuit, a front-end module, and an antenna. The front-end module may include amplifier circuitry such as a low noise amplifier for amplifying received radio-frequency signals. The low noise amplifier is operable in a non-carrier-aggregation (NCA) mode and a carrier aggregation (CA) mode. The low noise amplifier may include a first input stage, a second input stage, a complementary degeneration transformer, and an input impedance compensation circuit. During the NCA mode, the first input stage is turned on while the second input stage is turned off, the degeneration transformer is controlled to provide maximum inductance, and the compensation circuit is turned on to provide input matching. During the CA mode, the first and second input stages are turned on, the degeneration transformer is adjusted to provide less inductance, and the compensation circuit is turned off.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: October 26, 2021
    Assignee: Apple Inc.
    Inventors: Seyed Mohammad Hossein Mohammadnezhad, Aly Ismail, Xi Yao
  • Patent number: 11139791
    Abstract: An integrated circuit device is provided. In some examples, the integrated circuit device includes an amplifier stage that receives an input signal and a control signal and provides an amplified signal in response. A main path is coupled to the amplifier stage that receives the amplified signal and provides a first feedback signal corresponding to a signal strength of a data-bearing portion of the input signal. A control path also receives the amplified signal and provides a second feedback signal corresponding to a signal strength of the data-bearing portion and an interference component. A gain control circuit is coupled to the main path and the control path that receives the first and second feedback signals and provides the control signal in response to the feedback signals. In some such examples, the control path and main path include separate mixer stages with different performance characteristics.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: October 5, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Harikrishna Parthasarathy, Arnab Das
  • Patent number: 10917128
    Abstract: A signal processing device includes a signal input, a signal output, a first amplifier, a second amplifier, a first distortion adjustment circuit, and a second distortion adjustment circuit. The signal input receives a RF signal to be amplified. The signal output outputs an amplified RF signal. Each of the first and second amplifiers includes an input coupled to the signal input and an output coupled to the signal output. The first distortion adjustment circuit includes a connection coupled to the input of the first amplifier. The second distortion adjustment circuit includes a connection coupled to the input of the second amplifier. The number of transistors in the first amplifier is different from the number of transistors in the second amplifier.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: February 9, 2021
    Assignee: RichWave Technology Corp.
    Inventor: Lu-Hung Liao
  • Patent number: 10826443
    Abstract: A circuit includes a first transistor having a first control input and first and current terminals. The circuit also includes a second transistor having a second control input and third and fourth current terminals. The third current terminal couples to the first current terminal at a first node. An output stage has a first input, a second input, and an output stage output. The first input couples to the fourth current terminal, and the second input couples to the second current terminal. A resistor has first and second resistor terminals. The first resistor terminal couples to the output stage output, and the second resistor terminal couples to the second control input. A third transistor has a third control input, a fifth current terminal, and a sixth current terminal. The fifth current terminal couples to the first resistor terminal, and the sixth current terminal couples to the second resistor terminal.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: November 3, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Shang-Yuan Chuang
  • Patent number: 10749489
    Abstract: Variable gain amplifiers and methods of designing the same include a first amplifying transistor configured to receive a first input signal and to provide a first amplified output signal based on the first input signal. A phase compensating resistor is connected to the first amplifying transistor and has a resistance calibrated as: R e = ? b C be , par where ?b is the base transit time of the first amplifying transistor and Cbe,par is the gain-independent part of the base-emitter capacitance of the first amplifying transistor.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: August 18, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John F. Bulzacchelli, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Patent number: 10749481
    Abstract: Aspects generally relate to reducing delay, or phase jitter, in high speed signals transmission. Variations in power supply to ground potential changes the amount of delay introduced by transmit circuitry into the signal being transmitted, resulting in jitter, or phase noise, in the transmitted signal. To reduce phase jitter, or phase noise, aspects disclosed include a variable impedance circuit coupled to the signal distribution network, the impedance level of the variable impedance circuit is adjusted in response to variation in the supply to ground potential, such that the delay introduced by the impedance compensates for changes in the delay due to variations in supply to ground potential, resulting in substantially constant delay.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: August 18, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Bo Sun, Yi Tang, Daniel Butterfield
  • Patent number: 10733398
    Abstract: A detection device includes a switch unit, the switch unit performs switching to a gain reduction state in which a gain of a loop antenna is reduced or a gain non-reduction state in which the gain of the loop antenna is not reduced in correspondence with a state of a detection target. When a wavelength of an electric wave is set as ?, the switch unit includes switch terminals for reducing the gain of the loop antenna within a range K1 on the loop antenna from a first circuit terminal to a position that is spaced away from the first circuit terminal by ?/8. In addition, the switch unit includes switch terminals for reducing the gain of the loop antenna within a range on the loop antenna from a second circuit terminal to a position that is spaced away from the second circuit terminal by ?/8.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: August 4, 2020
    Assignee: YAZAKI CORPORATION
    Inventors: Kouichi Yamamoto, Kazutomo Fujinami, Hiroshi Miyamoto, Ryohei Nishizaki, You Yanagida, Kunihiko Yamada
  • Patent number: 10725122
    Abstract: A sensor includes an output circuit configured to generate a sensor output signal based on an input signal having a logic high or low level, as may be provided by a Schmitt trigger circuit. During normal operation, the output switches between a first percentage of the supply voltage for logic high and a second percentage of the supply voltage for logic low. To convey a failure at the output, an output signal is output as either ground or the supply voltage when a fault is detected. As such, a fault can be communicated any time the output voltage is not equal to the first percentage or the second percentage of the supply voltage.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: July 28, 2020
    Assignee: Allegro MicroSystems, LLC
    Inventors: Ezequiel Rubinsztain, Pablo Javier Bolsinger
  • Patent number: 10700655
    Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: June 30, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Alaaeldien Mohamed Abdelrazek Medra, David Zixiang Yang, Kevin Hsi Huai Wang, Chen Zhai, Francesco Gatta
  • Patent number: 10700656
    Abstract: A wideband variable gain amplifier (VGA) having a low phase change is disclosed. The first VGA amplifies an input signal by a current steering manner so that an amplification gain is variable. The larger a variable gain amount of the first output signal amplified by the first VGA is, the more a relative phase change amount gradually increases in either positive direction or negative direction. The second VGA further amplifies the first amplified output signal in the current steering manner so as to vary the amplification gain. As a variable gain amount of a second output signal amplified by the second VGA becomes larger, a relative phase change amount gradually increases in a direction opposite to the phase change direction of the first VGA. This opposing phase changes of the first and second VGAs are canceled against each other to provide a variable amplification gain over the wideband frequency range with a low phase change.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: June 30, 2020
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: ChulSoon Park, SeungHun Kim
  • Patent number: 10687152
    Abstract: A hearing device, e.g. a hearing aid, comprises an input transducer for providing an electric input signal representative of a sound in the environment of the hearing device, an output transducer for providing an output sound representative of said electric input signal, a signal processor operationally connected to the input and output transducers, and forming part of an electric forward path for processing said electric input signal and providing a processed electric output signal, and a feedback detector for providing first and second indications of current feedback in an external—acoustic and/or mechanical—feedback path from said output transducer to said input transducer. The feedback detector is configured to determine the first and second indications of current feedback, respectively, based on said electric input signal or a processed version thereof and—optionally—on a current open loop magnitude of a feedback loop defined by said forward path and said external feedback path.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: June 16, 2020
    Assignee: OTICON A/S
    Inventors: Martin Kuriger, Bernhard Kuenzle, Meng Guo
  • Patent number: 10686409
    Abstract: An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: June 16, 2020
    Assignee: pSemi Corporation
    Inventors: Kashish Pal, Emre Ayranci, Miles Sanner
  • Patent number: 10673395
    Abstract: An amplifier according to an embodiment of the present disclosure includes a first transistor and a first matching circuit. The first matching circuit is connected between an input terminal and a control terminal of the first transistor. A first terminal of the first transistor is connected to a ground. A second terminal of the first transistor is connected to a power supply and an output terminal. The first matching circuit includes a first inductor, a second inductor, and a first switch. The first inductor has an end connected to the control terminal. The second inductor has an end connected to the other end of the first inductor. The first switch is configured to selectively switch between electrical continuity between the input terminal and the other end of the first inductor and electrical continuity between the input terminal and the other end of the second inductor.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: June 2, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Daisuke Watanabe, Ken Wakaki
  • Patent number: 10666072
    Abstract: A power adapter and a method for handling an impedance anomaly in a charging loop are provided. The power adapter includes a power conversion unit and a charging interface. The power conversion unit forms a charging loop with a terminal through the charging interface. The power adapter includes a communications unit, a detection unit, and an anomaly handling unit. The communications unit is configured to receive voltage indicative information from the terminal, the voltage indicative information indicating an input voltage of the terminal. The detection unit is configured to detect an output voltage of the power adapter. The anomaly handling unit is configured to determine whether an impedance of the charging loop is abnormal according to a difference between the input voltage and the output voltage, and to control the charging loop to enter into a protection state if the impedance of the charging loop is abnormal.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: May 26, 2020
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventor: Jialiang Zhang
  • Patent number: 10602275
    Abstract: Enhancing audio content based on application of different gains to different frequency bands of an audio signal is disclosed. Audio information contained in an input signal can undergo beamforming to provide an initial adjustment to the audio information, e.g., noise reduction, etc. In an embodiment beamforming can comprise double-beamforming in which first audio information is adjusted based on second audio information and the second audio information is adjusted based on the first audio information. Different gains can be applied to content in determined frequency bands, resulting in an amplified signal. In some embodiments, the gains can be related to hearing sensitivity of a listener, e.g., via a hearing sensitivity model. The amplified audio information from each frequency band can then be recombined. The recombined signal can be level limited and subjected to further digital and analog gains. The resulting output, e.g., enhanced audio, can be individually adapted for a listener.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: March 24, 2020
    Assignee: BITWAVE PTE LTD
    Inventors: Siew Kok Hui, Lei Tu
  • Patent number: 10574278
    Abstract: A wireless wake-up receiver includes multiple signal chains each signal chain being coupled to continuously receive a signal from a respective antenna and to provide a respective detected pattern at a signal chain output. Each signal chain includes a first path having a mixer-first architecture and operates in a bandpass-mode using differential signals. The wireless wake-up receiver also includes a digital correlator operable to receive the respective detected patterns and to determine whether one of the respective detected patterns is equal to a desired pattern.
    Type: Grant
    Filed: November 13, 2016
    Date of Patent: February 25, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sudipto Chakraborty, Jens Graul, Ram Pratap Aditham
  • Patent number: 10566001
    Abstract: To provide a bandwidth extension method which allows reduction of computation amount in bandwidth extension and suppression of deterioration of quality in the bandwidth to be extended. In the bandwidth extension method: a low frequency bandwidth signal is transformed into a QMF domain to generate a first low frequency QMF spectrum; pitch-shifted signals are generated by applying different shifting factors on the low frequency bandwidth signal; a high frequency QMF spectrum is generated by time-stretching the pitch-shifted signals in the QMF domain; the high frequency QMF spectrum is modified; and the modified high frequency QMF spectrum is combined with the first low frequency QMF spectrum.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: February 18, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tomokazu Ishikawa, Takeshi Norimatsu, Huan Zhou, Kok Seng Chong, Haishan Zhong
  • Patent number: 10485054
    Abstract: A method for operating a first transmit-receive point (TRP) includes receiving a first measurement report from a user equipment (UE), the first measurement report including an identifier of a second TRP, requesting a second measurement report from the UE, the second measurement report to include automatic neighbor relation (ANR) information associated with the second TRP, wherein the ANR information includes a beam specific information, receiving the second measurement report including a first subset of the ANR information, and determining a neighbor configuration with the second TRP in accordance with the first subset of the ANR information.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: November 19, 2019
    Assignee: FUTUREWEI TECHNOLOGIES, INC.
    Inventors: Nathan Edward Tenny, Richard Stirling-Gallacher, Bin Liu
  • Patent number: 10461701
    Abstract: In one form, a signal generator system such as a power amplifier system includes an amplification stage, a lowpass filter, and a controller. The amplification stage includes a first amplifier having an input for receiving an input signal, a control input for receiving a first control signal, and an output. The lowpass filter has a first input coupled to the output of the first amplifier, and an output. The controller has a first input coupled to the output of the lowpass filter, and a first output coupled to the control input of the first amplifier, wherein the controller varies the first control signal to reduce a difference between the output of the lowpass filter and a first target voltage level.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: October 29, 2019
    Assignee: SILICON LABORATORIES INC.
    Inventors: Sherry X. Wu, Sriharsha Vasadi, Mustafa H. Koroglu, Rangakrishnan Srinivasan
  • Patent number: 10439566
    Abstract: A power amplifier circuit includes a differential to single-ended converter, a gain stage circuit, a driver stage circuit, and an output stage circuit connected in series, and a bias circuit connected to a bias voltage port of the gain stage circuit for adjusting a bias voltage of the gain stage circuit. The bias voltage is adjustable to ensure low power consumption, improve the efficiency of the power amplifier circuit and prevent process, voltage and temperatures from affecting the performance of the power amplifier circuit.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: October 8, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: Hao Sun
  • Patent number: 10418841
    Abstract: A wireless power receiver is coupled to an impedance matching network, the impedance matching network having a first node and a second node. Coupled to the first node is a first branch having a first positive reactance and a second branch having a first negative reactance, wherein an absolute value of the first positive reactance is different from an absolute value of the first negative reactance, and coupled to the second node is a third branch having a second positive reactance and a fourth branch having a second negative reactance, wherein an absolute value of the second positive reactance is different from an absolute value of the second negative reactance.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: September 17, 2019
    Assignee: WiTricity Corporation
    Inventors: Milisav Danilovic, Andre B. Kurs
  • Patent number: 10374561
    Abstract: Provided is an amplification circuit that amplifies an input signal and outputs an amplified signal. The amplification circuit includes: an amplification element that outputs the amplified signal from an output terminal thereof; an inductor having one end to which a power supply voltage is supplied and another end that is connected to the output terminal of the amplification element; a variable resistor that is connected in parallel with the inductor; and a resistance value adjusting circuit that adjusts a resistance value of the variable resistor in accordance with the temperature.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: August 6, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Makoto Tabei, Daisuke Watanabe
  • Patent number: 10367346
    Abstract: The electric leakage protection device (feed control device includes an electric leakage detector, an electric leakage protector, and a self leakage generator. The electric leakage detector outputs an electric leakage detection signal when a current leaked from a main circuit exceeds a threshold value. The electric leakage protector opens a contact device interposed in the main circuit when receiving the electric leakage detection signal. The self leakage generator includes; a first short circuit having a first electric resistance component and a first switch component electrically connected in series with each other, and a second short circuit having a second electric resistance component and a second switch component electrically connected in series with each other. The first short circuit and the second short circuit are electrically connected in parallel with each other with regard to a pair of power supply paths constituting the main circuit.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: July 30, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Naoki Fukuo, Koji Yamato, Hideki Kawahara
  • Patent number: 10298181
    Abstract: Strength of a signal received by a low-noise amplifier is controlled depending on strength of a reception signal emitted to a communication satellite by a mobile terminal. A low-noise amplification device provided in the communication satellite comprises: a variable-power attenuation unit which generates an attenuation signal by attenuating the reception signal received in the communication satellite; a low-noise amplification unit which generates an amplification signal by amplifying the attenuation signal with low noise; and a signal control unit which outputs a control signal to the variable-power attenuation unit depending on the attenuation signal, and then adjusts an attenuation of the variable-power attenuation unit.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: May 21, 2019
    Assignee: NEC CORPORATION
    Inventor: Kunio Endoh
  • Patent number: 10193586
    Abstract: A direct conversion radio frequency receiver comprising: a clock generator to provide a first clock signal and a second clock signal; a first node; a second node; a zero-intermediate frequency (zero-IF) mixer coupled to the first and second nodes, clocked by the first and second clock signals, and comprising a first transimpedance amplifier and a second transimpedance amplifier to provide a direct-conversion voltage; a current injector, coupled to the first and second nodes, configurable to inject into the first and second nodes a common mode current or a differential mode current; and a controller, coupled to the zero-IF mixer and the current injector, to adjust at least one of the first and second transimpedance amplifiers based on the direct-conversion voltage when the current injector is to inject the common mode current.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: January 29, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jagannathan Venkataraman, Eeshan Miglani
  • Patent number: 10187023
    Abstract: Multiband power amplifier with cascode switching. A power amplification system can include a first transistor having a base configured to receive an input radio-frequency (RF) signal and having an emitter coupled to a ground potential. The power amplification system can include a plurality of second transistors. Each one of the plurality of second transistors can have a respective emitter coupled to a collector of the first transistor and can be configured to, when biased at a respective base, output an output RF signal at a respective collector. The power amplification system can further include a biasing circuit configured to bias one or more of the plurality of second transistors based on a control signal.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: January 22, 2019
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Paul Raymond Andrys, David Steven Ripley
  • Patent number: 10122190
    Abstract: A power adapter, a terminal, and a method for handling an impedance anomaly in a charging loop are provided. The power adapter includes a power conversion unit and a charging interface. The power conversion unit forms a charging loop with a terminal through the charging interface. The power adapter includes a communications unit, a detection unit, and an anomaly handling unit. The communications unit is configured to receive voltage indicative information from the terminal, the voltage indicative information indicating an input voltage of the terminal. The detection unit is configured to detect an output voltage of the power adapter. The exception processing unit is configured to determine whether an impedance of the charging loop is abnormal according to a difference between the input voltage and the output voltage, and to control the charging loop to enter into a protection state if the impedance of the charging loop is abnormal.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: November 6, 2018
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventor: Jialiang Zhang
  • Patent number: 10097929
    Abstract: When, in conventional sound systems, signals of sounds collected by a microphone are amplified and the amplified signals are applied to an ear by an earphone and a headphone, too loud sounds and environmental noises are unpleasant, and the intelligibility of words are poor. Hence, such problems are to be addressed. In addition, downsizing and performance improvement for sound apparatuses are to be accomplished. A signal having undergone an amplitude limitation with reference to an output potential of a high cut filter 17 which is an output by a low cut filter 12 in a high frequency band and inverted by an inverter 14 is added with, by an adder 15, an output signal from the high cut filter 17, and an addition signal is output.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: October 9, 2018
    Assignee: Large. inc
    Inventor: Kenichi Oshima
  • Patent number: 10050452
    Abstract: A power adapter and a terminal are provided. The power adapter includes a power conversion component and a charging interface, the power conversion component being configured to form a charging loop with a terminal via the charging interface for charging a battery of the terminal. The power adapter further includes a communication component and an adjustment component, the communication component is configured to receive a battery parameter sent by the terminal, the battery parameter being used for indicating at least one of a current electric quantity and a current voltage value of the battery of the terminal; and the adjustment component is configured to determine a target current value corresponding to the at least one of current voltage value and the current electric quantity of the battery, and to adjust an output current value of the power adapter to the target current value.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: August 14, 2018
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventor: Jialiang Zhang
  • Patent number: 10033344
    Abstract: A digital signal processor that is capable of suppressing a signal level of an input analog signal at not more than the maximum voltage for A/D conversion and capable of preventing distortion of an A/D converted digital signal while maintaining a good S/N ratio. The digital signal processor 2 of the present invention includes amplification factor setting mechanisms to set amplification factors of the analog amplifiers to second amplification factors lower than first amplification factors specified by amplification factor adjustment knobs, digital amplifier mechanisms to amplify A/D converted digital signals by third amplification factors lower than the first amplification factors, and digital limiter mechanisms to compare the signal levels of the digital signals amplified by the third amplification factors with a threshold defined in advance and attenuate the digital signals within the range of the third amplification factors based on a result of the comparison.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: July 24, 2018
    Assignee: ZOOM CORPORATION
    Inventor: Michihito Nozokido
  • Patent number: 10008995
    Abstract: Variable gain amplifiers and methods of designing the same include a first amplifying transistor configured to receive a first input signal and to provide a first amplified output signal based on the first input signal. A phase compensating resistor is connected to the first amplifying transistor and has a resistance that compensates for a phase dependence of the first amplifying transistor, such that an output phase of the amplified output signal is dependent only on a phase of the input signal and is independent of an amplification of the first amplifying transistor.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: June 26, 2018
    Assignee: International Business Machines Corporation
    Inventors: John F. Bulzacchelli, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Patent number: 9955441
    Abstract: Provided is a receiver configured to perform automatic gain control (AGC), the receiver including a first variable gain amplifier configured to amplify, according to a first variable gain, a signal of a first frequency band, a second variable gain amplifier configured to amplify, according to a second variable gain, a signal of a second frequency band generated by frequency converting the amplified signal of the first frequency band, and an AGC circuit configured to control a total gain by controlling a gain ratio between the first variable gain and the second variable gain to be within a set target range by adjusting at least one of the first variable gain and the second variable gain.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: April 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seok-Ju Yun, Joonseong Kang, Young-Jun Hong
  • Patent number: 9899960
    Abstract: Aspects of this disclosure relate to a cascode circuit electrically coupled between an amplifier configured to amplify a radio frequency (RF) signal and different loads. The cascode circuit can function as a switch to selectively provide an output from the amplifier to a number of different loads. In certain embodiments, the cascode circuit can be electrically coupled between different stages of a multi-stage power amplifier. For instance, the amplifier can be a first stage of the multi-stage power amplifier and the different loads can include different power amplifier transistors of a second stage of the multi-stage amplifier. The cascode circuit can be implemented by bipolar transistors according to certain embodiments.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: February 20, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventor: Kenneth Michael Searle
  • Patent number: 9897483
    Abstract: A photoelectric conversion apparatus includes a photoelectric conversion unit, a signal line, a circuit block, and a control circuit. The circuit block includes a differential amplifier circuit including a feedback path, a first switch that controls conduction between an output terminal and the signal line, a second switch that controls conduction between an inverting input terminal and the signal line, and a third switch that controls conduction between the inverting input terminal and the output terminal. The control circuit controls a signal for controlling the first switch and a signal for controlling the third switch to have the relation of logical NOT.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: February 20, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Satoshi Kato
  • Patent number: 9887678
    Abstract: A linear low noise amplifier is disclosed. In at least one exemplary embodiment, the linear low noise amplifier may include a first metal oxide semiconductor field effect transistor (MOSFET) configured to operate in a triode mode coupled to a second MOSFET configured to operate in a saturation mode. Linearity of the low noise amplifier may be determined, at least in part, by a transconductance associated with the second MOSFET and a channel resistance associated the first MOSFET.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: February 6, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Amir Hossein Masnadi Shirazi Nejad, Mazhareddin Taghivand, Seyed Hossein Miri Lavasani, Mohammad Emadi