Including Gain Control Means Patents (Class 330/278)
  • Patent number: 10917128
    Abstract: A signal processing device includes a signal input, a signal output, a first amplifier, a second amplifier, a first distortion adjustment circuit, and a second distortion adjustment circuit. The signal input receives a RF signal to be amplified. The signal output outputs an amplified RF signal. Each of the first and second amplifiers includes an input coupled to the signal input and an output coupled to the signal output. The first distortion adjustment circuit includes a connection coupled to the input of the first amplifier. The second distortion adjustment circuit includes a connection coupled to the input of the second amplifier. The number of transistors in the first amplifier is different from the number of transistors in the second amplifier.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: February 9, 2021
    Assignee: RichWave Technology Corp.
    Inventor: Lu-Hung Liao
  • Patent number: 10826443
    Abstract: A circuit includes a first transistor having a first control input and first and current terminals. The circuit also includes a second transistor having a second control input and third and fourth current terminals. The third current terminal couples to the first current terminal at a first node. An output stage has a first input, a second input, and an output stage output. The first input couples to the fourth current terminal, and the second input couples to the second current terminal. A resistor has first and second resistor terminals. The first resistor terminal couples to the output stage output, and the second resistor terminal couples to the second control input. A third transistor has a third control input, a fifth current terminal, and a sixth current terminal. The fifth current terminal couples to the first resistor terminal, and the sixth current terminal couples to the second resistor terminal.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: November 3, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Shang-Yuan Chuang
  • Patent number: 10749489
    Abstract: Variable gain amplifiers and methods of designing the same include a first amplifying transistor configured to receive a first input signal and to provide a first amplified output signal based on the first input signal. A phase compensating resistor is connected to the first amplifying transistor and has a resistance calibrated as: R e = ? b C be , par where ?b is the base transit time of the first amplifying transistor and Cbe,par is the gain-independent part of the base-emitter capacitance of the first amplifying transistor.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: August 18, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John F. Bulzacchelli, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Patent number: 10749481
    Abstract: Aspects generally relate to reducing delay, or phase jitter, in high speed signals transmission. Variations in power supply to ground potential changes the amount of delay introduced by transmit circuitry into the signal being transmitted, resulting in jitter, or phase noise, in the transmitted signal. To reduce phase jitter, or phase noise, aspects disclosed include a variable impedance circuit coupled to the signal distribution network, the impedance level of the variable impedance circuit is adjusted in response to variation in the supply to ground potential, such that the delay introduced by the impedance compensates for changes in the delay due to variations in supply to ground potential, resulting in substantially constant delay.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: August 18, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Bo Sun, Yi Tang, Daniel Butterfield
  • Patent number: 10733398
    Abstract: A detection device includes a switch unit, the switch unit performs switching to a gain reduction state in which a gain of a loop antenna is reduced or a gain non-reduction state in which the gain of the loop antenna is not reduced in correspondence with a state of a detection target. When a wavelength of an electric wave is set as ?, the switch unit includes switch terminals for reducing the gain of the loop antenna within a range K1 on the loop antenna from a first circuit terminal to a position that is spaced away from the first circuit terminal by ?/8. In addition, the switch unit includes switch terminals for reducing the gain of the loop antenna within a range on the loop antenna from a second circuit terminal to a position that is spaced away from the second circuit terminal by ?/8.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: August 4, 2020
    Assignee: YAZAKI CORPORATION
    Inventors: Kouichi Yamamoto, Kazutomo Fujinami, Hiroshi Miyamoto, Ryohei Nishizaki, You Yanagida, Kunihiko Yamada
  • Patent number: 10725122
    Abstract: A sensor includes an output circuit configured to generate a sensor output signal based on an input signal having a logic high or low level, as may be provided by a Schmitt trigger circuit. During normal operation, the output switches between a first percentage of the supply voltage for logic high and a second percentage of the supply voltage for logic low. To convey a failure at the output, an output signal is output as either ground or the supply voltage when a fault is detected. As such, a fault can be communicated any time the output voltage is not equal to the first percentage or the second percentage of the supply voltage.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: July 28, 2020
    Assignee: Allegro MicroSystems, LLC
    Inventors: Ezequiel Rubinsztain, Pablo Javier Bolsinger
  • Patent number: 10700655
    Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: June 30, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Alaaeldien Mohamed Abdelrazek Medra, David Zixiang Yang, Kevin Hsi Huai Wang, Chen Zhai, Francesco Gatta
  • Patent number: 10700656
    Abstract: A wideband variable gain amplifier (VGA) having a low phase change is disclosed. The first VGA amplifies an input signal by a current steering manner so that an amplification gain is variable. The larger a variable gain amount of the first output signal amplified by the first VGA is, the more a relative phase change amount gradually increases in either positive direction or negative direction. The second VGA further amplifies the first amplified output signal in the current steering manner so as to vary the amplification gain. As a variable gain amount of a second output signal amplified by the second VGA becomes larger, a relative phase change amount gradually increases in a direction opposite to the phase change direction of the first VGA. This opposing phase changes of the first and second VGAs are canceled against each other to provide a variable amplification gain over the wideband frequency range with a low phase change.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: June 30, 2020
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: ChulSoon Park, SeungHun Kim
  • Patent number: 10686409
    Abstract: An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: June 16, 2020
    Assignee: pSemi Corporation
    Inventors: Kashish Pal, Emre Ayranci, Miles Sanner
  • Patent number: 10687152
    Abstract: A hearing device, e.g. a hearing aid, comprises an input transducer for providing an electric input signal representative of a sound in the environment of the hearing device, an output transducer for providing an output sound representative of said electric input signal, a signal processor operationally connected to the input and output transducers, and forming part of an electric forward path for processing said electric input signal and providing a processed electric output signal, and a feedback detector for providing first and second indications of current feedback in an external—acoustic and/or mechanical—feedback path from said output transducer to said input transducer. The feedback detector is configured to determine the first and second indications of current feedback, respectively, based on said electric input signal or a processed version thereof and—optionally—on a current open loop magnitude of a feedback loop defined by said forward path and said external feedback path.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: June 16, 2020
    Assignee: OTICON A/S
    Inventors: Martin Kuriger, Bernhard Kuenzle, Meng Guo
  • Patent number: 10673395
    Abstract: An amplifier according to an embodiment of the present disclosure includes a first transistor and a first matching circuit. The first matching circuit is connected between an input terminal and a control terminal of the first transistor. A first terminal of the first transistor is connected to a ground. A second terminal of the first transistor is connected to a power supply and an output terminal. The first matching circuit includes a first inductor, a second inductor, and a first switch. The first inductor has an end connected to the control terminal. The second inductor has an end connected to the other end of the first inductor. The first switch is configured to selectively switch between electrical continuity between the input terminal and the other end of the first inductor and electrical continuity between the input terminal and the other end of the second inductor.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: June 2, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Daisuke Watanabe, Ken Wakaki
  • Patent number: 10666072
    Abstract: A power adapter and a method for handling an impedance anomaly in a charging loop are provided. The power adapter includes a power conversion unit and a charging interface. The power conversion unit forms a charging loop with a terminal through the charging interface. The power adapter includes a communications unit, a detection unit, and an anomaly handling unit. The communications unit is configured to receive voltage indicative information from the terminal, the voltage indicative information indicating an input voltage of the terminal. The detection unit is configured to detect an output voltage of the power adapter. The anomaly handling unit is configured to determine whether an impedance of the charging loop is abnormal according to a difference between the input voltage and the output voltage, and to control the charging loop to enter into a protection state if the impedance of the charging loop is abnormal.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: May 26, 2020
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventor: Jialiang Zhang
  • Patent number: 10602275
    Abstract: Enhancing audio content based on application of different gains to different frequency bands of an audio signal is disclosed. Audio information contained in an input signal can undergo beamforming to provide an initial adjustment to the audio information, e.g., noise reduction, etc. In an embodiment beamforming can comprise double-beamforming in which first audio information is adjusted based on second audio information and the second audio information is adjusted based on the first audio information. Different gains can be applied to content in determined frequency bands, resulting in an amplified signal. In some embodiments, the gains can be related to hearing sensitivity of a listener, e.g., via a hearing sensitivity model. The amplified audio information from each frequency band can then be recombined. The recombined signal can be level limited and subjected to further digital and analog gains. The resulting output, e.g., enhanced audio, can be individually adapted for a listener.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: March 24, 2020
    Assignee: BITWAVE PTE LTD
    Inventors: Siew Kok Hui, Lei Tu
  • Patent number: 10574278
    Abstract: A wireless wake-up receiver includes multiple signal chains each signal chain being coupled to continuously receive a signal from a respective antenna and to provide a respective detected pattern at a signal chain output. Each signal chain includes a first path having a mixer-first architecture and operates in a bandpass-mode using differential signals. The wireless wake-up receiver also includes a digital correlator operable to receive the respective detected patterns and to determine whether one of the respective detected patterns is equal to a desired pattern.
    Type: Grant
    Filed: November 13, 2016
    Date of Patent: February 25, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sudipto Chakraborty, Jens Graul, Ram Pratap Aditham
  • Patent number: 10566001
    Abstract: To provide a bandwidth extension method which allows reduction of computation amount in bandwidth extension and suppression of deterioration of quality in the bandwidth to be extended. In the bandwidth extension method: a low frequency bandwidth signal is transformed into a QMF domain to generate a first low frequency QMF spectrum; pitch-shifted signals are generated by applying different shifting factors on the low frequency bandwidth signal; a high frequency QMF spectrum is generated by time-stretching the pitch-shifted signals in the QMF domain; the high frequency QMF spectrum is modified; and the modified high frequency QMF spectrum is combined with the first low frequency QMF spectrum.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: February 18, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tomokazu Ishikawa, Takeshi Norimatsu, Huan Zhou, Kok Seng Chong, Haishan Zhong
  • Patent number: 10485054
    Abstract: A method for operating a first transmit-receive point (TRP) includes receiving a first measurement report from a user equipment (UE), the first measurement report including an identifier of a second TRP, requesting a second measurement report from the UE, the second measurement report to include automatic neighbor relation (ANR) information associated with the second TRP, wherein the ANR information includes a beam specific information, receiving the second measurement report including a first subset of the ANR information, and determining a neighbor configuration with the second TRP in accordance with the first subset of the ANR information.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: November 19, 2019
    Assignee: FUTUREWEI TECHNOLOGIES, INC.
    Inventors: Nathan Edward Tenny, Richard Stirling-Gallacher, Bin Liu
  • Patent number: 10461701
    Abstract: In one form, a signal generator system such as a power amplifier system includes an amplification stage, a lowpass filter, and a controller. The amplification stage includes a first amplifier having an input for receiving an input signal, a control input for receiving a first control signal, and an output. The lowpass filter has a first input coupled to the output of the first amplifier, and an output. The controller has a first input coupled to the output of the lowpass filter, and a first output coupled to the control input of the first amplifier, wherein the controller varies the first control signal to reduce a difference between the output of the lowpass filter and a first target voltage level.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: October 29, 2019
    Assignee: SILICON LABORATORIES INC.
    Inventors: Sherry X. Wu, Sriharsha Vasadi, Mustafa H. Koroglu, Rangakrishnan Srinivasan
  • Patent number: 10439566
    Abstract: A power amplifier circuit includes a differential to single-ended converter, a gain stage circuit, a driver stage circuit, and an output stage circuit connected in series, and a bias circuit connected to a bias voltage port of the gain stage circuit for adjusting a bias voltage of the gain stage circuit. The bias voltage is adjustable to ensure low power consumption, improve the efficiency of the power amplifier circuit and prevent process, voltage and temperatures from affecting the performance of the power amplifier circuit.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: October 8, 2019
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: Hao Sun
  • Patent number: 10418841
    Abstract: A wireless power receiver is coupled to an impedance matching network, the impedance matching network having a first node and a second node. Coupled to the first node is a first branch having a first positive reactance and a second branch having a first negative reactance, wherein an absolute value of the first positive reactance is different from an absolute value of the first negative reactance, and coupled to the second node is a third branch having a second positive reactance and a fourth branch having a second negative reactance, wherein an absolute value of the second positive reactance is different from an absolute value of the second negative reactance.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: September 17, 2019
    Assignee: WiTricity Corporation
    Inventors: Milisav Danilovic, Andre B. Kurs
  • Patent number: 10374561
    Abstract: Provided is an amplification circuit that amplifies an input signal and outputs an amplified signal. The amplification circuit includes: an amplification element that outputs the amplified signal from an output terminal thereof; an inductor having one end to which a power supply voltage is supplied and another end that is connected to the output terminal of the amplification element; a variable resistor that is connected in parallel with the inductor; and a resistance value adjusting circuit that adjusts a resistance value of the variable resistor in accordance with the temperature.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: August 6, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Makoto Tabei, Daisuke Watanabe
  • Patent number: 10367346
    Abstract: The electric leakage protection device (feed control device includes an electric leakage detector, an electric leakage protector, and a self leakage generator. The electric leakage detector outputs an electric leakage detection signal when a current leaked from a main circuit exceeds a threshold value. The electric leakage protector opens a contact device interposed in the main circuit when receiving the electric leakage detection signal. The self leakage generator includes; a first short circuit having a first electric resistance component and a first switch component electrically connected in series with each other, and a second short circuit having a second electric resistance component and a second switch component electrically connected in series with each other. The first short circuit and the second short circuit are electrically connected in parallel with each other with regard to a pair of power supply paths constituting the main circuit.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: July 30, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Naoki Fukuo, Koji Yamato, Hideki Kawahara
  • Patent number: 10298181
    Abstract: Strength of a signal received by a low-noise amplifier is controlled depending on strength of a reception signal emitted to a communication satellite by a mobile terminal. A low-noise amplification device provided in the communication satellite comprises: a variable-power attenuation unit which generates an attenuation signal by attenuating the reception signal received in the communication satellite; a low-noise amplification unit which generates an amplification signal by amplifying the attenuation signal with low noise; and a signal control unit which outputs a control signal to the variable-power attenuation unit depending on the attenuation signal, and then adjusts an attenuation of the variable-power attenuation unit.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: May 21, 2019
    Assignee: NEC CORPORATION
    Inventor: Kunio Endoh
  • Patent number: 10193586
    Abstract: A direct conversion radio frequency receiver comprising: a clock generator to provide a first clock signal and a second clock signal; a first node; a second node; a zero-intermediate frequency (zero-IF) mixer coupled to the first and second nodes, clocked by the first and second clock signals, and comprising a first transimpedance amplifier and a second transimpedance amplifier to provide a direct-conversion voltage; a current injector, coupled to the first and second nodes, configurable to inject into the first and second nodes a common mode current or a differential mode current; and a controller, coupled to the zero-IF mixer and the current injector, to adjust at least one of the first and second transimpedance amplifiers based on the direct-conversion voltage when the current injector is to inject the common mode current.
    Type: Grant
    Filed: December 30, 2017
    Date of Patent: January 29, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jagannathan Venkataraman, Eeshan Miglani
  • Patent number: 10187023
    Abstract: Multiband power amplifier with cascode switching. A power amplification system can include a first transistor having a base configured to receive an input radio-frequency (RF) signal and having an emitter coupled to a ground potential. The power amplification system can include a plurality of second transistors. Each one of the plurality of second transistors can have a respective emitter coupled to a collector of the first transistor and can be configured to, when biased at a respective base, output an output RF signal at a respective collector. The power amplification system can further include a biasing circuit configured to bias one or more of the plurality of second transistors based on a control signal.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: January 22, 2019
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Paul Raymond Andrys, David Steven Ripley
  • Patent number: 10122190
    Abstract: A power adapter, a terminal, and a method for handling an impedance anomaly in a charging loop are provided. The power adapter includes a power conversion unit and a charging interface. The power conversion unit forms a charging loop with a terminal through the charging interface. The power adapter includes a communications unit, a detection unit, and an anomaly handling unit. The communications unit is configured to receive voltage indicative information from the terminal, the voltage indicative information indicating an input voltage of the terminal. The detection unit is configured to detect an output voltage of the power adapter. The exception processing unit is configured to determine whether an impedance of the charging loop is abnormal according to a difference between the input voltage and the output voltage, and to control the charging loop to enter into a protection state if the impedance of the charging loop is abnormal.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: November 6, 2018
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventor: Jialiang Zhang
  • Patent number: 10097929
    Abstract: When, in conventional sound systems, signals of sounds collected by a microphone are amplified and the amplified signals are applied to an ear by an earphone and a headphone, too loud sounds and environmental noises are unpleasant, and the intelligibility of words are poor. Hence, such problems are to be addressed. In addition, downsizing and performance improvement for sound apparatuses are to be accomplished. A signal having undergone an amplitude limitation with reference to an output potential of a high cut filter 17 which is an output by a low cut filter 12 in a high frequency band and inverted by an inverter 14 is added with, by an adder 15, an output signal from the high cut filter 17, and an addition signal is output.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: October 9, 2018
    Assignee: Large. inc
    Inventor: Kenichi Oshima
  • Patent number: 10050452
    Abstract: A power adapter and a terminal are provided. The power adapter includes a power conversion component and a charging interface, the power conversion component being configured to form a charging loop with a terminal via the charging interface for charging a battery of the terminal. The power adapter further includes a communication component and an adjustment component, the communication component is configured to receive a battery parameter sent by the terminal, the battery parameter being used for indicating at least one of a current electric quantity and a current voltage value of the battery of the terminal; and the adjustment component is configured to determine a target current value corresponding to the at least one of current voltage value and the current electric quantity of the battery, and to adjust an output current value of the power adapter to the target current value.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: August 14, 2018
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventor: Jialiang Zhang
  • Patent number: 10033344
    Abstract: A digital signal processor that is capable of suppressing a signal level of an input analog signal at not more than the maximum voltage for A/D conversion and capable of preventing distortion of an A/D converted digital signal while maintaining a good S/N ratio. The digital signal processor 2 of the present invention includes amplification factor setting mechanisms to set amplification factors of the analog amplifiers to second amplification factors lower than first amplification factors specified by amplification factor adjustment knobs, digital amplifier mechanisms to amplify A/D converted digital signals by third amplification factors lower than the first amplification factors, and digital limiter mechanisms to compare the signal levels of the digital signals amplified by the third amplification factors with a threshold defined in advance and attenuate the digital signals within the range of the third amplification factors based on a result of the comparison.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: July 24, 2018
    Assignee: ZOOM CORPORATION
    Inventor: Michihito Nozokido
  • Patent number: 10008995
    Abstract: Variable gain amplifiers and methods of designing the same include a first amplifying transistor configured to receive a first input signal and to provide a first amplified output signal based on the first input signal. A phase compensating resistor is connected to the first amplifying transistor and has a resistance that compensates for a phase dependence of the first amplifying transistor, such that an output phase of the amplified output signal is dependent only on a phase of the input signal and is independent of an amplification of the first amplifying transistor.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: June 26, 2018
    Assignee: International Business Machines Corporation
    Inventors: John F. Bulzacchelli, Bodhisatwa Sadhu, Alberto Valdes Garcia
  • Patent number: 9955441
    Abstract: Provided is a receiver configured to perform automatic gain control (AGC), the receiver including a first variable gain amplifier configured to amplify, according to a first variable gain, a signal of a first frequency band, a second variable gain amplifier configured to amplify, according to a second variable gain, a signal of a second frequency band generated by frequency converting the amplified signal of the first frequency band, and an AGC circuit configured to control a total gain by controlling a gain ratio between the first variable gain and the second variable gain to be within a set target range by adjusting at least one of the first variable gain and the second variable gain.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: April 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seok-Ju Yun, Joonseong Kang, Young-Jun Hong
  • Patent number: 9899960
    Abstract: Aspects of this disclosure relate to a cascode circuit electrically coupled between an amplifier configured to amplify a radio frequency (RF) signal and different loads. The cascode circuit can function as a switch to selectively provide an output from the amplifier to a number of different loads. In certain embodiments, the cascode circuit can be electrically coupled between different stages of a multi-stage power amplifier. For instance, the amplifier can be a first stage of the multi-stage power amplifier and the different loads can include different power amplifier transistors of a second stage of the multi-stage amplifier. The cascode circuit can be implemented by bipolar transistors according to certain embodiments.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: February 20, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventor: Kenneth Michael Searle
  • Patent number: 9897483
    Abstract: A photoelectric conversion apparatus includes a photoelectric conversion unit, a signal line, a circuit block, and a control circuit. The circuit block includes a differential amplifier circuit including a feedback path, a first switch that controls conduction between an output terminal and the signal line, a second switch that controls conduction between an inverting input terminal and the signal line, and a third switch that controls conduction between the inverting input terminal and the output terminal. The control circuit controls a signal for controlling the first switch and a signal for controlling the third switch to have the relation of logical NOT.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: February 20, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Satoshi Kato
  • Patent number: 9887678
    Abstract: A linear low noise amplifier is disclosed. In at least one exemplary embodiment, the linear low noise amplifier may include a first metal oxide semiconductor field effect transistor (MOSFET) configured to operate in a triode mode coupled to a second MOSFET configured to operate in a saturation mode. Linearity of the low noise amplifier may be determined, at least in part, by a transconductance associated with the second MOSFET and a channel resistance associated the first MOSFET.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: February 6, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Amir Hossein Masnadi Shirazi Nejad, Mazhareddin Taghivand, Seyed Hossein Miri Lavasani, Mohammad Emadi
  • Patent number: 9864068
    Abstract: According to an embodiment, a circuit includes a shunt and a controller. The shunt shunts input current into a plurality of current paths. The controller controls a gain of current inputted to the shunt by combining the current that is shunted into the current paths by the shunt in combination corresponding to a first signal from the outside or changing a shunt ratio with which the shunt shunts the current into the current paths corresponding to the first signal.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: January 9, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunsuke Kimura, Hirokatsu Shirahama, Go Kawata, Masanori Furuta, Hideyuki Funaki, Tetsuro Itakura
  • Patent number: 9859854
    Abstract: A power amplifier circuit comprising a transistor for receiving a signal to be amplified at an input and for outputting an amplified signal at an output; a modulated power supply connected to the transistor output; and a resistive element connected at the transistor output such that a low impedance is maintained at the transistor output across a range of operational frequencies.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: January 2, 2018
    Assignee: SnapTrack, Inc.
    Inventor: Martin Paul Wilson
  • Patent number: 9831718
    Abstract: Disclosed here is a TV system with an integrated wireless power transmitter. The wireless power transmitter enables the TV system to provide a power source in the form of pockets of energy. A wireless power receiver may be coupled to the electrical devices to receive an electrical power source and transfer it to the electrical device. The receivers in the devices may capture energy from the pockets of energy formed by the wireless transmitter component in the TV system in order to power an electrical device.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: November 28, 2017
    Assignee: Energous Corporation
    Inventors: Michael A. Leabman, Gregory Scott Brewer
  • Patent number: 9831883
    Abstract: In one aspect a system is provided. The system a plurality of flash compare modules to output a set of unordered output signals based on an analog input signal; a plurality of device selection modules that receive the unordered output signals and generate ordered signals representing the analog input; and a temperature and voltage compensation module for receiving one or more of temperature and voltage signals from at least a temperature and voltage sensor module that senses one or more of temperature and voltage values that are used to compensate for changes in output signals caused by changes in one or more of die temperature and core voltage.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: November 28, 2017
    Inventor: Frank R. Dropps
  • Patent number: 9806747
    Abstract: A system is provided with circuits and methods for dynamically reducing interference to maintain linear system operation and mitigate interference degradation to desired signal components. The system can include a binning subcircuit system configured to divide the digitized input signal into a plurality of spectral bins each having a power level. A power analysis subcircuit can be coupled to the binning subcircuit and configured to compare a collective power level of spectral bins to a threshold level that would produce nonlinear system operation. Based upon the collective power level exceeding the threshold level, outputting a gain control signal to a variable gain amplifier so that the system remains linear. This dynamic gain control can be applied to systems that receive and/or transmit signals. Residual interference components that degrade signal components can be dynamically removed by excision and the distortion introduced by the excision process can be reduced with equalization circuitry.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: October 31, 2017
    Assignee: The Aerospace Corporation
    Inventors: Christopher J. Clark, Robert B. Dybdal, Fei Wang
  • Patent number: 9799342
    Abstract: To provide a bandwidth extension method which allows reduction of computation amount in bandwidth extension and suppression of deterioration of quality in the bandwidth to be extended. In the bandwidth extension method: a low frequency bandwidth signal is transformed into a QMF domain to generate a first low frequency QMF spectrum; pitch-shifted signals are generated by applying different shifting factors on the low frequency bandwidth signal; a high frequency QMF spectrum is generated by time-stretching the pitch-shifted signals in the QMF domain; the high frequency QMF spectrum is modified; and the modified high frequency QMF spectrum is combined with the first low frequency QMF spectrum.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: October 24, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Tomokazu Ishikawa, Takeshi Norimatsu, Huan Zhou, Kok Seng Chong, Haishan Zhong
  • Patent number: 9774302
    Abstract: Disclosed is an amplifier circuit having a single-ended input and differential outputs. The differential outputs are achieved using a first output branch and a second output branch, each including a common source FET (CS-FET) and a common gate FET (CG-FET) connected in series between ground and a corresponding out node connected to a load. An input signal is applied to the CS-FET in the first output branch and an intermediate signal at an intermediate node between the CS-FET and the CG-FET in the first output branch is applied to the CS-FET in the second output branch. The CG-FET in the first output branch and the CS-FET in the second output branch are equal in size such that their transconductances are approximately equal, such that currents in the two output branches are inverted and the outputs at the output nodes of the two output branches are differential outputs.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: September 26, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Abdellatif Bellaouar, Sher Jiun Fang
  • Patent number: 9768740
    Abstract: Feedback compensation for multistage amplifiers. In some embodiments, an amplifier can include a first stage, a second stage, and a third stage implemented in series between an input node and an output node. The amplifier can further include a first feedback path implemented between an output of the third stage and a node between the first and second stages, with the first feedback including a first capacitance. The amplifier can further include a second feedback path implemented between the output of the third stage and an output of the second stage. The second feedback pack can include a transconductance element and a second capacitance arranged in series. In some embodiments, such an amplifier can be configured as an operational-amplifier.
    Type: Grant
    Filed: January 31, 2016
    Date of Patent: September 19, 2017
    Assignee: Skyworks Solutions, Inc.
    Inventors: Xu Zhang, Gregory A. Blum
  • Patent number: 9762227
    Abstract: An apparatus of processing a signal or a biosignal, and a method of processing a signal or a biosignal are provided. The method of processing signal involves receiving a first reference signal having a frequency component of a measurement signal to be applied to a subject, receiving a second reference signal having a frequency component within a frequency bandwidth of an amplifier, and converting a first signal measured from the subject to a second signal within the frequency bandwidth of the amplifier, based on the first reference signal and the second reference signal.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: September 12, 2017
    Assignees: Samsung Electronics Co., Ltd., THE INDUSTRY & ACADEMIC COOPERATION IN CHUNGNAM NATIONAL UNIVERSITY (IAC)
    Inventors: Jong Pal Kim, Hyoung Ho Ko, Tak Hyung Lee
  • Patent number: 9748981
    Abstract: A radio frequency receiver comprises a plurality of parallel receiving paths, wherein each path can receive a radio frequency signal in one of a plurality of radio frequency bands and amplify the received signal in a low noise amplifier. The amplified signals from the plurality of parallel paths are combined to one combined radio frequency signal in a common summation node and down-converted to a lower frequency signal in a mixer circuit. Each low noise amplifier comprises a low noise transconductance circuit providing a current signal to drive the common summation node, and an automatic gain control circuit in each path compensates for variations in signal strength independently of signal strengths of signals received by the other receiving paths. The receiver is suitable for simultaneous multiple band reception, where received signal strength can vary between the frequency bands.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: August 29, 2017
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventors: Daniele Mastantuono, Sven Mattisson, Roland Strandberg, Lars Sundström
  • Patent number: 9728024
    Abstract: A key fob includes a power amplifier including an output having an output impedance. A radio frequency antenna connected to the power amplifier output represents a first load impedance to the power amplifier output in a space substantially free of interference for radio frequency transmissions, and a second load impedance to the power amplifier output when a hand of a user is capacitively coupled to the antenna. The difference between the second load impedance and the output impedance of the power amplifier is less than the difference between the first load impedance and the output impedance.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: August 8, 2017
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Mark Wisnewski, Tye Arthur Winkel, John Frederick Locke, Lawrence Banasky, Thomas Joseph Hermann
  • Patent number: 9623091
    Abstract: The present invention provides methods of administering Factor IX; methods of administering chimeric and hybrid polypeptides comprising Factor IX; chimeric and hybrid polypeptides comprising Factor IX; polynucleotides encoding such chimeric and hybrid polypeptides; cells comprising such polynucleotides; and methods of producing such chimeric and hybrid polypeptides using such cells.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: April 18, 2017
    Assignee: BIOVERATIV THERAPEUTICS INC.
    Inventors: Glenn Pierce, Samantha Truex, Robert T. Peters, Haiyan Jiang
  • Patent number: 9588240
    Abstract: An imager tile including four-side buttable sub-imager pixel arrays with on-chip digitizing electronic readout circuit. Pixel groupings formed from among the plurality of imagers. Readout electronics including a buffer amplifier for each of the pixel groupings are connected to respective outputs of buttable imagers. Shared analog front ends connect to respective buffer amplifiers of pixel groupings. An analog-to-digital converter at a common centroid location relative to the shared analog front ends includes three data lines—selection input/output line to individually select an output, a clock input line, and a shared digital output line. A pixel output from a respective buffer amplifier is addressable by data provided on the selection input/output line, and the pixel output is provided on the shared digital output line. The I/O lines connected to a programmable logic device where the imager serial data input is output as a massively parallel data stream.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: March 7, 2017
    Assignee: General Electric Company
    Inventors: Ibrahim Issoufou Kouada, Brian David Yanoff, Jonathan David Short, Jianjun Guo, Biju Jacob
  • Patent number: 9584085
    Abstract: An amplifying system with increased linearity is disclosed. The amplifying system includes a first gain stage with a first gain characteristic, a second gain stage with a second gain characteristic, and bias circuitry configured to substantially maintain alignment of distortion inflection points between the first gain characteristic and the second gain characteristic during operation. The bias circuitry is configured to further maintain alignment of the distortion inflection points between the first gain characteristic and the second gain characteristic over design corners by providing substantially constant headroom between quiescent bias voltage and turnoff of the first gain stage and the second gain stage. In some embodiments the first gain characteristic is expansive and the second gain characteristic is compressive. In other embodiments the first gain characteristic is compressive and the second gain characteristic is expansive.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: February 28, 2017
    Assignee: Qorvo US, Inc.
    Inventors: Baker Scott, George Maxim, Dirk Robert Walter Leipold
  • Patent number: 9515619
    Abstract: An amplifier arrangement for amplifying an audio input signal AES into an audio output signal AAS, having a conditioning apparatus for converting the audio input signal AES into a conditioned intermediate signal ZS. The conditioning apparatus includes an audio input interface for accepting the audio input signal and a digital data processing device. The amplifier arrangement also includes an amplifier apparatus for amplifying the intermediate signal ZS into the audio output signal AAS and the amplifier apparatus has at least one operating voltage BS. The amplifier arrangement also includes a limiting module for limiting the audio output signal AAS by changing a gain parameter VK.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: December 6, 2016
    Assignee: Robert Bosch GmbH
    Inventors: Josef Plager, Patrick Engl, Thomas Stein
  • Patent number: 9473186
    Abstract: A method of controlling an automatic gain in a receiver includes receiving an input signal through an antenna of the receiver, by an automatic gain control unit of the receiver, setting a final RF gain, and by the automatic gain control unit, setting an IF gain in a state that the final RF gain is set.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: October 18, 2016
    Assignee: GCT SEMICONDUCTOR, INC.
    Inventors: Inho Song, Ei Ho Lee, Ki Tae Moon
  • Patent number: 9461594
    Abstract: Consumption current may be reduced in a power amplifier module in which a power supply voltage supplied to a power amplification transistor is controlled according to the level of output power. The power amplifier module includes an amplification transistor supplied with the power supply voltage according to the level of output power to amplify a radio-frequency signal, a bias control circuit for generating a bias voltage according to the power supply voltage, and a bias circuit for supplying a bias current according to the bias voltage to the amplification transistor, wherein current flowing through the amplification transistor when the radio-frequency signal is not input is varied according to the level of output power.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: October 4, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Makoto Tabei