Abstract: Methods and systems for monitoring the activity of electrogenic networks are described. One representative system includes an array of electrode coupled to an analyzer having a stimulator and a receiver. The electrode is placed in contact with an electrogenic cell. The electrodes can be shaped as nanowires, tubes, cavities and/or cones. The analyzer may be configured to operate in a voltage stimulation mode, in which the cells are stimulated via voltages and monitored via current, or in a current stimulation mode, in which the cells are stimulated via currents and monitored via voltages. The analyzers may be arranged as single-stage amplifiers, and may include a feedback loop shared between the stimulation signal path and the sensing signal path. The feedback loop may be arranged to provide overlapping stimulation and sensing of the electrogenic network's cells.

Abstract: An amplifier circuit includes an amplifier having an amplifier input and an amplifier output. The amplifier circuit includes a transformer having a primary winding in series with the amplifier output and a secondary winding coupled to the amplifier input. The primary winding and the secondary winding are arranged such that a portion of a magnetic field generated by the primary winding couples to the secondary winding through a magnetically coupled feedback loop, thereby providing feedback from the amplifier output to the amplifier input. An output load arrangement is connected to the primary winding wherein the output arrangement includes a balun. The amplifier circuit may be implemented as an integrated circuit and where the primary and secondary windings are integrated in different metal layers of the integrated circuit or are otherwise arranged to effect a desired degree of magnetic coupling and feedback from the amplifier output to the amplifier input.

Abstract: A stacked amplifier circuit includes an input stage having first and second input ports respectively defined by inputs of first and second transistors. A transformer arrangement includes first and second primary windings and first and second secondary windings. The first secondary winding is connected to an output of the first input transistor and the second secondary winding is connected to an output of the second input transistor. Portions of the magnetic fields generated by the primary windings couple to their respective secondary windings. An output stage is AC coupled to the first and second secondary windings and has an output connected to the first and second primary windings. The input stage and the output stage are arranged in a stacked configuration such that a bias current of the output stage is reused as bias current for the input stage.

Abstract: A high frequency semiconductor amplifier according to the present disclosure includes: a transistor formed on a semiconductor substrate and including a gate electrode, a source electrode, and a drain electrode; a matching circuit for input-side fundamental wave matching of the transistor; a first inductor formed on the semiconductor substrate and having one end connected to the gate electrode of the transistor and the other end connected to the matching circuit; a capacitor formed on the semiconductor substrate and having one end being short-circuited; and a second inductor formed on the semiconductor substrate and having one end connected to the gate electrode of the transistor and the other end connected to the other end of the capacitor, wherein the second inductor resonates in series with the capacitor at second harmonic frequency, has a mutual inductance of subtractive polarity with the first inductor, and the first inductor and the second inductor form mutual inductive circuits for input-side second har

Abstract: An amplifier circuit amplifies a radio-frequency signal. The amplifier circuit includes an amplifier, an input matching circuit connected to an input side of the amplifier and matches impedance, and a protection circuit connected to a node in a path within a path between an input matching circuit and the amplifier. The protection circuit includes a first diode connected between the node and a ground, and a second diode connected in parallel with the first diode and connected in a direction opposite to the first diode between the node and the ground. A threshold voltage of each of the first diode and the second diode is greater than a maximum voltage amplitude of the input signal at the node and is less than a difference between a withstand voltage of the amplifier and the bias voltage.

Abstract: A power amplifier includes power amplification circuits in a plurality of stages including a first stage and a second stage, each power amplification circuit including a transistor. The power amplification circuit in the first stage includes a first impedance circuit between an emitter of the transistor and a reference potential. The first impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency. The power amplification circuit in the second stage includes a second impedance circuit between an emitter of the transistor and a reference potential. The second impedance circuit has an impedance that does not vary with frequency or an impedance that varies with frequency.

Abstract: In an embodiment, an apparatus includes a first transmit path, a second transmit path, and a switch element. The first transmit path can provide a first radio frequency (RF) signal in accordance with a nominal specification. The second transmit path can provide a second RF signal in accordance with an intermittent specification, in which the first and second RF signals are within the same transmit band. The switch element can provide the first RF signal as a transmit mode output in a first state and provide the second RF signal as the transmit mode output in a second state.

Abstract: In an embodiment, an apparatus includes a first transmit path, a second transmit path, and a switch element. The first transmit path can provide a first radio frequency (RF) signal in accordance with a nominal specification. The second transmit path can provide a second RF signal in accordance with an intermittent specification, in which the first and second RF signals are within the same transmit band. The switch element can provide the first RF signal as a transmit mode output in a first state and provide the second RF signal as the transmit mode output in a second state.

Abstract: Disclosed are systems and methods related to matching an impedance of the power amplifier to an impedance of the antenna in a power amplifier module that includes an amplifier circuit residing on a first semiconductor die and an output matching network (OMN) that includes a first partial OMN and a second partial OMN. The first partial OMN resides on the first semiconductor die and matches an output impedance of the amplifier circuit to an input impedance of the second partial OMN. The second partial OMN matches an output impedance of the first partial OMN with an input impedance of the antenna and is not part of the first semiconductor die.

Abstract: A radio frequency (RF) power amplifier is disclosed. The RF power amplifier includes an impedance transformation circuit, a current unit gain amplifier, and an output match circuit. The impedance transformation circuit receives a first input power signal and outputs a second input power signal correspondingly, wherein the impedance transformation circuit transforms an input impedance to an output impedance according to an impedance matching parameter for increasing power added efficiency of a pre-stage circuit. The current unit gain amplifier provides a linear transimpedance so as to transmit an input current to an output impedance, and then generate a linear output power for increasing power added efficiency of the current unit gain amplifier, wherein the impedance matching parameter is determined by a first system voltage, a second system voltage, and a predetermined power gain value.

Abstract: A device for measuring pressure having at least one pressure sensor with at least one active sensor surface, an oscillating and/or variable temperature counter-surface arranged opposite the at least one sensor surface, wherein the sensor surface and the counter-surface are arranged in a hollow body, and the hollow body has at least one opening, and wherein at least one alternating signal amplifier is provided.

Abstract: An amplifying circuit includes a first transistor configured to convert an input voltage signal to a current signal, a second transistor configured to convert the current signal to an output voltage signal, and a variable active inductor in which resistors and a switch are arranged between a gate and a drain of the second transistor. The amplifying circuit further includes a third transistor configured to draw a current and connected in parallel to the first transistor and a bias circuit configured to control individually a current flowing through the first transistor and a current flowing through the third transistor.

Abstract: A method of testing a one or more components of a data storage system introduces a first plurality of micro-transitions into a first data write pattern, which is then written to a magnetic media. A read-back signal is generated, and a frequency response of the read-back signal is analyzed to determine performance of the one or more components of the data storage system.

Abstract: Devices and methods to reduce adjacent channel power of an amplifier are described. The adjacent channel power can be reduced by considering the third harmonic output from the amplifier, and minimizing such third harmonic amplitude by implementing a phase shifter feedback circuit to the amplifier. The phase shifter feedback circuit can shift the phase of the feedback signal in order to reduce the third harmonic amplitude, which in turn reduces the adjacent channel power.

Abstract: An amplifier includes a negative gain amplifier, a load element, and a transconductance device. The negative gain amplifier has an input and an output. The load element has a first terminal coupled to a power supply voltage terminal, and a second terminal. The transconductance device has a first current electrode coupled to the second terminal of the load element, a control electrode coupled to the output of the negative gain amplifier, and a second current electrode coupled to the input of the negative gain amplifier.

Abstract: An amplifying circuit comprises an analog amplifying circuit having an analog input for receiving an analog input signal to be amplified and an analog output for outputting an amplified analog signal, wherein the amplifying circuit comprises an implementation of a complex transfer function. A feedback circuit has a feedback circuit input and a feedback circuit output, wherein the feedback circuit comprises an implementation of an inverse transfer function that is an estimation of an inverse of at least a DC component of the complex transfer function of the analog amplifying circuit. The feedback circuit input is arranged for receiving a signal that is based on the amplified analog signal of the analog amplifying circuit. The analog circuit is arranged for receiving a bias signal that is based on the feedback circuit output.

Abstract: A circuit and method for filtering adjacent channel interferers. One embodiment of an adjacent channel filtering circuit for reducing adjacent channel interference with an in-band signal, includes: (1) a radio frequency (RF) circuit configured to receive and down-convert an RF signal to a baseband signal containing an in-band signal and adjacent channel components, (2) a controlled single pole filter electrically coupled to the RF circuit and configured to reject the adjacent channel components and cause a predetermined attenuation in the in-band signal, (3) a baseband circuit coupled to the controlled single pole filter and configured to condition the baseband signal for conversion to a digital signal, and (4) a digital circuit coupled to the baseband circuit and configured to receive the digital signal and compensate for the predetermined attenuation.

Abstract: An amplifier circuit amplifies a signal for wireless transmission. A feedback circuit, including a capacitor, is coupled to the amplifier circuit. Components of the feedback circuit are selected based on a feedback factor such that an input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit.

Abstract: A power amplifier system including a composite digital predistorter (DPD) ensuring optimized linearity for the power amplifier is described. In this system, a digital-to-analog converter (DAC), an analog filter, a first mixer, and the power amplifier are serially coupled to the composite DPD. A second mixer, a receive gain block, and an analog-to-digital converter (ADC) are serially coupled to the output of the power amplifier. A DPD training component is coupled between the inputs of the composite DPD and the ADC. The composite DPD includes a memory-based DPD, e.g., a memory polynomial (MP) DPD, a memoryless-linearizing DPD, e.g., a look-up table (LUT) DPD, and two multiplexers.

Abstract: A column readout amplifier and imaging an-ay using the same method are disclosed. The column readout amplifier includes a signal amplifier having an amplifier signal output, a first filter capacitor, a buffer amplifier having a buffer amplifier input and a buffer amplifier output, and a switching network. The switching network connects the amplifier signal output to the buffer amplifier input and the buffer amplifier output to the first filter capacitor during a first time period, and connects the amplifier signal output directly to the first filter capacitor during a second time period. The time periods can be of fixed duration or determined by the difference in potential between the input and output of the buffer amplifier. The column readout amplifier can be used in an imaging array to readout columns of pixels.

Abstract: A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.

Abstract: The present disclosure relates to a front-end system for a radio device, the front-end system comprising a low-noise amplifier (LNA), arranged for receiving a radio frequency input signal (RFIN) and arranged for outputting an amplified radio frequency signal (RFOUT), wherein the low-noise amplifier comprises a first differential amplifier, and a mixer (MIX), arranged for down-converting the amplified radio signal (RFOUT) provided by the low-noise amplifier (LNA) to a baseband signal (BB), by multiplying the amplified radio signal (RFOUT) with a local oscillator (LO) frequency tone, said low-noise amplifier (LNA) and said mixer (MIX) being inductively coupled.

Abstract: An amplifier comprises a power amplifier for amplifying an unmodulated high-frequency input signal, a first branching device which is provided at an input terminal side of the power amplifier and extracts a signal, a second branching device which is provided at an output terminal side of the power amplifier and extracts a signal, a mixer for mixing a signal from the first branching device and a signal from the second branching device, a low-pass filter for removing a frequency band component of the input signal from an output signal of the mixer, a high-pass filter for removing a DC component from an output signal of the low-pass filter, and a wave detector for extracting a signal.

Abstract: Methods and systems for a configurable low-noise amplifier with programmable band-selection filters may comprise a low-noise amplifier (LNA) with a low pass filter coupled to a first input of the LNA and a high pass filter coupled to a second input of the LNA. The low pass filter and the high pass filter may also be coupled to a signal source input. Signals may be received in a pass band of the high pass filter and a pass band of the low pass filter. Input signals in the pass band of the one filter (but not signals in the pass band of the other filter) may be amplified by coupling the one input of the LNA to ground and coupling the other filter to ground utilizing a shunt resistor. The filters may be configurable and may each comprise at least one inductor and at least one capacitor.

Abstract: A distributed amplifier with improved stabilization includes an input transmission circuit, an output transmission circuit, at least one cascade amplifier coupled between said input and output transmission circuits. Each cascade amplifier includes a common-gate configured transistor coupled to the output transmission circuit, and a common-source configured transistor coupled between the input transmission circuit and the common-gate configured transistor. The distributed amplifier also includes a non-parasitic resistance and capacitance coupled in series between a drain and a gate of at least one of the common-gate configured transistors for increasing the amplifier stability.

Abstract: A radio frequency power amplifier amplifies an input signal at an input port, and produces an output signal at an output port. The power amplifier may include one or more amplifier stages. An amplifier stage may include an active device, and a feedback network. The feedback network may include one or more reactive elements configured to resonate at a predetermined frequency, to provide an impedance match at the input to the amplifier stage, and to provide an impedance match at the output of the amplifier stage. In some example implementations, the input and output impedance matching is caused by biasing the active device to produce a transconductance at least one of equal to or greater than a critical transconductance.

Abstract: The present invention provides a sensor system and a corresponding sensing method employing the sensor system. The sensor system comprises a sensor (12) having an input (20) and an output (22), a feedback path (16) from the output to the input, and a filter (14; 92) in the feedback path. The filter comprises a narrow band filter, which is tuned or tunable to a respective one of signals that are wanted signals and signals that represent interference signals. The sensor and the filter are arranged so as to alter the relative amplitudes of the wanted signals and the interference signals in order to increase the relative amplitude of the wanted signals and reduce the relative amplitude of the interference signals.

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract: Circuitry, which includes a package interface, an RF amplification circuit, and a closed-loop phase linearization circuit, is disclosed. The package interface receives an RF signal and provides an amplified RF signal. The RF amplification circuit amplifies the RF signal to generate the amplified RF signal, such that an intermediate RF signal is generated during amplification of the RF signal. The closed-loop phase linearization circuit endogenously establishes a target phase of the amplified RF signal using the RF signal. Further, the closed-loop phase linearization circuit applies a phase-shift to the intermediate RF signal based on a difference between the target phase and a measured phase, which is representative of a phase of the amplified RF signal, wherein the phase-shift reduces phase distortion in the amplified RF signal.

Abstract: A system for power amplifier over-voltage protection includes a power amplifier configured to receive a system voltage, a bias circuit configured to provide a bias signal to the power amplifier, and a power amplifier over-voltage circuit configured to interrupt the bias signal when the system voltage exceeds a predetermined value, while the system voltage remains coupled to the power amplifier.

Abstract: A circuit that includes a Darlington transistor pair having an input transistor and an output transistor configured to generate an output signal at an output node in response to an input signal received through the input node is disclosed. The circuit has a resistor-inductor-capacitor (RLC) type frequency bias feedback network communicatively coupled between the output transistor and the input node for providing biasing to the Darlington transistor pair as well as for adjusting at least one characteristic of an amplified version of the input signal that passes through the input transistor and into the frequency bias network. The circuit further includes a feedback coupling network coupled between the output node and the input node for feeding back to the input node a portion of the amplified version of the input signal that passes through the input transistor.

Abstract: Exemplary embodiments include a frequency modulation (FM) transmitter and a non-FM receiver, which may be implemented on the same IC chip. The FM transmitter may include a digital FM modulator, a lowpass filter, an amplifier, and an LC tank circuit. The digital FM modulator may receive a digital input signal, perform FM modulation with the digital input signal, and provide a digital FM signal. The lowpass filter may filter the digital FM signal and provide a filtered FM signal. The amplifier may amplify the filtered FM signal and provide an output FM signal. The LC tank circuit may filter the output FM signal. The digital FM modulator may perform FM modulation by changing a variable divider ratio of a multi-modulus divider within a PLL. A delta-sigma modulator may receive the digital input signal and generate a modulator output signal used to obtain the variable divider ratio.

Abstract: A high-frequency signal amplifier includes an amplifier having an input terminal and an output terminal, and amplifying a high-frequency signal; a signal line connected between the output terminal of the amplifier and an antenna; coupled lines arranged in parallel and coupled to the signal line and having different line lengths or differently terminated ends; and phase shifters shifting phase of high-frequency signals applied via the signal line and the coupled lines, supplying the high-frequency signals to the input terminal of the amplifier, and having different amounts of phase change.

Abstract: A multiband low noise amplifier (LNA) with parallel resonant feedback includes an amplifier element configured to receive a radio frequency (RF) signal at an RF input and provide an amplified version of the RF signal at an RF output, a resistive feedback circuit coupled between the RF input and the RF output, and a plurality of series-coupled resonant circuits coupled in series with the resistive feedback circuit between the RF input and the RF output of the amplifier element, wherein each of the resonant circuits is configured to operate as an effective short circuit at a frequency other than a resonant frequency and configured to operate as an effective open circuit at the resonant frequency to decouple the resistive feedback from the amplifier element at each resonant frequency.

Abstract: An amplifier circuit amplifies a signal for wireless transmission. A feedback circuit, including a capacitor, is coupled to the amplifier circuit. Components of the feedback circuit are selected based on a feedback factor such that an input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit.

Abstract: A direct current (DC)-DC converter that includes a first switching converter and a multi-stage filter is disclosed. The multi-stage filter includes at least a first inductance (L) capacitance (C) filter and a second LC filter coupled in series between the first switching converter and a DC-DC converter output. The first LC filter has a first LC time constant and the second LC filter has a second LC time constant, which is less than the first LC time constant. The first switching converter and the multi-stage filter form a feedback loop, which is used to regulate the first switching power supply output signal based on the setpoint. The first LC filter includes a first capacitive element having a first self-resonant frequency, which is about equal to a first notch frequency of the multi-stage filter.

Abstract: In one embodiment, an apparatus includes an amplifier circuit having a phase shift. The amplifier circuit amplifies a signal for wireless transmission. A feedback circuit is coupled to the amplifier circuit and includes a capacitor. An input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit. A total phase shift of the signal for the amplifier circuit and the feedback circuit is less than a threshold.

Abstract: A circuit that includes a Darlington transistor pair having an input transistor and an output transistor configured to generate an output signal at an output node in response to an input signal received through the input node is disclosed. The circuit has a resistor-inductor-capacitor (RLC) type frequency bias feedback network communicatively coupled between the output transistor and the input node for providing biasing to the Darlington transistor pair as well as for adjusting at least one characteristic of an amplified version of the input signal that passes through the input transistor and into the frequency bias network. The circuit further includes a feedback coupling network coupled between the output node and the input node for feeding back to the input node a portion of the amplified version of the input signal that passes through the input transistor.

Abstract: A variable gain amplifier includes an integrator having an input, an output and a feedback loop connected between the input and output, a plurality of input chains connected in parallel between the amplifier input and the input of the integrator, each input chain including a resistor and a first switch and a plurality of second switches, each second switch connected between an intermediate node between the resistor and first switch of a respective input chain and the feedback loop of the integrator, wherein the resistance of the resistors in the input chains is scaled by a scaling factor with respect to one another and the on-resistances of the first and second switches connected to each intermediate node are scaled by the corresponding scaling factor.

Abstract: A circuit that includes a Darlington transistor pair having an input transistor and an output transistor configured to generate an output signal at an output node in response to an input signal received through the input node is disclosed. The circuit has a frequency bias feedback network communicatively coupled between the output transistor and the input node for providing biasing to the Darlington transistor pair as well as for adjusting a phase and amplitude of an amplified version of the input signal that passes through the input transistor and into the frequency bias network. The circuit further includes a feedback coupling network coupled between the output node and the input node for feeding back to the input node a portion of the amplified version of the input signal that passes through the input transistor.

Abstract: An integrator circuit cancels a DC offset component related to an average DC value of a burst mode input signal from the output of an amplifier. The integrator circuit outputs an average DC value of the input signal in a response time that is shorter than the preamble of a burst mode signal. The integrator output signal remains stable within selected amplitude limits for a length of time corresponding to the data portion of a burst mode signal. A transimpedance amplifier embodiment of the invention comprises a TIA gain stage, an integrator, and a voltage-controlled current course. Other embodiments comprise an amplifier for converting single-ended input signals to differential output signals, an amplifier for differential output offset cancellation, a monolithic semiconductor integrated circuit die, and a packaged semiconductor integrated circuit device.

Abstract: A low noise amplifying (LNA) circuit comprising an amplifying section (11, 12) and a feedback means (14) arranged for providing input matching from the output to the input. The LNA circuit further comprises at least one frequency band determining inductor (15) having a predetermined resonance frequency for influencing at least one frequency band in which the amplifying section operates. The at least one inductor is directly connected to the output of the circuit and the feedback means (14) provides a feedback connection for the section (s) to the input. In this way, the at least one frequency band in which the amplifying section operates is substantially completely determined by the at least one frequency band determining inductor (15).

Abstract: An amplifier circuit includes an amplifier including an inverting input that communicates with an input signal, a non-inverting input, and an output. A first feedback path communicates with the inverting input and the output of the amplifier. A second feedback path communicates with the inverting input and the output of the amplifier. The first feedback path provides feedback at a lower frequency than the second feedback path. A first resistance has one end that communicates with the output of the amplifier. A first capacitance has one end that communicates with an opposite end of the load resistance. A second resistance has one end that communicates with the inverting input and an opposite end that communicates with the opposite end of the first resistance.

Abstract: An input stage for an instrumentation system may include a resistor coupled between an input terminal and a summing node, and an amplifier arranged to maintain the voltage at the summing node. In anther embodiment, an instrumentation input system may include an input stage to receive a signal to be measured, and a variable gain amplifier having an input coupled to an output of the input stage, wherein the variable gain amplifier comprises two or more gain stages. A variable gain amplifier may include an attenuator having an input and a series of tap points and a series of low-inertia switches to steer outputs from the attenuator to an output terminal.

Abstract: An integrated circuit includes a linearizer circuit in which excessive delay is compensated. The linearizer circuit includes a power amplifier, forward and feedback paths, and a microprocessor. A signal from the power amplifier is routed by the forward path to be transmitted while a portion of the signal to be transmitted is routed back to the power amplifier via the feedback path. The microprocessor applies phase training signals to the forward path. The microprocessor uses the phase training signals to determine the amount of delay in the linearizer circuit and alters the frequency position of poles and zeros in the linearizer circuit to compensate for the delay. The gain of the linearizer circuit is also altered by the microprocessor depending on the measured delay.

Abstract: A circuit that includes a Darlington transistor pair having an input transistor and an output transistor configured to generate an output signal at an output node in response to an input signal received through the input node is disclosed. The circuit has a frequency bias feedback network communicatively coupled between the output transistor and the input node for providing biasing to the Darlington transistor pair as well as for adjusting a phase and amplitude of an amplified version of the input signal that passes through the input transistor and into the frequency bias network. The circuit further includes a feedback coupling network coupled between the output node and the input node for feeding back to the input node a portion of the amplified version of the input signal that passes through the input transistor.

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract: An amplifying circuit arranged for converting an input signal into an amplified output signal comprising: an input node (11) at an input side of said circuit for receiving said input signal (pi); an output node (9) at an output side of said circuit for outputting said amplified output signal (io); a first gain element (M1) connected between said input and output nodes and provided for converting an input voltage taken from said input signal into a current for forming said amplified output signal; a negative feedback loop (3) over said first gain element, said negative feedback loop having first elements (5, 6) arranged for providing input matching; and a positive feedback loop (2) over said first gain element, said positive feedback loop having second elements (7, 8) arranged for providing additional input matching and gain enhancement of said first gain element.

Abstract: Techniques for sequencing switched single capacitor for automatic equalization of batteries connected in series are described herein. In one embodiment, a battery equalizer includes a single capacitor, at least two switching circuits to be coupled to each of at least two batteries coupled in series. The battery equalizer further includes at least two driver circuits corresponding the at least two switching circuits and a controller. The controller is programmed to control the driver circuits in order to drive the switching circuits to sequentially couple the single capacitor to one of the batteries coupled in series during charging and/or discharging of the batteries. Only one of the switching circuits is turned on at a given time such that only one of the batteries is coupled to the single capacitor at the given time. Other methods and apparatuses are also described.

Abstract: An operational amplifier includes, between an input and an output of an operational amplifier (an operational amplification stage) 10, a feedback capacitor 34 connected in negative feedback, a phase control circuit 100 having a resistor element (a resistor unit) 30 connected in series to the feedback capacitor 34. Load capacitors (load units) 32 are connected on the output side of the operational amplifier 10 and driven by an output signal from the operational amplifier 10. In a case that the capacitance values of the load capacitor 32 and 33 are increased and the phase margin of the operational amplifier becomes excessive in comparison with the optimum value, a resistance value RO of the resistor element 30 is increased to control the phase margin of the operational amplifier so as to fall within the optimum range, and thus accelerated settling properties are realized.