Including Signal Feedback Means Patents (Class 330/291)
  • Patent number: 10164580
    Abstract: A gate bias circuit for a plurality of GaAs amplifier stages is a transistor coupled to a temperature compensation current received from a CMOS control stage. A plurality of pHEMPT amplifier stages are coupled to the gate bias circuit and to a control voltage which switches the amplifier stage. A selectively controlled stage pass transistor enables a current mirror between the gate bias circuit and each stage amplifying transistor. The penultimate pHEMPT amplifier stage is coupled to a CMOS amplifier. A CMOS circuit provides both the temperature compensation current by a proportional to absolute temperature (PTAT) circuit and the control voltage enabling each pHEMPT transistor to receive its input signal in combination with the gate bias voltage.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: December 25, 2018
    Inventors: James Wang, Yuh-Min Lin, Kun-You Lin
  • Patent number: 9813934
    Abstract: One disclosure of the present specification provides a wireless device for supporting a first band for cellular communications and a second band for D2D communications. The wireless device may comprising: a main antenna; a first RF chain configured to process a first transmission signal and a second transmission signal wherein the first and second transmission signals are to be transmitted via the main antenna using uplink bands of the first and second bands respectively; a second RF chain configured to process a first reception signal, wherein the first reception signal is received via the main antenna using an uplink band of the second band; a third RF chain configured to process a second reception signal, wherein the second reception signal is received via the main antenna using a downlink band of the first band.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: November 7, 2017
    Assignee: LG ELECTRONICS INC.
    Inventors: Suhwan Lim, Sangwook Lee, Jongkil Shin, Dongik Lee
  • Patent number: 9602059
    Abstract: An amplifier has an input port for receiving an input signal and an envelope port for receiving an envelope signal indicative of an envelope of the input signal, and an output port for delivering an amplified signal. The amplifier has a first transistor and a second transistor. A first biasing circuit is coupled to the envelope port and is arranged to generate a first bias voltage dependent on the envelope signal. A summing stage is coupled to the input port for receiving the input signal, to the first biasing circuit for receiving the first bias voltage, and to the gate of the first transistor. A second biasing circuit is coupled between the envelope port and the gate of the second transistor, and is arranged to generate a second bias voltage dependent on the envelope signal.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: March 21, 2017
    Assignee: OPTIS CIRCUIT TECHNOLOGY, LLC
    Inventor: Vincent Knopik
  • Patent number: 9151604
    Abstract: A non-saturating receiver design and clamping structure for high power laser rangefinders of especial utility with respect to pumped, monoblock lasers. The receiver comprises a photodiode and a transimpedance amplifier having at least first and second stages. The first stage comprises a field effect transistor and the second stage comprises a non-saturating, non-inverting amplification stage including a differential pair of bipolar transistors having a feedback path coupling the second stage to the input of the first stage. A clamping structure for the receiver comprises a resistor coupling a cathode of the photodiode to a first voltage input and a clamping diode also coupling the cathode to a second lower voltage input. A capacitor having a capacitance Cs couples the cathode of the photodiode to a reference voltage line, wherein the capacitance Cs is greater than the capacitance of the photodiode CD.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: October 6, 2015
    Assignees: Laser Technology, Inc., Kama-Tech (HK) Limited
    Inventor: Jeremy G. Dunne
  • Publication number: 20150145599
    Abstract: A radio frequency signal amplifying system includes an amplifier having an input terminal and an output terminal, an attenuator electrically connected to the input terminal of the amplifier, a peak power detecting module configured to apply a peak power attenuation signal to the attenuator by taking a peak power level of an input signal into consideration, and an average power detecting module configured to apply an average power attenuation signal to the attenuator by taking an average power level of an output signal from the output terminal into consideration. The attenuator is configured to generate the attenuated signal to the input terminal of the amplifier by taking the peak power attenuation signal, the average power attenuation signal, or the combination thereof into consideration.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 28, 2015
    Applicant: MICROELECTRONICS TECHNOLOGY, INC.
    Inventor: Ming Che LIOU
  • Patent number: 9042487
    Abstract: Apparatus and methods disclosed herein perform gain, clipping, and phase compensation in the presence of I/Q mismatch in quadrature RF receivers. Gain and phase mismatch are exacerbated by differences in clipping between I & Q signals in low resolution ADCs. Signals in the stronger channel arm are clipped differentially more than weaker signals in the other channel arm. Embodiments herein perform clipping operations during iterations of gain mismatch calculations in order to balance clipping between the I and Q channel arms. Gain compensation coefficients are iteratively converged, clipping levels are established, and data flowing through the network is gain and clipping compensated. A compensation phase angle and phase compensation coefficients are then determined from gain and clipping compensated sample data. The resulting phase compensation coefficients are applied to the gain and clipping corrected receiver data to yield a gain, clipping, and phase compensated data stream.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: May 26, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ganesan Raghu, Bijoy Bhukania, Jaiganesh Balakrishnan
  • Publication number: 20150116038
    Abstract: This document discusses, among other things, a resistance multiplier configured to provide a more specific and controllable resistance value, the resistance multiplier including an amplifier configured to control a resistance across a first transistor using a received reference resistance value and to control a resistance across a second transistor using the resistance across the first transistor and a relationship between the first and second transistors.
    Type: Application
    Filed: October 27, 2014
    Publication date: April 30, 2015
    Inventor: Juha-Matti Kujala
  • Publication number: 20150091650
    Abstract: A variable feedback impedance is presented capable of providing high linearity (e.g. as represented by 1P2 and 1P3) and high linear range (e.g. as represented by P1dB) when used in a feedback path of an RF amplifier in the presence of high voltage amplitudes.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: PEREGRINE SEMICONDUCTOR CORPORATION
    Inventors: Dan William Nobbe, Jianhua Lu
  • Publication number: 20150084690
    Abstract: A system includes a weighting element, a transconductance circuit, a feedback loop, and an auxiliary loop. In some implementations, the transconductance circuit may accept an input and provide a first portion of an output for amplification at a variable amplification level to generate an amplifier output. The feedback loop may provide a portion of the amplifier output as a first feedback to the input. The first feedback may be associated with an impedance that may vary with the amplification level. The auxiliary loop may provide a second feedback to the input to reduce the dependence of the impedance on the amplification level.
    Type: Application
    Filed: October 9, 2013
    Publication date: March 26, 2015
    Applicant: Broadcom Corporation
    Inventors: Giuseppe Cusmai, Vijayaramalingam Periasamy, Xi Chen, Ramon Alejandro Gomez
  • Patent number: 8989307
    Abstract: A power amplifier system including a composite digital predistorter (DPD) ensuring optimized linearity for the power amplifier is described. In this system, a digital-to-analog converter (DAC), an analog filter, a first mixer, and the power amplifier are serially coupled to the composite DPD. A second mixer, a receive gain block, and an analog-to-digital converter (ADC) are serially coupled to the output of the power amplifier. A DPD training component is coupled between the inputs of the composite DPD and the ADC. The composite DPD includes a memory-based DPD, e.g., a memory polynomial (MP) DPD, a memoryless-linearizing DPD, e.g., a look-up table (LUT) DPD, and two multiplexers.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: March 24, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Hao Zhou, Ning Zhang
  • Publication number: 20150070092
    Abstract: A power amplifier module includes a first amplification transistor that amplifies and outputs a radio frequency signal, a second amplification transistor that is connected in parallel to the first amplification transistor and that has a smaller size than the first amplification transistor, a bias circuit that supplies a bias voltage or a bias current to the first and second amplification transistors, a current detector circuit that detects a current flowing in the second amplification transistor, and a bias control circuit that controls the bias voltage or the bias current supplied from the bias circuit to the first and second amplification transistors depending on the detection result of the current detector circuit.
    Type: Application
    Filed: November 13, 2014
    Publication date: March 12, 2015
    Inventors: Kazuhiko Ishimoto, Takashi Soga
  • Publication number: 20150067416
    Abstract: To set an optimum offset voltage and detect an NRZ signal with a very small amplitude. An NRZ signal amplifying device 2 includes: input-side voltage detection means 13 for detecting a high-level voltage and a low-level voltage of an input signal to the main amplifier 12; output-side voltage detection means 14 for detecting the two signals inverted relative to each other; and offset voltage control means 15 for calculating a center voltage between the detected high-level voltage and low-level voltage, setting an offset voltage at which the center voltage is the center of an appropriate input range of the main amplifier 12 to the offset circuit 11, and finely adjusting the offset voltage, such that a voltage difference between the detected two signals inverted relative to each other and a polarity change point is close to 0.
    Type: Application
    Filed: June 25, 2014
    Publication date: March 5, 2015
    Inventors: Wataru AOBA, Kazuhiro FUJINUMA, Takeshi WADA
  • Publication number: 20150061774
    Abstract: The digital predistortion system and method with extended correction bandwidth includes a predistortion system that uses a two-box architecture based on the cascade of a memory polynomial followed by a memoryless predistortion function. The memoryless predistorter is identified offline and used to perform a coarse linearization which cancels out most of the static nonlinearity of the device under test allowing for a reduced observation bandwidth for the synthesis of the memory polynomial predistortion sub-function.
    Type: Application
    Filed: November 10, 2014
    Publication date: March 5, 2015
    Inventor: OUALID HAMMI
  • Publication number: 20150061773
    Abstract: A digital predistortion apparatus comprising: a nonlinear device; a memory effect compensator; a constant value characteristic acquirer; a cost function generator; and a coefficient updater is described.
    Type: Application
    Filed: July 31, 2014
    Publication date: March 5, 2015
    Inventors: Zhan SHI, Hui LI, Jianmin ZHOU, Takanori IWAMATSU
  • Patent number: 8971831
    Abstract: The present disclosure relates to a front-end system for a radio device, the front-end system comprising a low-noise amplifier (LNA), arranged for receiving a radio frequency input signal (RFIN) and arranged for outputting an amplified radio frequency signal (RFOUT), wherein the low-noise amplifier comprises a first differential amplifier, and a mixer (MIX), arranged for down-converting the amplified radio signal (RFOUT) provided by the low-noise amplifier (LNA) to a baseband signal (BB), by multiplying the amplified radio signal (RFOUT) with a local oscillator (LO) frequency tone, said low-noise amplifier (LNA) and said mixer (MIX) being inductively coupled.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: March 3, 2015
    Assignee: IMEC
    Inventors: Vojkan Vidojkovic, Kristof Vaesen, Piet Wambacq
  • Patent number: 8970307
    Abstract: Techniques for monitoring and controlling bias current of amplifiers are described. In an exemplary design, an apparatus may include an amplifier and a bias circuit. The amplifier may include at least one transistor coupled to an inductor. The bias circuit may generate at least one bias voltage for the at least one transistor in the amplifier to obtain a target bias current for the amplifier. The bias circuit may generate the at least one bias voltage based on a voltage across the inductor in the amplifier, or a current through a current mirror formed with one of the at least one transistor in the amplifier, or a gate-to-source voltage of one of the at least one transistor in the amplifier, or a voltage in a replica circuit replicating the amplifier, or a current applied to the amplifier with a switched mode power supply disabled.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: March 3, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Thomas Domenick Marra, Aristotele Hadjichristos, Nathan M Pletcher
  • Publication number: 20150054585
    Abstract: A pre-distortion method includes: receiving an input data; and obtaining a pre-distortion output by inputting the input data into a pre-distortion function, wherein the pre-distortion function is determined according to a following power amplifier; and multiplying a reciprocal of a pre-distortion ratio of the output of the power amplifier to the input data by the output of the power amplifier. A pre-distortion apparatus includes a receiver, a pre-distortion unit and a gain compensating unit. The receiver is utilized for receiving an input data. The pre-distortion unit is utilized for obtaining a pre-distortion output by inputting the input data into a pre-distortion function, wherein the pre-distortion function is determined according to a following power amplifier. The gain compensating unit is utilized for multiplying a reciprocal of a pre-distortion ratio of the output of the power amplifier to the input data by the output of the power amplifier.
    Type: Application
    Filed: August 12, 2014
    Publication date: February 26, 2015
    Inventor: Yuan-Shuo Chang
  • Publication number: 20150054584
    Abstract: A signal generation apparatus includes a digital-to-analog converter, a bias stage and a class AB output stage. The digital-to-analog converter is arranged for outputting a current as an input signal. The bias stage is coupled to the digital-to-analog converter, and is arranged for generating a bias signal according to at least the input signal. The class AB output stage is coupled to the bias stage, and is arranged for generating an output signal at an output node of the signal generation apparatus according to the bias signal, wherein the output signal includes a first signal component and a second signal component, both the first signal component and the second signal component correspond to the input signal, and there is a linear relation between the output signal and the input signal.
    Type: Application
    Filed: August 22, 2013
    Publication date: February 26, 2015
    Applicant: MEDIATEK INC.
    Inventor: Wen-Hua Chang
  • Patent number: 8965322
    Abstract: A low noise amplifier comprises at least one amplifying transistor (Ts1; Ts2) configured in a common source configuration to receive an input signal (RFin) at a gate terminal and provide an amplified signal at a drain terminal and at least one feedback path arranged to couple a part of the amplified signal back to the gate terminal and comprising a feedback impedance. The low noise amplifier further comprises a self-coupled step-up transformer having at least one primary winding (Lp) connected to a supply voltage (Vdd) and the drain terminal of the at least one amplifying transistor and at least one self-coupled secondary inductor winding (Lf1; Lf2) arranged in the feedback path. The low noise amplifier provides a better suppression for out-band interference and at the same time it has a wider input match bandwidth, decent conversion gain and decent noise figure without increasing power consumption.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: February 24, 2015
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventor: Fenghao Mu
  • Publication number: 20150048890
    Abstract: A radio communication circuit includes a power amplifier configured to amplify a signal and output the amplified signal, an envelope detector configured to extract an envelope of an input signal inputted to the power amplifier, an offset generator configured to generate an offset value for a power supply voltage to be applied to the power amplifier, based on a distortion amount in an output signal from the power amplifier, and a power supply voltage modulator configured to control the power supply voltage to be applied to the power amplifier based on the envelope extracted and the offset value generated.
    Type: Application
    Filed: August 4, 2014
    Publication date: February 19, 2015
    Inventors: Yasuaki TAKEUCHI, Yusuke YAMAMORI, Yasuhiro MURAKAMI, Takashi TANII, Mikio HAYASHIHARA
  • Publication number: 20150048889
    Abstract: An ultra-wideband low-noise amplifier circuit with low power consumption includes a cascode amplifier circuit module and an output combining circuit module. The cascode amplifier circuit module receives an input signal, and outputs a first output signal and a second output signal. The output combining circuit module receives the first output signal and the second output signal, and applies respective phase shifts to the first output signal and the second output signal for reducing a phase difference between the first output signal and the second output signal, so as to obtain a combined output signal.
    Type: Application
    Filed: January 29, 2014
    Publication date: February 19, 2015
    Applicant: National Chi Nan University
    Inventors: Yo-Sheng LIN, Lun-Ci LIU, Chia-Hsing WU
  • Publication number: 20150035602
    Abstract: A noise-canceling LNA circuit for amplifying signals at an operating frequency f in a receiver circuit is disclosed. The LNA circuit comprises a first and a second amplifier branch, each having an input terminal connected to an input terminal of the LNA circuit. The first amplifier branch comprises an output terminal for supplying an output current of the first amplifier branch and a common source or common emitter main amplifier. The main amplifier has an input transistor having a first terminal, which is a gate or base terminal, operatively connected to the input terminal of the first amplifier branch, a shunt-feedback capacitor operatively connected between the first terminal of the input transistor and a second terminal, which is a drain or collector terminal, of the input transistor, and an output capacitor operatively connected between the second terminal of the input transistor and the output terminal of the first amplifier branch.
    Type: Application
    Filed: January 25, 2013
    Publication date: February 5, 2015
    Inventors: Sven Mattisson, Stefan Andersson
  • Publication number: 20150035603
    Abstract: The present application discloses a feed-forward amplifier device and the method thereof. The device comprises: a splitter for splitting an input signal into two portions; a non-linear amplifier for amplifying the input signal and producing inter-modulation products; a carrier canceling unit for generating pure inter-modulation products; a linear amplifier for amplifying the pure inter-modulation products; and a coupler for generating final output signal by counteracting the inter-modulation products with the amplified pure inter-modulation products; wherein the splitter and the carrier canceling unit are provided in digital base band. According to the present disclosure, pure inter-modulation products can be generated and adjusted more flexibly and more accurately in digital base band, and hence ideal output signal may be generated.
    Type: Application
    Filed: February 24, 2012
    Publication date: February 5, 2015
    Applicant: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Xiang Zeng, Changjiang Yang, Tao Huang
  • Publication number: 20150022269
    Abstract: A method for controlling an input signal of a power amplifier is provided. The method comprise applying CFR to the input signal to obtain a processed input signal; determining a minimum CFR threshold; comparing the peak power of the power amplifier and an allowable peak power; and if the peak power is below the allowable peak power, determining a final CFR threshold by increasing the minimum CFR threshold, or if the peak power is not below the allowable peak power, reducing the average output power until peak power reaches the allowable peak power.
    Type: Application
    Filed: February 22, 2012
    Publication date: January 22, 2015
    Applicant: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Tao Huang, Changjiang Yang, Xiang Zeng
  • Publication number: 20150015339
    Abstract: An RF power amplifier circuit and input power limiter circuits are disclosed. A power detector generates a voltage output proportional to a power level of an input signal. There is a directional coupler with a first port connected to a transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector. A first power amplifier stage with an input is connected to the input matching network and an output is connected to the transmit signal output. A control circuit connected to the power detector generates a gain reduction signal based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal. Overall gain of the RF power amplifier circuit is reduced based upon the gain reduction signal that adjusts the configurations of the circuit components.
    Type: Application
    Filed: July 9, 2014
    Publication date: January 15, 2015
    Applicant: RFAXIS, INC.
    Inventors: OLEKSANDR GORBACHOV, HUAN ZHAO, LISETTE L. ZHANG, LOTHAR MUSIOL, YONGXI QIAN
  • Publication number: 20140375388
    Abstract: A power supply system includes a high-speed power supply providing a first output, operating in conjunction with an externally supplied DC source or low frequency power supply which provides a second output. A frequency blocking power combiner circuit combines the first and second outputs to generate a third output in order to drive a load, while providing frequency-selective isolation between the first and second outputs. A feedback circuit coupled to the combined, third output compares this combined, third output with a predetermined control signal and generates a control signal for controlling the high-speed power supply, based on a difference between the third output and the predetermined control signal. The feedback circuit does not control the DC source or the low frequency power supply, but controls only the high-speed power supply.
    Type: Application
    Filed: September 9, 2014
    Publication date: December 25, 2014
    Inventors: Serge Francois Drogi, Martin Tomasz
  • Publication number: 20140354252
    Abstract: Apparatuses and methods are provided where a predefined voltage may be applied in a feedback circuit of a voltage regulator, the feedback circuit coupling and output terminal with an adjust terminal of the voltage regulator.
    Type: Application
    Filed: May 30, 2013
    Publication date: December 4, 2014
    Inventors: Thomas Jackum, Nicola Da Dalt, Andrea Cristofoli
  • Publication number: 20140347132
    Abstract: A power amplifier apparatus includes an amplifier configured to amplify an input signal converted into an analog signal, a distortion compensator circuitry configured to perform a pre-distortion process to an input signal at a second sampling rate higher than a first sampling rate at which the input signal is converted into an analog signal, a remover configured to remove a frequency component exceeding a frequency band corresponding to the first sampling rate from the input signal subjected to the pre-distortion process, a first rate converter configured to convert a sampling rate of the input signal from which the frequency component is removed from the second sampling rate to the first sampling rate, and a first signal converter configured to convert the input signal the sampling rate of which is converted into an analog signal at the first sampling rate to supply the input signal converted into the analog signal to the amplifier.
    Type: Application
    Filed: May 19, 2014
    Publication date: November 27, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Toshio KAWASAKI, Hiroyoshi Ishikawa, Kazuo Nagatani, Yuichi Utsunomiya, Alexander Nikolaevich Lozhkin, Hajime Hamada
  • Publication number: 20140340155
    Abstract: Systems and methods are provided for adaptive linearization of an amplifier system having a plurality of heterogeneous amplifier paths. An amplifier system includes a plurality of amplifier paths, each configured to provide an amplified output signal from an input signal, and a signal combiner configured to combine the amplified output signals from the plurality of amplifier paths to provide a system output, such that the system output is a non-linear function of the amplified output signals. A monitoring system is configured to sample the system output and normalize the sampled output to a signal level associated with the input signal. A signal processing component is configured to characterize the amplifier paths via an iterative adaptive linearization process, such that the system output is linear with respect to the input signal.
    Type: Application
    Filed: March 15, 2013
    Publication date: November 20, 2014
    Applicant: HBC SOLUTIONS, INC.
    Inventor: HBC SOLUTIONS, INC.
  • Publication number: 20140306763
    Abstract: An integrated circuit is described for providing a power supply to a radio frequency (RF) power amplifier (PA). The integrated circuit comprises a low-frequency power supply path comprising a switching regulator and a high-frequency power supply path arranged to regulate an output voltage of a combined power supply at an output port of the integrated circuit for coupling to a load. The combined power supply is provided by the low-frequency power supply path and high-frequency power supply path. The high-frequency power supply path comprises: an amplifier comprising a voltage feedback and arranged to drive a power supply signal on the high-frequency power supply path; and a high-frequency-path supply module arranged to provide a high frequency supply to drive the amplifier, where the high-frequency-path supply module comprises a pulse-width modulator operably coupled to the high frequency supply via a filter and arranged to provide a filtered pulse-width modulated signal to the high frequency supply.
    Type: Application
    Filed: June 26, 2014
    Publication date: October 16, 2014
    Inventors: Hao-Ping Hong, Patrick Stanley Riehl
  • Publication number: 20140306762
    Abstract: A power amplifier system includes an input operable to receive an original value that reflects information to be communicated and an address data former operable to generate a digital lookup table key. The power amplifier system also includes a predistortion lookup table coupled to the address data former and a power amplifier having an output and coupled to the predistortion lookup table. The power amplifier system further includes a feedback loop providing a signal associated with the output of the power amplifier to the predistortion lookup table and a switch disposed in the feedback loop and operable to disconnect the predistortion lookup table from the output of the power amplifier.
    Type: Application
    Filed: April 4, 2014
    Publication date: October 16, 2014
    Applicant: DALI SYSTEMS CO. LTD.
    Inventors: Dali Yang, Jia Yang
  • Publication number: 20140300420
    Abstract: An analog feedback amplifier is capable of suppressing extraneous phase fluctuations and broadening a bandwidth by preventing effects of a group delay element by using an amplitude regulator 21 and a delay line 24.
    Type: Application
    Filed: December 26, 2011
    Publication date: October 9, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tatsuo Kohama, Kenichi Horiguchi, Morishige Hieda
  • Publication number: 20140300417
    Abstract: Amplifiers with boosted or deboosted source degeneration inductance are disclosed. In an exemplary design, an apparatus includes an amplifier circuit and a feedback circuit. The amplifier circuit receives an input signal and provides an output signal and includes a source degeneration inductor. The feedback circuit is coupled between a node of the amplifier circuit and the source degeneration inductor. The feedback circuit provides feedback to vary an input impedance of an amplifier including the amplifier circuit and the feedback circuit. The feedback circuit may be programmable and may be enabled to provide feedback or disabled to provide no feedback. Alternatively, the feedback circuit may always be enabled to provide feedback. In either case, the feedback circuit may have a variable gain to provide a variable input impedance for the amplifier.
    Type: Application
    Filed: April 4, 2013
    Publication date: October 9, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Rui Xu, Li-Chung Chang
  • Patent number: 8856857
    Abstract: This technique relates to a receiving device, a receiving method, and a program that can demodulate transmitted signals with high accuracy. A receiving device of this disclosure includes: an amplifying unit that amplifies a received signal; an adjusting unit that adjusts gain of the amplifying unit in accordance with power of the signal; a demodulating unit that demodulates the amplified signal; and a detecting unit that detects an interval from the signal, information having the same content continuously appearing in the interval. The adjusting unit restricts the process of adjusting the gain of the amplifying unit in accordance with a result of the detection of the interval. This disclosure can be applied to receiving devices that receive broadcast signals compliant with DVB-C2 via a CATV network.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: October 7, 2014
    Assignee: Sony Corporation
    Inventors: Kenichi Kobayashi, Naoki Yoshimochi
  • Publication number: 20140292412
    Abstract: A device and method of predistortion linearization that account for both EVM and spectral mask are disclosed. The device and method are based on transforming the predistorter optimization problem from the time domain to the frequency domain, and weighting the equations according to one or more desired objectives. One objective focuses on abiding by the spectral mask, whereas another objective focuses on improving the EVM.
    Type: Application
    Filed: August 30, 2011
    Publication date: October 2, 2014
    Applicant: DSP GROUP LTD.
    Inventors: Ariel Feldman, Udi Suissa
  • Publication number: 20140266458
    Abstract: The disclosure provides a communication circuit including an amplification circuit, a replicator circuit, and a correction circuit. Specifically, the amplification circuit generates an amplified signal. The replicator circuit emulates the amplification circuit and generates a replicated signal that approximates the amplified signal. The replicated signal is used by the correction circuit to generate control signals for controlling the amplification circuit.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 18, 2014
    Applicant: RF Micro Devices (Cayman Islands), Ltd.
    Inventors: Baker Scott, Dirk Robert Walter Leipold, George Maxim
  • Publication number: 20140266457
    Abstract: Embodiments of a radio frequency (RF) amplification device having an RF amplification circuit and an amplifier control circuit operably associated with the RF amplification circuit are disclosed. The RF amplification circuit is configured to amplify an RF signal in accordance with a transfer function. The amplifier control circuit includes a closed-loop linearization circuit and a calibration circuit. The closed-loop linearization circuit is configured to be activated so that the transfer function defines a closed-loop response and inactive so that the transfer function defines an open-loop response. For example, the closed-loop linearization circuit may become inactive at small-signal power levels. Accordingly, the amplifier control circuit also includes a calibration circuit configured to reduce a difference between the open-loop response and the closed-loop response of the transfer function.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 18, 2014
    Applicant: RF Micro Devices (Cayman Islands), Ltd.
    Inventors: Baker Scott, George Maxim, Dirk Robert Walter Leipold
  • Publication number: 20140266456
    Abstract: A device for controlling operation of a power amplifier includes a detector, a reference signal generator and a controller. The detector is configured to detect a voltage level of an output signal of the power amplifier with respect to a predetermined boost threshold and to generate a corresponding detection signal and a reference signal. The controller is configured to provide a supply voltage to an output transistor of the power amplifier based on a comparison of the detection signal and the reference signal, the supply voltage being a no boost voltage, which is substantially the same as a supply voltage, when the comparison indicates that the voltage level is within the predetermined boost threshold, and the supply voltage being one of multiple boost voltages when the detection signal indicates that the voltage level is beyond the predetermined boost threshold. The controller generates the boost voltages by boosting the supply voltage.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventor: Avago Technologies General IP (Singapore) Pte. Ltd.
  • Publication number: 20140253244
    Abstract: This disclosure relates generally to power amplification devices and methods of operating the same. The power amplification devices are capable of reducing (and possibly cancelling) modulation of a ripple variation of a supply voltage level of a supply voltage onto a radio frequency (RF) signal. In one embodiment, a power amplification device includes a power amplification circuit configured to amplify an RF signal with a supply voltage such that a ripple variation in a supply voltage level of the supply voltage is modulated onto the RF signal in accordance with a conversion gain. However, the power amplification device also includes a plurality of ripple rejection circuits. The plurality of ripple rejection circuits is configured to produce phase shifts and one or more amplitude shifts in the RF signal so as to reduce the conversion gain of the power amplification circuit.
    Type: Application
    Filed: March 10, 2014
    Publication date: September 11, 2014
    Applicant: RF Micro Devices, Inc.
    Inventor: Andrew F. Folkmann
  • Patent number: 8823458
    Abstract: A cascode circuit includes a first transistor and a second transistor. The first transistor and the second transistor are connected to make a cascode. In addition, the circuit has a block capacitance which is connected between a control terminal of the second transistor and a source terminal of the first transistor. In addition, the circuit has a feedback element which is connected between a drain terminal of the second transistor and a control terminal of the first transistor.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: September 2, 2014
    Assignee: Intel Mobile Communications GmbH
    Inventors: Stephan Leuschner, Jan-Erik Mueller
  • Patent number: 8804873
    Abstract: A communication system (20) includes a transmitter (22) having a peak controller (38) which controls PAPR to operate in accordance with a noise constraint. A backoff controller (60) operates in conjunction with an amplifier section (46) to cause the amplifier section (46) to maximize the amplification it applies while maintaining a predetermined degree of amplifier linearity. The noise constraint is provided by an equilibrium estimator (64) that provides a noise target parameter (66) to the peak controller (38). The noise target parameter (66) is configured to identify the transmitter's equilibrium point (126). The equilibrium point (126) is that signal-to-noise ratio (SNR) for the signal (26) broadcast from the transmitter (22) where a demodulator (118) in a receiver (24) will experience a reduced SNR if the transmitted signal (26) SNR either increases or decreases.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: August 12, 2014
    Assignee: CrestCom, Inc.
    Inventor: Ronald Duane McCallister
  • Patent number: 8791755
    Abstract: A self-oscillating driver circuit includes a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path includes a feedforward filter which is designed as an active filter. In order to prevent an oscillatory state of the driver circuit at an unwanted frequency, it is proposed that an internal state variable of the feedforward filter be monitored and that the feedforward filter be reset if the value of the monitored internal state variable is outside a predefined range.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: July 29, 2014
    Assignee: Lantiq Deutschland GmbH
    Inventors: Dario Giotta, Thomas Poctscher, David San Segundo Bello, Andreas Wiesbauer
  • Patent number: 8774258
    Abstract: A PAPR determining device includes a detecting unit and a PAPR determining unit. The detecting unit detects a predetermined value's changes, which is a cause of changes in a saturation power of a power amplifier. When the detecting unit detects any change in the predetermined value, the PAPR determining unit determines a PAPR value that corresponds to the saturation power of the power amplifier.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: July 8, 2014
    Assignee: Fujitsu Limited
    Inventor: Tsuneaki Tadano
  • Publication number: 20140184335
    Abstract: Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and/or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode.
    Type: Application
    Filed: March 14, 2013
    Publication date: July 3, 2014
    Applicant: PEREGRINE SEMICONDUCTOR CORPORATION
    Inventors: Dan William Nobbe, Jeffrey A. Dykstra, Chris Olson, James S. Cable
  • Publication number: 20140184334
    Abstract: Optimization methods via various circuital arrangements for amplifier with variable supply power are presented. In one embodiment, a switch can be controlled to include or exclude a feedback network in a feedback path to the amplifier to adjust a response of the amplifier dependent on a region of operation of the amplifier arrangement (e.g. linear region or compression region).
    Type: Application
    Filed: March 14, 2013
    Publication date: July 3, 2014
    Applicant: PEREGRINE SEMICONDUCTOR CORPORATION
    Inventor: PEREGRINE SEMICONDUCTOR CORPORATION
  • Patent number: 8766725
    Abstract: Apparatus and methods for frequency compensation of an amplifier are provided. In one embodiment, an integrated circuit (IC) includes an amplifier configured to amplify an input signal to generate an output signal. The IC further includes an output pad configured to receive an output signal from the amplifier and a control pad for controlling the closed-loop bandwidth of the amplifier. A compensation capacitor is electrically connected between an input of the inverting amplification block and an output of the inverting amplification block, and a switchable capacitor is electrically connected between the input of the inverting amplification block and the control pad. The control pad can be electrically connected to a DC voltage source or to the output pad to control the amplifier's closed-loop bandwidth.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: July 1, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Stefano I. D'Aquino, Kimo Tam, Yukihisa Handa
  • Publication number: 20140167855
    Abstract: A radio frequency (RF) power transistor circuit includes a power transistor and a decoupling circuit. The power transistor has a control electrode coupled to an input terminal for receiving an RF input signal, a first current electrode for providing an RF output signal at an output terminal, and a second current electrode coupled to a voltage reference. The decoupling circuit includes a first inductive element, a first resistor, and a first capacitor coupled together in series between the control electrode of the power transistor and the voltage reference. The decoupling circuit is for dampening a resonance at a frequency lower than an RF frequency.
    Type: Application
    Filed: February 20, 2014
    Publication date: June 19, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: HUSSAIN H. LADHANI, GERARD J. BOUISSE, JEFFREY K. JONES
  • Patent number: 8731412
    Abstract: An amplifier implementing with a common base circuit is disclosed. The amplifier includes the common base circuit, a current shunt, and a current supplement. The common base circuit receives an input current. The current shunt shunts the input current based on the average of the output of the pre-amplifier. The current supplement supplements a current shunted by the current shunt.
    Type: Grant
    Filed: November 15, 2011
    Date of Patent: May 20, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Makoto Ito, Taizo Tatsumi
  • Publication number: 20140132351
    Abstract: An amplifier circuit includes an amplifier circuit that emitter-grounds a first transistor that amplifies an input signal; and an emitter-grounded feedback circuit in which a collector of the first transistor is connected to an output line of the amplifier circuit and a base is wiring-connected only to the output line by using a resistor.
    Type: Application
    Filed: August 26, 2013
    Publication date: May 15, 2014
    Applicant: Fujitsu Limited
    Inventor: Yukito TSUNODA
  • Publication number: 20140132350
    Abstract: A radio frequency (RF) power amplifier is disclosed. The RF radio power amplifier includes a bias current generating unit, a first impedance unit, a second impedance unit, a third impedance unit and an output stage unit. The bias current generating unit receives a reference voltage. There is a first voltage with negative temperature coefficient between the first impedance unit and the second impedance unit, and the second unit receives a ground current. There is a second voltage between the third impedance unit and the second impedance unit, and the second voltage is a partial voltage of the first voltage. The bias current generating unit outputs a bias current with positive temperature coefficient according to the second voltage. The output stage unit receives an input current. The bias current is a sum of the input current with positive temperature coefficient and the ground current.
    Type: Application
    Filed: March 8, 2013
    Publication date: May 15, 2014
    Applicants: UNIVERSAL GLOBAL SCIENTIFIC INDUSTRIAL CO., LTD, UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD.
    Inventors: UNIVERSAL SCIENTIFIC INDUSTRIAL (SHANGHAI) CO., LTD., UNIVERSAL GLOBAL SCIENTIFIC INDUSTRIAL CO., LTD