Abstract: An amplifier having a depletion mode output transistor and a bias circuit coupled to a negative voltage supply. A thermopile is provided to bias the output transistor to an “off” condition in the event of failure of the negative supply voltage.

Abstract: An output circuit includes an analog amplifier circuit including a differential amplifier stage configured to receive an input voltage, and first to nth output systems (n is a natural number more than 1); first to nth output nodes; an output pad; and first to nth electrostatic protection resistances. An ith output system (i is a natural number between 2 and n) of the first to nth output systems includes an ith PMOS transistor having a drain connected with the ith output node of the first to nth output nodes and a gate connected with a first output of the differential amplifier stage; and an ith NMOS transistor having a drain connected with the ith output node and a gate connected with a second output of the differential amplifier stage. The first to nth electrostatic protection resistances are respectively connected between the first to nth output nodes and the output pad.

Abstract: An electrodeless lamp protecting device installed between an electrodeless lamp and a power source comprises a substrate having a feedback signal input module, a signal level determination module and a protection signal output module installed on the substrate. A signal of the power source is transmitted from the feedback signal input module to the signal level determination module, and the signal serves as a reference for an output signal of the protection signal output module, such that the electrodeless lamp has an automatic protection function upon the receipt of an abnormal signal.

Abstract: Systems, devices and techniques relating to power amplifier protection include, in some implementations, a circuit including: attenuation circuitry to couple with an output of detection circuitry that provides a protection signal and to couple with an input of power amplifier circuitry; turn off circuitry to couple with the power amplifier circuitry, the turn off circuitry configured to turn off the power amplifier circuitry responsive to the protection signal; and the attenuation circuitry configured to reduce a gain of the power amplifier circuitry responsive to the protection signal, the attenuation circuitry comprising a delay stage configured to continue attenuating an RF input signal of the power amplifier circuitry until after the power amplifier circuitry turns on.

Abstract: Embodiments of circuits, apparatuses, and systems for an overdrive protection circuit arranged at an input to a primary power transistor to protect against overdrive conditions, where the overdrive protection circuit includes a sensing resistor. Other embodiments may be described and claimed.

Abstract: In one embodiment, a method includes: detecting one of a short-to-ground condition and a short-to-supply condition at an output node; selectively activating a feedback control transistor according to the detecting; detecting a first current passing through a first transistor using a second transistor sized to be smaller than the first transistor; mirroring the detected current using a plurality of transistors to form a feedback current; and providing the feedback current to a gate electrode of the first transistor according to the selectively activating the feedback control transistor.

Abstract: An apparatus for sensing power amplifier current includes a system voltage source that is used to develop a reference voltage, a wire bond structure connected between the system voltage source and a power amplifier, where a sense voltage developed across the wire bond structure is indicative of a current flowing through the power amplifier, and a current source configured to compensate the reference voltage for changes in resistance of the wire bond structure due to a temperature coefficient of the wire bond structure.

Abstract: Disclosed herein is a power amplifier. The power amplifier includes a first common source transistor for amplifying an input signal into a predetermined level, a second common source transistor for compensating for input capacitance and performing auxiliary amplification for the first common source transistor, and a common gate transistor connected to the first common source transistor in a cascode structure, configured to be connected in parallel to the second common source transistor and prevent the first common source transistor from breaking down, and configured to output a signal amplified by a value obtained by adding the gain of the first common source transistor and the gain of the second common source transistor to each other.

Abstract: An RF power amplifier includes an RF choke coil, a power amplification circuit unit, and an electrostatic discharge (ESD) protection unit. The RF choke coil is connected to a voltage terminal through which an operating voltage is applied. The RF choke coil supplies the operating voltage and interrupts an RF signal. The power amplification circuit unit is supplied with the operating voltage through the RF choke coil. The power amplification circuit unit amplifies an input signal inputted through an input terminal and outputs the amplified input signal through an output terminal. The ESD protection unit is connected between a first connection node and a ground. The ESD protection unit bypasses an ESD voltage from the first connection node to the ground, the first connection node being a node between the voltage terminal and the RF choke coil.

Abstract: In an example embodiment, a method for bidirectional signal propagation comprises: a) sensing a voltage level of a first signal at a first port; b) coupling the first port to an output of an amplifier with a solid state switch if the voltage level of the first signal is less than a threshold voltage, whereby a second signal applied to a second port coupled to an input of the amplifier is propagated in a first direction from the second port to the first port; and c) bypassing the amplifier if the voltage level of the first signal is greater than the threshold voltage such that the first signal is propagated in a second direction from the first port to the second port.

Abstract: Systems and methods for implementing over-current protection in amplifiers are provided, including systems, methods and devices for specifying a clip level at which to clip an audio signal in response to an over-current condition being detected. In an embodiment, the clip level is reduced while the over-current condition is being detected. Once the over-current condition is no longer detected, the clip level is maintained for a specified period before allowing the clip level to be increased. In an embodiment, the specified period, for which the clip level is maintained before the clip level is allowed to be increased, starts when the over-current condition is no longer detected, and ends when each of N immediately preceding sample(s) of the audio signal are not clipped to the clip level, where N is an integer, and N?1.

Abstract: Embodiments of circuits, apparatuses, and systems for an overdrive protection circuit arranged at an input to a primary power transistor to protect against overdrive conditions, where the overdrive protection circuit includes a sensing resistor. Other embodiments may be described and claimed.

Abstract: A method and apparatus for controlling a selectable voltage audio power output stage provides a mechanism for raising the selected power amplifier output voltage in time for the arrival of signal peaks to avoid clipping. Signal peaks may either be delayed by delaying an increase in volume control level or enabling signal compression for a predetermined time period, so that sufficient time is provided for the amplifier power supply to stabilize at a higher operating voltage when an increase of power supply voltage is selected. Alternatively, a signal level may be determined at an upstream source, such as a decoder or filter that provides information in sufficient advance of the arrival of the peaks, and used to control the power supply selection, so that the higher power supply voltage level is selected in advance of arrival of the signal peaks that would otherwise cause clipping at the power amplifier output.

Abstract: A differential amplifier with surge protection is described. The differential amplifier includes a first output driver device, a second output driver device, a first replica device, a second replica device, a current comparator, and a clamp circuit. The first replica device is configured to be a replica of the first output driver device. The second replica device is configured to be a replica of the second output driver device. The current comparator is configured to generate a threshold current, and to compare the threshold current to a first current through the first replica device and a second current through the second replica device. The clamp circuit is configured to limit a third current through the first output driver device and a fourth current through the second output driver device if the current comparator determines that the threshold current is greater than the first current or the second current.

Abstract: Presently many audio chips suffer from pop issues, which is especially serious for single ended audio drivers. An audio pop is a disturbance in the output caused by a sudden transition of chip power, particularly when a chip is powered on or powered off. Furthermore, compensation networks included in the amplifiers on audio chips for stability offer a significant path for transmitting power disturbances to the output. Hence, circuitry is developed to suppress pops in the output stages of an amplifier.

Abstract: A class D amplifier includes: an amplifier that generates a digital signal for driving a load based on an input signal; an attenuator that attenuates the input signal according to an attenuation command signal; and a clip prevention controller that outputs the attenuation command signal to intermittently attenuate the input signal when the digital signal is brought into a clip state or a near-clip state.

Abstract: There is provided a sensor threshold circuit that makes available a hysteresis width that is not dependent on the change in a threshold point. Since a bias current IB is generated by a threshold current IT and a threshold adjusting current ICONT, the threshold point is given by a coefficient A and a coefficient K and the hysteresis width |BH| is given by the coefficient K. Accordingly, when the coefficient K is determined, the hysteresis width |BH| is not dependent on the coefficient A and keeps a constant value. In addition, since the coefficient A depends on the resistance ratio, the threshold point is variable by changing a single resistor. Further, when the coefficient K is determined, the hysteresis width |BH| is also determined to be a single value with no variations in its value, no changes according to temperature, and no changes over time.

Abstract: An amplifier failure detection apparatus for a radio transmitter that has a function for compensating for amplifier distortion of the radio transmitter and a function for determining amplifier failure has occurred by detecting that the gain of an amplifier has dropped a set level or more, in which: a gain-detection unit detects the gain of the amplifier; an alarm-detection-level-generation unit, which has a table for storing alarm-detection levels that correspond to input-amplitude levels, generates an alarm-detection level that corresponds to an input-amplitude level; and a comparison unit compares the gain detected by the gain-detection unit with the alarm-detection level, and generates an alarm based on the comparison results.

Abstract: The RF power amplifier apparatus has an RF power amplifier and a power-supply circuit. The power-supply circuit controls the level of a source voltage supplied to the RF power amplifier in response to the level of a power-control signal. A sensing resistance produces a sense signal Vsen corresponding to a source current with respect to a source voltage. The current-control unit controls the source current ILDO in response to the sense signal Vsen. When Vsen coincides with an allowable sense signal level Vsh corresponding to a source current allowable level ILDO(Max), the current-control unit controls the source current ILDO to a limit current smaller than the allowable level ILDO(Max). Preferably, the limit current is a shutdown current when a shutdown switch is in an OFF state. Thus, the draining of the battery of a mobile-phone terminal can be reduced even when an impedance mismatch condition lasts for a long time.

Abstract: Some embodiments discussed relate to a method and apparatus, comprising a power amplifier module, a transceiver module coupled to provide a signal to an input of the power amplifier module. The transceiver module comprising an integrated temperature sensor to sense an instantaneous operating temperature of the transceiver and providing a first sensor output signal dependent upon the operating temperature, and an integrated voltage sensor to sense a transceiver supply voltage and generate a second sensor output signal dependent upon the instantaneous transceiver supply voltage, and a processor configured to receive the first and the second sensor output signals, provide a control signal to the power amplifier module to reduce the output power of the power amplifier responsive to the first and the second sensor output signals.

Abstract: The present invention is a low series impedance directional power detector, which may be used to measure either forward or reverse power in a radio frequency (RF) circuit. The directional power detector includes current detection circuitry to directionally measure current, voltage detection circuitry to measure voltage, and combining circuitry to combine the directional RF current measurements and the RF voltage measurements into a combined RF measurement, which is indicative of directional power. The current detection circuitry and voltage detection circuitry apply any phase-shifts that are needed to detect power in the direction of interest and ignore power in the opposite direction when the directional power detector is presented with a complex load.

Abstract: A system and method for over-voltage protection of a power amplifier is provided. A power amplifier is typically employed in a transmitter to amplify signals prior to transmission via a load; the load may include an antenna or a cable. As a result of an impedance mismatch between the power amplifier and its load, excess power from the power amplifier output fails to reach the load and must be dissipated by one or more transistors in the power amplifier. In severe impedance mismatch conditions, this dissipated power may damage or destroy the transistor(s). An automatic gain control (AGC) is provided for detecting a gain difference between the power amplifier and a replica power amplifier. A gain difference may signal an over-voltage situation. The AGC may be configured to adjust the gain of the power amplifier if a gain difference exists to prevent device damage.

Abstract: In one embodiment, a method includes: detecting one of a short-to-ground condition and a short-to-supply condition at an output node; selectively activating a feedback control transistor according to the detecting; detecting a first current passing through a first transistor using a second transistor sized to be smaller than the first transistor; mirroring the detected current using a plurality of transistors to form a feedback current; and providing the feedback current to a gate electrode of the first transistor according to the selectively activating the feedback control transistor.

Abstract: The invention relates to a current limiting method, e. g. for Class D amplifiers comprising a unique detection- and control method. The current detection circuit can be implemented as a voltage measurement where the measured voltage corresponds to the current flowing through the power-switching device. The device can be switched OFF when a set limit is reached. By forcing certain OFF time, the associated control system behaves as a self-oscillating current limiting circuit. This can be implemented locally close to the switching device and be independent of other local or global control systems.

Abstract: An amplifying device for setting input impedance at several G? to several tens of G? and improving an ESD withstand current rating is provided. An ECM is connected to an input terminal 21 and frequency characteristics become flat to a voice band by high input impedance of a CMOS amplifier 20 and the input impedance is set at several G? to several tens of G? and thereby, response time after detecting a loud voice or turning on a power source of the ECM is speeded up and desired electrical characteristics are achieved. A path for releasing a surge voltage which occurs during assembly in the outside of an IC and intrudes from the input terminal 21 to a power source terminal or an earth terminal without an influence on a signal (20 Hz to 20 kHz) of a voice band entering from the input terminal 21 can be constructed by connecting a P-channel MOS transistor 27 and an N-channel MOS transistor 28 as an ESD protective element.

Abstract: One embodiment of an apparatus for testing an amplifier includes an amplifier having a driver and a filter, the filter being connected between an output of the driver and an output of the amplifier. The filter is operable to produce a demodulated output signal from a higher frequency modulated signal at the driver output. The apparatus also includes a voltage level detector connected to the driver output and a control circuit operable to detect at least one fault based on a voltage level measured at the driver output by the voltage level detector.

Abstract: An amplifier circuit includes a first amplifying section for amplifying a signal, and a second amplifying section for amplifying the signal amplified by the first amplifying section. A capacitive element connects the output of the first amplifying section to the input of the second amplifying section. When power is applied to the amplifier circuit, a bypass circuit causes the electric current flowing from a first power supply toward the input of the second amplifying section through the first amplifying section and the capacitive element to be bypassed to a second power supply.

Abstract: A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.

Abstract: Complimentary Metal-Oxide-Semiconductor (CMOS) circuits made with core transistors are capable of reliable operation from an IO power supply with voltage that exceeds the reliability limit of the transistors. In embodiments, biasing of an operational amplifier is changed in part to a fixed voltage corresponding to the reliability limit. In embodiments, switched capacitor networks are made with one or more amplifiers and switches including core transistors, but without exposing the core transistors to voltages in excess of their reliability limit. In embodiments, operational transconductance amplifiers (OTAs) include core transistors and operate from IO power supplies. Level shifters for shifting the levels of a power down signal may be used to avoid excessive voltage stress of the OTAs' core transistors during turn-off. Non-level shifting means may be used to clamp output voltages and selected internal voltages of the OTAs, also avoiding excessive voltage stress of the core transistors during turn-off.

Abstract: A transmitter system includes a transmitter with a power amplifier. An antenna communicates with the power amplifier. A protection circuit generates a sensed signal that varies with an impedance of the antenna and reduces an output of the power amplifier in response to the sensed signal exceeding a predetermined threshold.

Abstract: A short-circuit detecting circuit which can accurately detect an output short-circuit of a class-D amplifier by a simple circuit construction. Two comparison pulse signals are formed on the basis of predetermined generating threshold values and a signal level of each of two output stage input pulse signals which are formed on the basis of an input pulse signal to the class-D amplifier and are supplied to an output stage of the class-D amplifier. A signal level of an output pulse from the class-D amplifier in a period of time corresponding to a pulse width of each of the comparison pulse signals is compared with a predetermined detection threshold values. A short-circuit detection signal is outputted in accordance with obtained level comparison results.

Abstract: The RF power amplifier apparatus has an RF power amplifier and a power-supply circuit. The power-supply circuit controls the level of a source voltage supplied to the RF power amplifier in response to the level of a power-control signal. A sensing resistance produces a sense signal Vsen corresponding to a source current with respect to a source voltage. The current-control unit controls the source current ILDO in response to the sense signal Vsen. When Vsen coincides with an allowable sense signal level Vsh corresponding to a source current allowable level ILDO(Max), the current-control unit controls the source current ILDO to a limit current smaller than the allowable level ILDO(Max). Preferably, the limit current is a shutdown current when a shutdown switch is in an OFF state. Thus, the draining of the battery of a mobile-phone terminal can be reduced even when an impedance mismatch condition lasts for a long time.

Abstract: An amplifier with an output protection having an input stage defining a feedback node, an output stage connected to the feedback node and defining an output node supplying an output voltage, and a feedback stage connected between the output and the feedback nodes. A mirror stage is connected to the feedback node and has the same structure as the output stage, the mirror stage defining a reference node connected to the feedback stage for generating a reference voltage to be compared to the output voltage by the feedback stage. The feedback stage generates a current limitation signal fed to the feedback node when a difference between the output and the reference voltages is higher than a threshold.

Abstract: A method of protecting a circuit design implemented within an integrated circuit (IC) from electrostatic discharge (ESD) can include positioning a device array pair comprising first and second device arrays on the IC to share a common centroid, wherein the first and second device arrays are matched. An ESD diode array pair comprising first and second ESD diode arrays can be positioned on the IC adjacent to a first perimeter encompassing the first and second device arrays, wherein the first and second ESD diode arrays share the common centroid and are matched. A cathode terminal of each ESD diode of the first ESD diode array can be coupled to an input of the first device array, and a cathode terminal of each ESD diode of the second ESD diode array can be coupled to an input of the second device array.

Abstract: A power amplifier for use in a radio frequency (RF) transmitter or other device exhibits improved protection from voltage standing wave ratio (VSWR) issues emanating from avalanche currents. The amplifier circuit includes a power transistor having a base terminal, and a mirror transistor having a collector terminal and a base terminal. The base terminal is coupled to the collector terminal of the mirror transistor to thereby provide a bias current to the base terminal of the mirror transistor. The base terminal is also coupled to the base terminal of the power transistor to thereby form a base bias feed node for a current mirror arrangement. A static or variable impedance is coupled to the base bias feed node to sink current and to thereby maintain the proper bias current at the base terminal of the mirror transistor to thereby continue operation of the mirror transistor while avalanche conditions exist.

Abstract: An apparatus and method are provided for reducing the output voltage in a power amplifier. The power amplifier contains a power supply, an amplifier stage, an impedance matching circuit, and a voltage reduction unit connected between the power supply and the amplifier stage. A power amplifier device within the amplifier stage has a gain bandwidth that covers multiple frequency bands. The output voltage of the power amplifier device is a composite voltage that contains fundamental and harmonic components that lie within the gain bandwidth. The voltage reduction unit reduces the supply voltage of the power amplifier device such that the composite output voltage is less than the breakdown voltage in the power amplifier device. The impedance matching circuit is coupled to the power amplifier device output and provides impedance matching for output signals of the fundamental and harmonic frequencies.

Abstract: In one embodiment the present invention includes a circuit comprising an amplifier, a first monitor circuit, a second monitor circuit, a third monitor circuit, and a control circuit. The amplifier comprises a first transistor and a second transistor driven by first and second signals, respectively. The amplifier stage provides an amplifier output signal through the output terminal of the amplifier stage. The first monitor circuit generates an output signal indicating a condition of the first signal. The second monitor circuit generates an output signal indicating a condition of the second signal. The third monitor circuit generates an output signal indicating a condition of the amplifier output signal. If a short circuit condition is indicated by the monitor circuits, the control circuit generates a shut down.

Abstract: A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.

Abstract: Disclosed is a power amplification apparatus in a communication system. The apparatus includes a high power amplifier for amplifying an input signal; and a lattice panel, one surface of which is in contact with a ground plane of the high power amplifier, the one surface including a first line and a second line. The first line has at least two first etched portions and at least one first copperplate portion, the first copperplate portion being positioned between the first etched portions, and the first copperplate portion being formed at an interval of ? 0 4 , and the second line has at least two second etched portions and at least one second copperplate portion, the second copperplate portion being positioned between the second etched portions, and the second copperplate portion being formed at an interval of ? 0 ? 4 .

Abstract: A method of protecting a circuit design implemented within an integrated circuit (IC) from electrostatic discharge (ESD) can include positioning a device array pair comprising first and second device arrays on the IC to share a common centroid, wherein the first and second device arrays are matched. An ESD diode array pair comprising first and second ESD diode arrays can be positioned on the IC adjacent to a first perimeter encompassing the first and second device arrays, wherein the first and second ESD diode arrays share the common centroid and are matched. A cathode terminal of each ESD diode of the first ESD diode array can be coupled to an input of the first device array, and a cathode terminal of each ESD diode of the second ESD diode array can be coupled to an input of the second device array.

Abstract: An amplifier circuit includes a first circuit and a second circuit connected in series. The first circuit has a first terminal coupled to a first power supply terminal, a second terminal coupled to an output node, and a control terminal for receiving a first signal for controlling a current flow. The second circuit has a first terminal coupled to the output node, a second terminal couple to a second power supply terminal, and a control terminal for receiving a second signal controlling a current flow in the first circuit. A bias circuit is coupled to the third terminal of the first circuit and is configured to limit a current flow in the first circuit when a voltage at the output node is outside a predetermined voltage range. In an embodiment, the bias circuit includes a plurality of diode devices connected in series and a switch device coupled to the diode devices.

Abstract: In one embodiment, a method for soft-start in a power converter includes the following: providing a feedback signal indicative of the output voltage of the power system at a first input terminal of an error amplifier in a negative feedback loop of the power converter; providing a reference voltage at a second input terminal of the error amplifier; comparing the feedback signal against the reference voltage to generate a control signal for regulating an output voltage of the power converter; charging a soft-start capacitor coupled to the second input terminal of the error amplifier with a current for establishing the reference voltage; and adjusting the current in response to the control signal so that the error amplifier is prevented from saturation.

Abstract: A radio frequency device comprises a radio frequency (RF) power amplifier (PA) operably coupled to a protection circuit for minimising voltage standing wave ratio effects, wherein the protection circuit comprises a current limiter indexed to a power supplied to the RF PA. In this manner, the protection circuit combines detection of both current and voltage increase in order to provide a direct feedback on the final RF PA stage via a bias control.

Abstract: Two transistors of a class D output stage are driven by complementary, variable duty cycle signals PWM+ and PWM?. When the pulse width of the PWM+ signal becomes too narrow for reliable operation of prior art over-current protection circuits sensing the drain to source voltage of FET1 driven by PWM+, a Narrow Pulse Detector generates a signal indicative of this narrow pulse condition. A Negative Current Sense circuit measures the drain to source voltage across FET2 during the much longer conduction time of FET2 driven by PWM?. Because of the energy stored in the series inductor coupled to the output of the class D stage, a negative current flows through this FET2 during its conduction time. The resulting drain to source voltage of FET2 is measured and compared to a threshold. If the voltage indicative of current is over the threshold, and the Narrow Pulse Detector output indicates a narrow pulse condition, then an inhibit signal is generated which reduces current.

Abstract: A wave detector circuit includes: a first transistor having its base and collector connected together, the first transistor receiving an AC signal and a reference voltage at its base and collector; a second transistor having its base connected to the base of the first transistor through a resistor, the second transistor outputting a detected voltage at its collector; and a diode-connected temperature compensation transistor connected between ground potential and the base and the collector of the first transistor.

Abstract: A high efficiency class-AB amplifier is disclosed. The amplifier comprises a first input stage and a second input stage, both coupled to a class-AB biasing mesh and an output stage, wherein the outputs of the first and second input stages are directly coupled to the output transistors in the output stage. In one embodiment, a first gate of the first input stage and of the second input stage are coupled together to receive the same input and a second gate of the first input stage and of the second input stage are coupled together to receive the same input. In another embodiment, the first input stage and second input stage may further comprise cascode transistors for coupling the two input stages to the class-AB biasing mesh. In yet another embodiment, a 3V supply is used and 1V transistors are used to improve gain and 3V transistors are used to protect the 1V transistors.

Abstract: A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.

Abstract: The present invention discloses a voltage detection type overcurrent protection device, which applies to the output stage of a CMOS Class-D audio amplifier. Generally, a Class-D audio amplifier is used to drive a high-load loudspeaker; therefore, it needs a high-current driver. When there is a short circuit in the load, the high current will burn out the driver stage. The present invention detects the output voltage to indirectly monitor whether the output current is too large. Once an overcurrent is detected, the output-stage transistor is turned off to stop high current lest the circuit be burned out.

Abstract: A power converter receiving a single-sided supply which is ground-terminated and providing a regulated positive supply and a regulated negative supply that is optimized to the expected output range of a class AB amplifier, as well as providing excellent efficiency. The converter finds application as a compact converter to power an audio amplifier driving an audio device which is ground terminated, such as a speaker.

Abstract: A power amplifier system including a power terminal, a ground terminal, an output terminal, a ripple terminal, a control terminal to which a control signal is supplied from outside, a power amplifier circuit connected between the power terminal and the ground terminal, a negative potential detection circuit connected to the output terminal, and a bias circuit which supplies a bias voltage to the power amplifier circuit, and a bias start-up circuit controlling the startup operation of the bias circuit.