With Amplifier Condition Indicating Or Testing Means Patents (Class 330/2)
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Patent number: 7545156Abstract: The test circuit according to the present invention includes: a plurality of light-receiving elements; a plurality of amplifiers, each of which converts, into a voltage, a photoelectric current supplied from one of the light-receiving elements; and an electric current supplying unit which supplies an electric current to each of the light-receiving elements and each of the amplifiers.Type: GrantFiled: February 21, 2007Date of Patent: June 9, 2009Assignee: Panasonic CorporationInventors: Yousuke Kuroiwa, Hideo Fukuda, Hiroshi Yamaguchi, Tetsuo Chato, Yuzo Shimizu, Masaki Taniguchi
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Patent number: 7545206Abstract: An apparatus for biasing a transistor, comprising: a controllable bias generator; a test circuit; a digital Mth order differentiator responsive to an output of the test circuit; and a controller responsive to the digital Mth order differentiator for controlling the controllable bias generator; wherein the test circuit is configured to calculate an Lth order derivative of the transistor's performance.Type: GrantFiled: December 4, 2007Date of Patent: June 9, 2009Assignee: Media Tek Inc.Inventor: Jonathan Richard Strange
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Patent number: 7535292Abstract: Systems and methods for characterizing amplifiers. A system for characterizing an amplifier in accordance with the present invention comprises a Gaussian signal source for generating a signal in the frequency domain, a notch filter, coupled to the Gaussian Noise source, wherein the notch filter has a notch at a specified frequency and a frequency bandwidth, the frequency bandwidth encompassing the specified frequency, an Inverse Fast Fourier Transform device, coupled to an output of the notch filter, a normalization device, coupled to the Inverse Fast Fourier Transform device, an amplifier under test, coupled to the normalization device, for amplifying the signal generated by the Gaussian signal source, and a measurement device, coupled to an output of the amplifier, for measuring a power output of the amplifier in the frequency bandwidth and a noise output at the specified notch frequency, and for calculating the ratio between the power output and the noise output.Type: GrantFiled: October 11, 2007Date of Patent: May 19, 2009Assignee: The DIRECTV Group, Inc.Inventors: Guangcai Zhou, Tung-Sheng Lin, Dennis Lai, Joseph Santoru, Ernest C. Chen, Shamik Maitra, Cecilia Comeaux
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Patent number: 7529523Abstract: A method for calibrating the output power of a mobile terminal using at least a second order curve fit to describe a power amplifier gain (PAG) setting versus output power characteristic of a power amplifier in a transmitter of the mobile terminal is provided. For each of an upper-band frequency, a mid-band frequency, and a lower-band frequency of a frequency band, multiple measurements of the output power of the mobile terminal are made corresponding to multiple values of the PAG setting, and a curve fit is performed, thereby calculating coefficients defining a polynomial describing the PAG setting versus output power characteristic. Using the polynomials describing the PAG setting versus output power characteristic of the power amplifier for each of the upper-band, mid-band, and lower-band frequencies, values of the PAG setting are determined for each desired output power level for each desired frequency within the frequency band.Type: GrantFiled: August 23, 2005Date of Patent: May 5, 2009Assignee: RF Micro Devices, Inc.Inventors: Jason Young, Dennis Mahoney, Ricke W. Clark, Nadim Khlat, Adam Toner
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Patent number: 7528649Abstract: A circuit having: an input matching network; a transistor coupled to an output of the input matching network; and wherein the input matching network has a first input impedance when such input matching network is fed with an input signal having a relatively low power level and wherein the input matching network has an input impedance different from the first input impedance when such input matching network is fed with an input signal having a relatively high power level.Type: GrantFiled: September 7, 2007Date of Patent: May 5, 2009Assignee: Raytheon CompanyInventors: Colin S. Whelan, Raghu Mallavarpu, Matthew C. Tyhach
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Patent number: 7521936Abstract: A power converter system that includes a diagnostic system is presented. One example of a power converter system is an audio amplifier system, such as a switch mode amplifier. The diagnostic system in the power converter may collect data indicative of signals in the power converter system and analyze the collected data. The collection and analysis of the data may be user defined (such as multiple measurements taken over a predetermined period) or may be defined by operation of the power converter system (such as an overcurrent or voltage clipping in the power converter system). The analysis of the collected data may be used to determine one or more potential problems in the power converter system, and to modify operation of the power converter system.Type: GrantFiled: December 5, 2006Date of Patent: April 21, 2009Assignee: Harman International Industries, IncorporatedInventor: Gerald R. Stanley
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Publication number: 20090091381Abstract: The present invention aims to suppress degradation of a reception characteristic even in such an environment that the signal strength of an inputted analog signal varies due to a variation in a received electric field. A controller acquires characteristic information showing each gain characteristic indicative of a relationship between the signal strength of the analog signal and the gain corresponding to the analog signal at an amplifier from a CPU. An AGC controller derives gains each corresponding to the signal strength detected at an ADC according to the gain characteristics indicated by the acquired characteristic information, whenever necessary, and outputs the same to the amplifier through a terminal.Type: ApplicationFiled: September 24, 2008Publication date: April 9, 2009Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Shigeru Amano
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Publication number: 20090066411Abstract: A circuit having: an input matching network; a transistor coupled to an output of the input matching network; and wherein the input matching network has a first input impedance when such input matching network is fed with an input signal having a relatively low power level and wherein the input matching network has an input impedance different from the first input impedance when such input matching network is fed with an input signal having a relatively high power level.Type: ApplicationFiled: September 7, 2007Publication date: March 12, 2009Inventors: Colin S. Whelan, Raghu Mallavarpu, Matthew C. Tyhach
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Publication number: 20090051461Abstract: A output power detecting system with a directional coupler has a directional coupler at the output terminal of the output power detecting system. The directional coupler includes a main line, a first sub line, and a second sub line. The output of the power amplifying unit is fully coupled to a power detecting unit via the coupling between the main line and the first sub line, and the external noise is coupled to the ground via the coupling between the first sub line and the second sub line. Therefore, the power detecting unit accurately detects the output power of the output power detecting system.Type: ApplicationFiled: August 21, 2007Publication date: February 26, 2009Applicant: AZUREWAVE TECHNOLOGIES, INC.Inventors: CHUNG-ER HUANG, HUANG-CHAN CHIEN
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Patent number: 7489186Abstract: A current sense amplifier for a voltage converter wherein the voltage converter has at least one channel providing an output current through an output inductor, the current sense amplifier monitoring the current in the at least one channel through the output inductor, the current sense amplifier comprising a plurality of variable gain amplifiers, there being at least one more variable gain amplifier than channels in the voltage converter, whereby at least one variable gain amplifier is in a calibration mode for a preset period of time during which the variable gain amplifier is compensated for an offset error and the gain of the variable gain amplifier is calibrated to compensate for temperature of the output inductor, while during said preset period of time any remaining variable gain amplifiers are connected to monitor the channel current in each output inductor.Type: GrantFiled: January 11, 2007Date of Patent: February 10, 2009Assignee: International Rectifier CorporationInventor: Daniel J. Segarra
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Publication number: 20090033412Abstract: An apparatus is provided for remotely monitoring a plurality of amplifiers on a display device. The amplifiers are provided to process audio signals and directly or indirectly connected to a network. In the apparatus, a collecting section collects a group code from each of the amplifiers through the network. The group code is allocated to each amplifier according to a grouping system for grouping the plurality of the amplifiers. A display control section displays a tree diagram of the amplifiers according to the collected group codes on the display device as a graphical representation of the grouping system.Type: ApplicationFiled: July 31, 2008Publication date: February 5, 2009Applicant: Yamaha CorporationInventors: Akio SUYAMA, Takaaki Muto, Naohide Kohyama, Ken Iwayama
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Patent number: 7486067Abstract: A measurement system for determining at least one characteristic of a device under test (DUT) at at least one frequency is described. The measurement system includes a network analyzer being in connection at least with a first source via a first connector and a second source via a second connector. Each source generates a signal. The network analyzer further includes signal paths arranged for applying the generated signals to the DUT and arranged for receiving signals output by the DUT. The frequency content of the signal generated by the second source includes at least a frequency component offset from the at least one frequency at which the DUT is characterized, the at least one frequency being included in the frequency content of the signal generated by the first source.Type: GrantFiled: December 7, 2006Date of Patent: February 3, 2009Assignee: NMDG NVInventor: Marc Vanden Bossche
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Publication number: 20090027116Abstract: An integrated circuit including a circuit for calibration and offset compensation of an amplifier method is disclosed. In one embodiment, the method includes providing a reference input signal to the input of an amplifier, coupling the output signal of the amplifier to a comparator circuit as a first input signal, providing a target signal to the comparator circuit as a second input signal, and increasing or decreasing a control signal provided to amplifier VGA corresponding to the output of the comparator circuit by one adjustment process of small process size.Type: ApplicationFiled: July 25, 2007Publication date: January 29, 2009Applicant: INFINEON TECHNOLOGIES AGInventor: Elmar Bach
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Publication number: 20090021300Abstract: An apparatus for detecting output power from an amplifier (103) comprises a first controller (105) for controlling output power of a signal from the amplifier (103), a device (107) for measuring dc bias current/voltage at an output (115) of the amplifier (103), second controller (109) operative to set the first controller (105) to a setting corresponding to an output power at a finite level, and a detector (109) for determining whether or not there is output power from the amplifier based on the measured dc bias current/voltage at the setting of the first controller (105). In one embodiment, the first controller (105) is set at a setting corresponding to an output power level which is sufficient to at least partially saturate the amplifier (103).Type: ApplicationFiled: February 26, 2007Publication date: January 22, 2009Inventor: Antonio Romano
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Publication number: 20080309405Abstract: The present invention is directed to systems and methods for reducing the distortion of power amplifiers. In particular, methods and systems are described that enable a determination of a pre-distortion correction signal to be determined, which when added to the nominal signal, a reduction in the distortion of the power amplifier results. In addition, methods and systems are described that enable calibration of individual power amplifiers to be accomplished for use with the above described approach. More specifically, the methods and systems are described for use in a MIMO application. These approaches may be applied to on-chip power amplifiers, off-chip power amplifiers, or any combination thereof.Type: ApplicationFiled: June 16, 2008Publication date: December 18, 2008Applicant: Broadcom CorporationInventors: Christopher YOUNG, Elias Simpson
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Publication number: 20080280575Abstract: The present invention relates to transmitter emission control. An apparatus is provided with a power amplifier and a power control part operatively connected to the power amplifier. The power control part is configured to receive an indication of a spectrum mask requirement and control supply power of the power amplifier on the basis of the indication of the spectrum mask requirement.Type: ApplicationFiled: August 30, 2007Publication date: November 13, 2008Inventor: Mikko Pesola
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Patent number: 7436253Abstract: Methods and systems for fast calibration to cancel phase feedthrough are disclosed and may comprise individually activating each of n binary-weighted cells utilizing a control signal in a power amplifier driver (PAD) and measuring the output signal, or offset, in response to a null signal applied to an input of each binary-weighted cell. This offset may be fed back, summed, and adjusted until the measured PAD output may be minimized. This calibrated offset may cancel phase feedthrough of the PAD, and the calibrated offset for each binary-weighted cell may be stored in a lookup table. The control signal may also be utilized for controlling the output power of the PAD by activating appropriate binary-weighted cells. For each of the 2n output powers, a calibrated offset is calculated utilizing a weighted sum of the stored offsets for the activated binary-weighted cells.Type: GrantFiled: December 27, 2006Date of Patent: October 14, 2008Assignee: Broadcom CorporationInventor: Alireza Zolfaghari
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Publication number: 20080224767Abstract: A semiconductor integrated circuit has an amplifier circuit which includes a phase compensating capacitor and has a feedback loop, and a stability determining and adjusting circuit which measures an amplitude of a voltage outputted from the amplifier circuit at a predetermined plurality of frequencies and adjusts a capacitance value of the phase compensating capacitor on the basis of a ratio between measured values of the amplitude.Type: ApplicationFiled: March 13, 2008Publication date: September 18, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Kenichi Agawa
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Patent number: 7423477Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.Type: GrantFiled: January 29, 2007Date of Patent: September 9, 2008Assignee: ParkerVision, Inc.Inventors: David F. Sorrells, Gregory S. Rawlins, Michael W. Rawlins
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Patent number: 7417394Abstract: The invention concerns a device for controlling a final power-output stage, the latter comprising three half-bridges consisting respectively of a series circuit including an upper semiconductor switch and a lower semiconductor switch and subjected to a service voltage, the connection points of the semiconductor switches of the half-bridges forming outputs which are connected to the windings of a motor having at least three phases. The invention is characterized in that there is provided a control device for shifting on-state respectively one semiconductor switch or simultaneously several semiconductor switches according to a predetermined programme and for determining whether the respective voltages at the outputs are respectively within a predetermined tolerance range for the corresponding switching state.Type: GrantFiled: November 9, 2004Date of Patent: August 26, 2008Assignee: Siemens AktiengesellschaftInventors: Wolfgang Bay, Michael Henninger
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Patent number: 7414469Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.Type: GrantFiled: January 29, 2007Date of Patent: August 19, 2008Assignee: ParkerVision, Inc.Inventors: David F Sorrells, Gregory S. Rawlins, Michael W. Rawlins
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Patent number: 7392021Abstract: Apparatus, system, and method including a circuit including an element having an electrical impedance, an input node to receive a signal, and an output node to couple to a load; a sensing circuit coupled to the input node and the output node to sense a differential voltage between the input and output nodes and to sense a detected voltage at the input node; and a multiplier circuit to receive the differential voltage and to receive the detected voltage. The multiplier circuit provides an output voltage proportional to the instantaneous power delivered to the load based on the differential voltage, the detected voltage, and the impedance of the element. A system may further include a radio frequency (RF) power amplifier (PA). A method may further include controlling a gain of the RF PA to maintain the power delivered to the load at a predetermined level based on the output voltage of the multiplier circuit.Type: GrantFiled: August 3, 2005Date of Patent: June 24, 2008Assignee: M/A-Com, Inc.Inventors: Nitin Jain, Rajanish, Angelos Alexanian
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Publication number: 20080136511Abstract: Methods and systems for fast calibration to cancel phase feedthrough are disclosed and may comprise individually activating each of n binary-weighted cells utilizing a control signal in a power amplifier driver (PAD) and measuring the output signal, or offset, in response to a null signal applied to an input of each binary-weighted cell. This offset may be fed back, summed, and adjusted until the measured PAD output may be minimized. This calibrated offset may cancel phase feedthrough of the PAD, and the calibrated offset for each binary-weighted cell may be stored in a lookup table. The control signal may also be utilized for controlling the output power of the PAD by activating appropriate binary-weighted cells. For each of the 2n output powers, a calibrated offset is calculated utilizing a weighted sum of the stored offsets for the activated binary-weighted cells.Type: ApplicationFiled: December 27, 2006Publication date: June 12, 2008Inventor: Alireza Zolfaghari
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Publication number: 20080129374Abstract: Systems and methods for characterizing amplifiers. A system for characterizing an amplifier in accordance with the present invention comprises a Gaussian signal source for generating a signal in the frequency domain, a notch filter, coupled to the Gaussian Noise source, wherein the notch filter has a notch at a specified frequency and a frequency bandwidth, the frequency bandwidth encompassing the specified frequency, an Inverse Fast Fourier Transform device, coupled to an output of the notch filter, a normalization device, coupled to the Inverse Fast Fourier Transform device, an amplifier under test, coupled to the normalization device, for amplifying the signal generated by the Gaussian signal source, and a measurement device, coupled to an output of the amplifier, for measuring a power output of the amplifier in the frequency bandwidth and a noise output at the specified notch frequency, and for calculating the ratio between the power output and the noise output.Type: ApplicationFiled: October 11, 2007Publication date: June 5, 2008Applicant: THE DIRECTV GROUP, INC.Inventors: Guangcai Zhou, Tung-Sheng Lin, Dennis Lai, Joseph Santoru, Ernest C. Chen, Shamik Maitra, Cecilia Comeaux
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Patent number: 7383145Abstract: A circuit for regulating power is disclosed. The present invention provides circuits and methods for current sensing variations, static droop settings, mismatched phase outputs, and temperature variations in a multiphase power regulator. The circuits may include a calibration controller that senses and regulates both a current sensing circuit and the droop in a power regulator over a range of temperatures thus equalizing phase outputs. The present invention includes the schematic organization and implementation of the circuit, the circuit's calibration, its use, and implementation. This invention advantageously provides circuits and methods to properly power a processor or IC chip according to the unique power specifications of the processor or chip.Type: GrantFiled: February 8, 2006Date of Patent: June 3, 2008Assignee: NuPower Semiconductor, Inc.Inventors: Fereydun Tabaian, Hamed Sadati, Ali Hejazi, Ahmad Ashrafzadeh
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Patent number: 7382182Abstract: A system for reducing the calibration time of a Power Amplifier (PA) (202) is provided. The system includes a memory module (304) that is integrated in the PA. The memory module is configured to store one or more calibration parameters of the PA.Type: GrantFiled: June 29, 2005Date of Patent: June 3, 2008Assignee: Motorola, Inc.Inventors: Robert S. Trocke, Armin W. Klomsdorf
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Patent number: 7378902Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.Type: GrantFiled: January 29, 2007Date of Patent: May 27, 2008Assignee: ParkerVision, IncInventors: David F Sorrells, Gregory S. Rawlins, Michael W. Rawlins
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Patent number: 7378906Abstract: A pre-distorter that compensates for amplitude and phase distortion created by an amplifier. During a training session, the amplifier is stimulated with input signals of pre-selected amplitude and phase at various temperatures and the amplifier output is captured and converted into data sets. Polynomials are then fitted to the data sets and inverses of the polynomials are determined. The coefficients of the inverse polynomials are then saved for each temperature. During operation, the amplifier temperature is predicted based on the amplifier input signal and the coefficients associated with the predicted temperature are selected to be applied to the input signal to compensate for amplitude and phase distortion caused by the amplifier.Type: GrantFiled: February 7, 2007Date of Patent: May 27, 2008Assignee: Agere Systems, Inc.Inventors: Mohammad Shafiul Mobin, Jeffrey H. Saunders, Lane A. Smith
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Patent number: 7355470Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.Type: GrantFiled: August 24, 2006Date of Patent: April 8, 2008Assignee: ParkerVision, Inc.Inventors: David F. Sorrells, Gregory S. Rawlins, Michael W. Rawlins
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Patent number: 7346100Abstract: Estimation of gain and phase imbalance of an upconverting transmitter. A transmitter transmits symbols containing vector components of pre-specific relationship in an analog signal. A receiver (also contained in a transceiver along with the transmitter) examines the symbols to determine the phase and gain imbalances in the transmitter based on the analog signal. An aspect of the present invention enables the balance estimation circuit to be integrated along with the transmitter and the receiver into a single monolithic integrated circuit.Type: GrantFiled: April 9, 2003Date of Patent: March 18, 2008Assignee: Texas Instruments IncorporatedInventor: Anil Kv Kumar
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Patent number: 7345538Abstract: A measuring circuit for the output of a power amplifier and a power amplifier comprising the measuring circuit comprises a first transistor (4f). The output current (27) of the first transistor (4f) is characteristic of the output current (28) of the amplifier (20), in particular, the above is essentially proportional to the output current (28) of the amplifier (20). The first transistor (4f) is controlled in parallel to at least one second transistor (4a-4e), driving the amplifier output (8).Type: GrantFiled: September 25, 2006Date of Patent: March 18, 2008Assignee: Infineon Technologies AGInventor: Elmar Wagner
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Patent number: 7332958Abstract: An analog-differential-circuit test device includes transfer gates 13 and 14 for isolating in the test mode an input pair of an analog differential circuit from input nodes IN and INB, a voltage adjusting circuit for generating a voltage pair controlled by a control signal fed from outside of the LSI and input to the input pair during the test mode, and a flip-flop for latching an output from the analog differential circuit. A High-output input characteristic and a Low-output input characteristic of the analog differential circuit itself are measured in the LSI.Type: GrantFiled: March 14, 2006Date of Patent: February 19, 2008Assignee: NEC CorporationInventor: Yusuke Matsushima
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Patent number: 7330704Abstract: A method and circuitry for pre-conditioning an electrical signal. The method comprises limiting the strength of the signal to not exceed a limit signal strength corresponding to the onset of substantial non-linear response of an amplifier to which the limited signal is to be supplied for amplification.Type: GrantFiled: April 25, 2002Date of Patent: February 12, 2008Assignee: Filtronic PLCInventor: Nicholas David Archer
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Patent number: 7323929Abstract: An apparatus for biasing a transistor, comprising: a controllable bias generator; a test circuit; a digital Mth order differentiator responsive to an output of the test circuit; and a controller responsive to the digital Mth order differentiator for controlling the controllable bias generator; wherein the test circuit is configured to calculate an Lth order derivative of the transistor's performance.Type: GrantFiled: March 9, 2006Date of Patent: January 29, 2008Assignee: Analog Devices Inc.Inventor: Jonathan Richard Strange
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Patent number: 7295060Abstract: Single port characterization of RF amplifier phase and amplitude transfer functions are developed by measuring the output of the amplifier as it is excited by a predetermined frequency over a series of bias steps. One bias step is chosen as a reference level. Amplitude characterization is obtained from measured magnitude at each step in the test sequence. Phase information is extracted from the same measurements by measuring phase and phase trajectory at a reference level, and subtracting measured phase information at a desired step in the test sequence from an estimation of the reference phase trajectory at that step. Reference measurements may be interspersed with other measurements.Type: GrantFiled: July 28, 2005Date of Patent: November 13, 2007Assignee: Agilent Technologies, Inc.Inventor: George Stennis Moore
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Publication number: 20070247217Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.Type: ApplicationFiled: August 24, 2006Publication date: October 25, 2007Inventors: David F. Sorrells, Gregory S. Rawlins, Michael W. Rawlins
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Patent number: 7286060Abstract: A vacuum tube replacement device includes an indicator. The indicator can be arranged to provide audible and/or visual indication of system performance, function, status, or any other desired indication. The vacuum tube replacement device is pin-for-pin compatible with standard vacuum tube circuit pin configurations. The replacement device may be a solid-state tube emulator device, a traditional glass envelope vacuum tube device, or some other hybrid device. The visual indicator is equally useful for non-vacuum tube replacement devices such as audio amplifier circuits.Type: GrantFiled: August 12, 2005Date of Patent: October 23, 2007Assignee: Roberts Retrovalve, Inc.Inventors: Douglas H. Roberts, Brett A. Hertzberg
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Patent number: 7286613Abstract: The invention relates to processes and devices which make it possible to directly modulate an RF carrier with a quadrature signal. It consists in filtering (504) this quadrature signal around zero so as to introduce alternately (507, 508) on each of the channels a low-frequency subcarrier that will serve as reference. Each of these channels is alternately demodulated in a synchronous manner (519) cosine-wise and sine-wise. The demodulation signal is filtered (523) so as to recover the subcarrier marred by modulation errors. The measurement of these errors (524) allows feedback correction (503) of the quadrature signal. It makes it possible to perform the major part of the operations in the digital processor (501) and enables direct vector modulation to be made possible at millimeter frequencies.Type: GrantFiled: September 4, 2003Date of Patent: October 23, 2007Assignee: Thomson LicensingInventors: François Baron, Jean-Yves Le Naour, Jean-Luc Robert
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Patent number: 7271649Abstract: A DC offset calibration device for calibrating a DC offset of an output signal of a gain stage, the DC offset calibration device includes: a digital-to-analog converter (DAC) electrically connected to the gain stage for generating an offset current according to the DC offset of the output signal of the gain stage; and a current-to-current converter electrically connected to the DAC and the gain stage for reducing the signal scale of the offset current to generate a compensation signal so as to reduce the DC offset at the output of the gain stage.Type: GrantFiled: September 27, 2005Date of Patent: September 18, 2007Assignee: Mediatek Inc.Inventors: Chinq-Shiun Chiu, Chih-Hsien Shen, Shou-Tsung Wang, Chi-Kun Chiu
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Differential amplifier offset voltage minimization independently from common mode voltage adjustment
Patent number: 7268624Abstract: Offset voltages in differential amplifiers are minimized by controlling compensation currents through the load impedances of the amplifiers. The currents are varied while sensing the polarity of the offset voltage. When the polarity changes, the current values are latched to keep the offset voltage at a minimum.Type: GrantFiled: August 15, 2005Date of Patent: September 11, 2007Assignee: International Business Machines CorporationInventors: Minhan Chen, Westerfield John Ficken, Louis Lu-Chen Hsu, Steven J. Zier -
Patent number: 7265611Abstract: Apparatus (1) for continuous-time application, comprising an operational amplifier (2) and a self-zeroing control unit (3) for reducing an offset of the operational amplifier (2). The self-zeroing control unit (3) provides for a self zeroing operation mode and a normal operation mode. It comprises a comparator (6), a successive approximation register (7), and a digital-to-analog converter (8).Type: GrantFiled: January 28, 2004Date of Patent: September 4, 2007Assignee: NXP B.V.Inventor: Zhenhua Wang
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Publication number: 20070200619Abstract: A preamplifier circuit includes a differential amplifying unit, an offset detection unit and a reference signal generation unit. The differential amplifying unit compares an input signal pair with a reference signal pair to generate an output signal pair. The offset detection unit detects an offset of the output signal pair received from the differential amplifying unit to generate a calibration signal in an offset calibration mode. The reference signal generation unit adjusts the reference signal pair based on the calibration signal, and the reference signal pair is fed-back to the differential amplifying unit.Type: ApplicationFiled: February 27, 2007Publication date: August 30, 2007Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Young-Chan JANG
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Patent number: 7259630Abstract: A predistorer configured for use with an RF power amplifier having an input loop configured to be coupled to the input of the RF power amplifier and peak control circuit. Such an input loop includes a look-up table containing predistortion values to be applied to an input signal, in response to the power in the input signal, for forming a predistorted input signal. The predistorter may further include an output loop, such an output loop configured to measure an intermodulation distortion product of the RF power amplifier output resulting from the predistorted input signal, and operable to update the predistortion values in the look-up table. Such a peak control circuit configured to select a power supply voltage for the RF power amplifier in response to the power in the input signal.Type: GrantFiled: July 23, 2003Date of Patent: August 21, 2007Assignee: Andrew CorporationInventors: Thomas A. Bachman, II, Breck W. Lovinggood
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Patent number: 7259618Abstract: Systems and methods for detecting the impedance of an output load coupled to a digital amplifier and compensating for changes in the response of the amplifier. One embodiment of the invention is implemented in a Class D pulse width modulated (PWM) amplifier. In this embodiment, a digital PCM test signal is generated. This test signal is processed by the amplifier to produce a corresponding analog audio output signal that is used to drive a speaker. A sense resistor placed in series with the speaker is used to generate a test voltage that is compared to a reference voltage. When the test voltage reaches the reference voltage, the current through the sense resistor (hence the speaker) is at a known level, so the value of the digital test signal is noted. The impedance of the speaker is then determined from the test signal value and the speaker current.Type: GrantFiled: August 25, 2005Date of Patent: August 21, 2007Assignee: D2Audio CorporationInventors: Larry E. Hand, Wilson E. Taylor
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Patent number: 7256647Abstract: An output of a common mode differential amplifier is initialized to a known state, which includes inputting a voltage to a network conductor of an electronic assembly, where the network conductor is coupled to a first input node of a first differential input of the amplifier. The amplifier is on an integrated circuit chip of the assembly and has a self-bias node. Circuitry of the amplifier normally adjusts to obtain an equilibrium voltage on the self-bias node in response to the inputted voltages. To initialize the amplifier output, however, preset circuitry on the integrated circuit chip overrides the normal equilibrium voltage on the self-bias node, forcing the self-bias node to a predetermined voltage regardless of the amplifier input voltages. In response, the amplifier produces an desired initial output state on a first output node of the amplifier.Type: GrantFiled: August 29, 2005Date of Patent: August 14, 2007Assignee: International Business Machines CorporationInventors: Albert A. DeBrita, Michael J. Lencioni
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Patent number: 7242244Abstract: An arrangement for testing a power output stage, with the power output stage includes at least one half bridge with an upper semiconductor switch and a lower semiconductor switch connected in series and to which an operating voltage is applied. A junction point between the semiconductor switches of the at least one half bridge forms an output. A control device performs a test to determine whether the voltage at the output is within a predetermined central tolerance band when the semiconductor switches are not switched on, a test to determine whether the voltage at the output is within a predetermined upper tolerance band when the upper semiconductor switch is switched on, and a test to determine whether the voltage at the output is within a predetermined lower tolerance band when the lower semiconductor switch is switched on. The power output stage is identified as being sound when all of the output voltages are within the respective tolerance bands.Type: GrantFiled: May 10, 2004Date of Patent: July 10, 2007Assignee: Siemens AktiengesellschaftInventors: Wolfgang Bay, Patrick Fischer, Michael Henninger
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Patent number: 7230480Abstract: A method, apparatus, article of manufacture, and a memory structure provide the ability to determine an input operating point and an output operating point on a non-linear traveling wave tube amplifier (TWTA). The non-linearity of the TWTA is measured. An input roots mean-square (RMS) value of an input signal used to measure the non-linearity of the TWTA is computed. The RMS value identifies an input operating point of the measured non-linearity of the TWTA. Lastly, an output operating point is obtained.Type: GrantFiled: October 17, 2003Date of Patent: June 12, 2007Assignee: The DirecTV Group, Inc.Inventors: Ernest C. Chen, Shamik Maitra
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Patent number: 7230478Abstract: In a method and apparatus for of balancing the phases of a plurality of amplifier modules so as to maximize the combined power output of the amplifier modules an amplifier module is selected as a reference module with a fixed phase in a first step. In a second and subsequent steps, the phase of each of the other amplifier modules is each adjusted relative to the reference module, such that the combined power output from the respective individual amplifier module and the reference module is minimized. Finally, the phase of the reference module is rotated by 180°.Type: GrantFiled: February 4, 2005Date of Patent: June 12, 2007Assignee: EADS Deutschland GmbHInventors: Gebhard Hoffman, Andreas Salomon
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Patent number: 7224215Abstract: A system and method of optimizing the output power of a power amplifier to maintain satisfactory RF response under varying power amplifier operating conditions. The operating conditions include operating temperature, supply voltage, and operating frequency. Existing sensors monitor the aforementioned operating conditions. An application within the wireless device containing the power amplifier continuously or periodically logs the current operating conditions and finds them in a look-up table stored internally. The look-up table is comprised of empirically derived maximum sustainable power output levels for each operating condition. Once the current operating conditions are matched to a set in the table, current power amplifier power output is reset, if necessary, to the maximum sustainable power output defined in the table.Type: GrantFiled: February 21, 2005Date of Patent: May 29, 2007Assignee: Sony Ericsson Mobile Communications ABInventor: William R. Osborn
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Patent number: 7202731Abstract: A system and method for predicting and limiting distortion of an amplified signal is described. The system includes a variable total harmonic distortion (“THD”) clipping predictor, a comparator in communication with the variable THD clipping predictor and a distortion limiter in communication with the comparator. As for the method, a reference power supply value, a maximum desired total harmonic distortion value and a preamplified signal value is provided. A THD output threshold value is calculated based on the reference power supply value and the maximum desired THD value and is then compared to the preamplified signal value. Depending on if the preamplified signal value is greater than or less than the THD output threshold value, the amplitude of the preamplified signal may be increased or decreased.Type: GrantFiled: June 17, 2005Date of Patent: April 10, 2007Assignee: Visteon Global Technologies, Inc.Inventors: Andrew C. Krochmal, John E. Whitecar, David P. Stewart