With Amplifier Condition Indicating Or Testing Means Patents (Class 330/2)
  • Patent number: 7346100
    Abstract: Estimation of gain and phase imbalance of an upconverting transmitter. A transmitter transmits symbols containing vector components of pre-specific relationship in an analog signal. A receiver (also contained in a transceiver along with the transmitter) examines the symbols to determine the phase and gain imbalances in the transmitter based on the analog signal. An aspect of the present invention enables the balance estimation circuit to be integrated along with the transmitter and the receiver into a single monolithic integrated circuit.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: March 18, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Anil Kv Kumar
  • Patent number: 7345538
    Abstract: A measuring circuit for the output of a power amplifier and a power amplifier comprising the measuring circuit comprises a first transistor (4f). The output current (27) of the first transistor (4f) is characteristic of the output current (28) of the amplifier (20), in particular, the above is essentially proportional to the output current (28) of the amplifier (20). The first transistor (4f) is controlled in parallel to at least one second transistor (4a-4e), driving the amplifier output (8).
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: March 18, 2008
    Assignee: Infineon Technologies AG
    Inventor: Elmar Wagner
  • Patent number: 7332958
    Abstract: An analog-differential-circuit test device includes transfer gates 13 and 14 for isolating in the test mode an input pair of an analog differential circuit from input nodes IN and INB, a voltage adjusting circuit for generating a voltage pair controlled by a control signal fed from outside of the LSI and input to the input pair during the test mode, and a flip-flop for latching an output from the analog differential circuit. A High-output input characteristic and a Low-output input characteristic of the analog differential circuit itself are measured in the LSI.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: February 19, 2008
    Assignee: NEC Corporation
    Inventor: Yusuke Matsushima
  • Patent number: 7330704
    Abstract: A method and circuitry for pre-conditioning an electrical signal. The method comprises limiting the strength of the signal to not exceed a limit signal strength corresponding to the onset of substantial non-linear response of an amplifier to which the limited signal is to be supplied for amplification.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: February 12, 2008
    Assignee: Filtronic PLC
    Inventor: Nicholas David Archer
  • Patent number: 7323929
    Abstract: An apparatus for biasing a transistor, comprising: a controllable bias generator; a test circuit; a digital Mth order differentiator responsive to an output of the test circuit; and a controller responsive to the digital Mth order differentiator for controlling the controllable bias generator; wherein the test circuit is configured to calculate an Lth order derivative of the transistor's performance.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: January 29, 2008
    Assignee: Analog Devices Inc.
    Inventor: Jonathan Richard Strange
  • Patent number: 7295060
    Abstract: Single port characterization of RF amplifier phase and amplitude transfer functions are developed by measuring the output of the amplifier as it is excited by a predetermined frequency over a series of bias steps. One bias step is chosen as a reference level. Amplitude characterization is obtained from measured magnitude at each step in the test sequence. Phase information is extracted from the same measurements by measuring phase and phase trajectory at a reference level, and subtracting measured phase information at a desired step in the test sequence from an estimation of the reference phase trajectory at that step. Reference measurements may be interspersed with other measurements.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: November 13, 2007
    Assignee: Agilent Technologies, Inc.
    Inventor: George Stennis Moore
  • Publication number: 20070247217
    Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.
    Type: Application
    Filed: August 24, 2006
    Publication date: October 25, 2007
    Inventors: David F. Sorrells, Gregory S. Rawlins, Michael W. Rawlins
  • Patent number: 7286060
    Abstract: A vacuum tube replacement device includes an indicator. The indicator can be arranged to provide audible and/or visual indication of system performance, function, status, or any other desired indication. The vacuum tube replacement device is pin-for-pin compatible with standard vacuum tube circuit pin configurations. The replacement device may be a solid-state tube emulator device, a traditional glass envelope vacuum tube device, or some other hybrid device. The visual indicator is equally useful for non-vacuum tube replacement devices such as audio amplifier circuits.
    Type: Grant
    Filed: August 12, 2005
    Date of Patent: October 23, 2007
    Assignee: Roberts Retrovalve, Inc.
    Inventors: Douglas H. Roberts, Brett A. Hertzberg
  • Patent number: 7286613
    Abstract: The invention relates to processes and devices which make it possible to directly modulate an RF carrier with a quadrature signal. It consists in filtering (504) this quadrature signal around zero so as to introduce alternately (507, 508) on each of the channels a low-frequency subcarrier that will serve as reference. Each of these channels is alternately demodulated in a synchronous manner (519) cosine-wise and sine-wise. The demodulation signal is filtered (523) so as to recover the subcarrier marred by modulation errors. The measurement of these errors (524) allows feedback correction (503) of the quadrature signal. It makes it possible to perform the major part of the operations in the digital processor (501) and enables direct vector modulation to be made possible at millimeter frequencies.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: October 23, 2007
    Assignee: Thomson Licensing
    Inventors: François Baron, Jean-Yves Le Naour, Jean-Luc Robert
  • Patent number: 7271649
    Abstract: A DC offset calibration device for calibrating a DC offset of an output signal of a gain stage, the DC offset calibration device includes: a digital-to-analog converter (DAC) electrically connected to the gain stage for generating an offset current according to the DC offset of the output signal of the gain stage; and a current-to-current converter electrically connected to the DAC and the gain stage for reducing the signal scale of the offset current to generate a compensation signal so as to reduce the DC offset at the output of the gain stage.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: September 18, 2007
    Assignee: Mediatek Inc.
    Inventors: Chinq-Shiun Chiu, Chih-Hsien Shen, Shou-Tsung Wang, Chi-Kun Chiu
  • Patent number: 7268624
    Abstract: Offset voltages in differential amplifiers are minimized by controlling compensation currents through the load impedances of the amplifiers. The currents are varied while sensing the polarity of the offset voltage. When the polarity changes, the current values are latched to keep the offset voltage at a minimum.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: September 11, 2007
    Assignee: International Business Machines Corporation
    Inventors: Minhan Chen, Westerfield John Ficken, Louis Lu-Chen Hsu, Steven J. Zier
  • Patent number: 7265611
    Abstract: Apparatus (1) for continuous-time application, comprising an operational amplifier (2) and a self-zeroing control unit (3) for reducing an offset of the operational amplifier (2). The self-zeroing control unit (3) provides for a self zeroing operation mode and a normal operation mode. It comprises a comparator (6), a successive approximation register (7), and a digital-to-analog converter (8).
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: September 4, 2007
    Assignee: NXP B.V.
    Inventor: Zhenhua Wang
  • Publication number: 20070200619
    Abstract: A preamplifier circuit includes a differential amplifying unit, an offset detection unit and a reference signal generation unit. The differential amplifying unit compares an input signal pair with a reference signal pair to generate an output signal pair. The offset detection unit detects an offset of the output signal pair received from the differential amplifying unit to generate a calibration signal in an offset calibration mode. The reference signal generation unit adjusts the reference signal pair based on the calibration signal, and the reference signal pair is fed-back to the differential amplifying unit.
    Type: Application
    Filed: February 27, 2007
    Publication date: August 30, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Young-Chan JANG
  • Patent number: 7259630
    Abstract: A predistorer configured for use with an RF power amplifier having an input loop configured to be coupled to the input of the RF power amplifier and peak control circuit. Such an input loop includes a look-up table containing predistortion values to be applied to an input signal, in response to the power in the input signal, for forming a predistorted input signal. The predistorter may further include an output loop, such an output loop configured to measure an intermodulation distortion product of the RF power amplifier output resulting from the predistorted input signal, and operable to update the predistortion values in the look-up table. Such a peak control circuit configured to select a power supply voltage for the RF power amplifier in response to the power in the input signal.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: August 21, 2007
    Assignee: Andrew Corporation
    Inventors: Thomas A. Bachman, II, Breck W. Lovinggood
  • Patent number: 7259618
    Abstract: Systems and methods for detecting the impedance of an output load coupled to a digital amplifier and compensating for changes in the response of the amplifier. One embodiment of the invention is implemented in a Class D pulse width modulated (PWM) amplifier. In this embodiment, a digital PCM test signal is generated. This test signal is processed by the amplifier to produce a corresponding analog audio output signal that is used to drive a speaker. A sense resistor placed in series with the speaker is used to generate a test voltage that is compared to a reference voltage. When the test voltage reaches the reference voltage, the current through the sense resistor (hence the speaker) is at a known level, so the value of the digital test signal is noted. The impedance of the speaker is then determined from the test signal value and the speaker current.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: August 21, 2007
    Assignee: D2Audio Corporation
    Inventors: Larry E. Hand, Wilson E. Taylor
  • Patent number: 7256647
    Abstract: An output of a common mode differential amplifier is initialized to a known state, which includes inputting a voltage to a network conductor of an electronic assembly, where the network conductor is coupled to a first input node of a first differential input of the amplifier. The amplifier is on an integrated circuit chip of the assembly and has a self-bias node. Circuitry of the amplifier normally adjusts to obtain an equilibrium voltage on the self-bias node in response to the inputted voltages. To initialize the amplifier output, however, preset circuitry on the integrated circuit chip overrides the normal equilibrium voltage on the self-bias node, forcing the self-bias node to a predetermined voltage regardless of the amplifier input voltages. In response, the amplifier produces an desired initial output state on a first output node of the amplifier.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: August 14, 2007
    Assignee: International Business Machines Corporation
    Inventors: Albert A. DeBrita, Michael J. Lencioni
  • Patent number: 7242244
    Abstract: An arrangement for testing a power output stage, with the power output stage includes at least one half bridge with an upper semiconductor switch and a lower semiconductor switch connected in series and to which an operating voltage is applied. A junction point between the semiconductor switches of the at least one half bridge forms an output. A control device performs a test to determine whether the voltage at the output is within a predetermined central tolerance band when the semiconductor switches are not switched on, a test to determine whether the voltage at the output is within a predetermined upper tolerance band when the upper semiconductor switch is switched on, and a test to determine whether the voltage at the output is within a predetermined lower tolerance band when the lower semiconductor switch is switched on. The power output stage is identified as being sound when all of the output voltages are within the respective tolerance bands.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: July 10, 2007
    Assignee: Siemens Aktiengesellschaft
    Inventors: Wolfgang Bay, Patrick Fischer, Michael Henninger
  • Patent number: 7230480
    Abstract: A method, apparatus, article of manufacture, and a memory structure provide the ability to determine an input operating point and an output operating point on a non-linear traveling wave tube amplifier (TWTA). The non-linearity of the TWTA is measured. An input roots mean-square (RMS) value of an input signal used to measure the non-linearity of the TWTA is computed. The RMS value identifies an input operating point of the measured non-linearity of the TWTA. Lastly, an output operating point is obtained.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: June 12, 2007
    Assignee: The DirecTV Group, Inc.
    Inventors: Ernest C. Chen, Shamik Maitra
  • Patent number: 7230478
    Abstract: In a method and apparatus for of balancing the phases of a plurality of amplifier modules so as to maximize the combined power output of the amplifier modules an amplifier module is selected as a reference module with a fixed phase in a first step. In a second and subsequent steps, the phase of each of the other amplifier modules is each adjusted relative to the reference module, such that the combined power output from the respective individual amplifier module and the reference module is minimized. Finally, the phase of the reference module is rotated by 180°.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: June 12, 2007
    Assignee: EADS Deutschland GmbH
    Inventors: Gebhard Hoffman, Andreas Salomon
  • Patent number: 7224215
    Abstract: A system and method of optimizing the output power of a power amplifier to maintain satisfactory RF response under varying power amplifier operating conditions. The operating conditions include operating temperature, supply voltage, and operating frequency. Existing sensors monitor the aforementioned operating conditions. An application within the wireless device containing the power amplifier continuously or periodically logs the current operating conditions and finds them in a look-up table stored internally. The look-up table is comprised of empirically derived maximum sustainable power output levels for each operating condition. Once the current operating conditions are matched to a set in the table, current power amplifier power output is reset, if necessary, to the maximum sustainable power output defined in the table.
    Type: Grant
    Filed: February 21, 2005
    Date of Patent: May 29, 2007
    Assignee: Sony Ericsson Mobile Communications AB
    Inventor: William R. Osborn
  • Patent number: 7202731
    Abstract: A system and method for predicting and limiting distortion of an amplified signal is described. The system includes a variable total harmonic distortion (“THD”) clipping predictor, a comparator in communication with the variable THD clipping predictor and a distortion limiter in communication with the comparator. As for the method, a reference power supply value, a maximum desired total harmonic distortion value and a preamplified signal value is provided. A THD output threshold value is calculated based on the reference power supply value and the maximum desired THD value and is then compared to the preamplified signal value. Depending on if the preamplified signal value is greater than or less than the THD output threshold value, the amplitude of the preamplified signal may be increased or decreased.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: April 10, 2007
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Andrew C. Krochmal, John E. Whitecar, David P. Stewart
  • Patent number: 7202737
    Abstract: The present invention relates to a method of influencing an input signal (x), in particular an input signal of a power amplifier of a wireless communication system, wherein said input signal (x) has a range of input amplitudes (r0, . . . , rM?1), wherein a correction signal (?(x)) depending on said input signal (x) is generated, and wherein said input signal (x) is influenced depending on said correction signal (?(x)). A generation of said correction signal (?(x)) is based on a plurality of base functions (?1, ?2, . . . , ?N?1), and said range of input amplitudes (r0, . . . , rM?1) is divided into intervals (r0,r1),(r1,r2), . . . ,(rM?2,rM?1), wherein each of said base functions (?1, ?2, . . . , ?N?1) contributes to said correction signal (?(x)) in a limited number of intervals ((r0,r1),(r1,r2), . . . ,(rM?2,rM?1)). Thus it is possible to change parts of the correction signal by adapting some of said base functions without influencing the whole correction signal.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: April 10, 2007
    Assignee: Alcatel
    Inventors: Jörg Schaepperle, Gabriele Schwoerer, Thomas Bohn
  • Patent number: 7200369
    Abstract: A linear amplification with nonlinear components (LINC) power transmitter is provided. The LINC power transmitter includes a digital signal processing unit which controls the LINC power transmitter; a frequency modulation unit which modulates or converts a digital signal output from the digital signal processing unit into a radio-frequency (RF) signal; a signal amplification unit which amplifies the RF signal output from the frequency modulation unit using a gain amplifier and a power amplification module; and a direct current/direct current (DC/DC) conversion unit which controls bias of the power amplification module. Here, the DC/DC conversion unit controls a base bias and/or a collect bias of the power amplification module, and the power amplification module operates in saturation.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: April 3, 2007
    Assignee: Postech Foundation
    Inventors: Bumman Kim, Youngoo Yang, Young Yun Woo, Jae Hyok Yi, Seung Woo Kim
  • Patent number: 7193461
    Abstract: A pre-distorter that compensates for amplitude and phase distortion created by an amplifier. During a training session, the amplifier is stimulated with input signals of pre-selected amplitude and phase at various temperatures and the amplifier output is captured and converted into data sets. Polynomials are then fitted to the data sets and inverses of the polynomials are determined. The coefficients of the inverse polynomials are then saved for each temperature. During operation, the amplifier temperature is predicted based on the amplifier input signal and the coefficients associated with the predicted temperature are selected to be applied to the input signal to compensate for amplitude and phase distortion caused by the amplifier.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: March 20, 2007
    Assignee: Agere Systems Inc.
    Inventors: Mohammad Shafiul Mobin, Jeffrey H. Saunders, Lane A. Smith
  • Patent number: 7161418
    Abstract: An amplifier arrangement is disclosed that includes at least two series-connected, programmable amplifiers. The amplifiers each have a different amplifier step size. In addition, a calibration path is provided which feeds back the output of the second programmable amplifier to the programming inputs of the first and/or second programmable amplifier. The calibration path includes an analog/digital converter and an evaluation and control element. It is thus possible to calibrate away less-than-ideal characteristics, particularly in the case of changes in the gain from one amplifier block to another. The proposed amplifier arrangement and the method for calibration are particularly suitable for use in transmission and reception paths in transceivers which operate continuously over time.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: January 9, 2007
    Assignee: Infineon Technologies AG
    Inventor: Zdravko Boos
  • Patent number: 7154329
    Abstract: An amplifier circuit includes a calibration circuit with a controllable circuit element such as a digital resistor. One or more properties of the controllable circuit element (e.g., the resistance in a digital resistor) is varied by a digital calibration word such that the voltage drop across the resistor matches a reference voltage. The calibration word is also used to control the resistance of a transistor that forms a part of a power amplifier to compensate for temperature and process variations. The amplifier may be a switching power amplifier, and the transistor may be a segmented transistor with the width (and hence the channel resistance) controlled by the digital calibration word.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: December 26, 2006
    Assignee: M/A-COM, Inc.
    Inventor: Dale Scott Douglas
  • Patent number: 7151403
    Abstract: Feedback for self-calibration of any parameter in an analog and/or digital system is described wherein a system quality factor can be represented by a voltage or current differential. The preferred embodiment is operative to alternately supply two or more optimally equivalent currents or voltages from such a system, detect amplitude and/or phase feedback of resultant output signal at the frequency of the alternation, and use feedback to modify a calibration value, voltage, or current so as to minimize or maximize the feedback, thus effecting self-calibration of the system. Such a method and attendant apparatus enables system self-calibration without need of any high-precision or high-cost components.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: December 19, 2006
    Assignee: Jam Technologies, Inc.
    Inventor: Larry Kirn
  • Patent number: 7138858
    Abstract: A buffer circuitry buffers a radio-frequency (RF) signal. The buffer circuitry includes a complementary pair of switches and a power source. The a complementary pair of switches has an input terminal and output terminal. The input terminal of the complementary pair of switches responds to the RF signal. The output terminal of the complementary pair of switches couples to an output of the buffer circuitry. The power source includes a capacitor coupled to a current source. The power source couples to the complementary pair of switches. The power source supplies power to the complementary pair of switches in a manner that the buffer circuitry supplies a substantially constant power level at its output.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: November 21, 2006
    Assignee: Silicon Laboratories, Inc.
    Inventors: Augusto M. Marques, Donald A. Kerth, Richard T. Behrens, Jeffrey W. Scott, G. Diwakar Vishakhadatta, G. Tyson Tuttle, Vishnu S. Srinivasan
  • Patent number: 7135916
    Abstract: A digitally adjustable amplifier with adjustable input offset voltage and amplification parameters for use in integrated circuits. Such adjustments are carried out by a binary counter which controls a non-binary weighting element which by a non-binary weighting of each stage to the next stage intentionally has a non-linearity of the ideal characteristic curve because of greater negative steps at increasing value count so that the steps remain below one least significant bit. Thus greater errors even can be tolerated, and a desired value can be very closely attained.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: November 14, 2006
    Inventor: Albrecht Schmidt
  • Patent number: 7126413
    Abstract: A method and related circuit structure correlate the transconductance value of transistors of different type, for example MOS transistors and bipolar transistors. The structure comprises a first differential cell formed by transistors of the first type and a second differential cell formed by transistors of the second type connected to each other by means of a circuit portion responsible for calculating an error signal obtained as difference between the cell differential currents and applied to said first differential cell and to an output node of the same circuit structure obtaining a transconductance correlation independent from process tolerances and temperature.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: October 24, 2006
    Assignee: Simicroelectronics, S.R.L.
    Inventors: Pietro Filoramo, Giovanni Calì
  • Patent number: 7119611
    Abstract: On-chip calibrated source termination for voltage mode driver. An amplifier is disclosed having an internal amplifier with a first output and a second output, the first output interfaced to a non-inverting input through an interface. The second output is coupled to the first output through a series resistance element. The output impedance of the amplifier is determined by the ratio of the current drive of the first and second outputs. The voltage on said second output being a function of said interface and the current input to said internal amplifier.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: October 10, 2006
    Assignee: Vitesse Semiconductor Corporation
    Inventors: Eric James Wyers, Dan Stiurca, John James Paulos
  • Patent number: 7116167
    Abstract: A predistortion linearizer may include a digital signal processor (DSP) for modeling a nonlinear characteristic of a high power amplifier (HPA) on a real time basis; a distortion signal generator for generating a distortion signal by using the signal modeled by the DSP; and a main path unit for combining the output signal of the HPA and the distortion signal of the distortion signal generator and transmitting an input signal without a distortion component. Since the nonlinear characteristic of the power amplifier is modeled on a real time basis to remove the distortion component contained in the output signal of the power amplifier, the nonlinear characteristic of the power amplifier is improved, and thus, an efficiency of the power amplifier can be maximized.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: October 3, 2006
    Assignee: LG Electronics Inc.
    Inventor: Kwang-Eun Ahn
  • Patent number: 7091779
    Abstract: In the present invention a completely different approach for modeling of non-linear devices or processes is used. A cascade of blocks each depending on a non-linearity parameter are utilized both in non-linear modeling and a pre-distorter design. The new non-linear model description can be used for characterization of a non-linear system or for linearizing a non-linear system. Application to a Communications System Multi-carrier Amplifier is shown as an application example. Also for other application areas of the new mathematical method is feasible echo-canceling, non-linear communications channels etc. Parameter extractions and tables for the new model do not give multiple dimensional mathematical solutions for parameter extractions as in prior art.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: August 15, 2006
    Assignee: Telefonatiebolaget LM Ericsson (publ)
    Inventor: Karl-Gosta Sahlman
  • Patent number: 7088173
    Abstract: A method for tuning phase relationships for a multi-port amplifier. The method includes providing a plurality of amplifiers arranged in a multi-port configuration, which has more than two amplifiers. The method includes selecting one of a plurality of test patterns to be input into one or more of the plurality of amplifiers to detect phase information of one or more of the amplifiers and detecting an output signal at a designated output coupled to the plurality of amplifiers. The method also includes adjusting a phase relation of the one or more amplifiers based upon the output signal.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: August 8, 2006
    Assignee: Lockheed Martin Corporation
    Inventors: Novellone Rozario, Herbert Joseph Wolkstein
  • Patent number: 7084703
    Abstract: An amplifier linearizer includes a signal adjuster having an internal signal, and an adaptation controller for monitoring the signal adjuster. The internal signal at an input to the adaptation controller is deemed a monitor signal. The adaptation controller generates a control signal for the signal adjuster by accounting for a difference between the internal and monitor signals.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: August 1, 2006
    Assignee: Andrew Corporation
    Inventors: James K. Cavers, Thomas Johnson
  • Patent number: 7081791
    Abstract: A low noise amplifier circuit (10) includes an attenuator (12) for receiving a calibration signal and generating an attenuated calibration signal. A low noise amplifier (14) amplifies the attenuated calibration signal in calibration mode or amplifies a functional signal in functional mode. In calibration mode, a envelope detector/comparator (16) compares the calibration signal with the output of the low noise amplifier and generates a compensation signal indicating a deviation between the two signals. The gain of the low noise amplifier is adjusted responsive to the compensation signal.
    Type: Grant
    Filed: April 7, 2004
    Date of Patent: July 25, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Lorenzo M. Carpineto, Eric Duvivier, Stefano Cipriani
  • Patent number: 7079818
    Abstract: A programmable multi-stage amplifier includes a 1st programmable amplifier, a 2nd programmable amplifier, and a control module. The 1st and 2nd programmable amplifiers are coupled in series to amplify an input signal. Each of the 1st and 2nd programmable amplifiers is operably coupled to receive independent gain control signals from the control module. The control module generates the gain control signals by determining the overall gain desired for the programmable multi-stage amplifier and a corresponding gain for each of the 1st and 2nd programmable amplifiers. The factors in which the control module makes this determination are based on an optimization of at least one of the power level of the programmable multi-stage amplifier, the noise factor for the programmable multi-stage amplifier, and/or linearity of the programmable multi-stage amplifier.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: July 18, 2006
    Assignee: Broadcom Corporation
    Inventor: Shahla Khorram
  • Patent number: 7071782
    Abstract: A device for amplifying or attenuating HF signals is characterized in that a transistor is connected in a common-emitter configuration in amplifying operation, and a base-collector diode is connected in the forward-biased direction for attenuating operation.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: July 4, 2006
    Assignee: NEC Electronics (Europe) GmbH
    Inventor: Ulrich Delpy
  • Patent number: 7026866
    Abstract: Techniques for DC offset cancellation are described. According to one embodiment, an amplifier has at least one output and first and second supply rails. The amplifier includes offset cancellation logic which is operable in a calibration mode to generate a first offset cancellation signal when the at least one output is coupled to a first voltage corresponding to the first supply rail, and a second offset cancellation signal when the at least one output is coupled to a second voltage corresponding to the second supply rail. The offset cancellation logic is further operable to facilitate at least partial cancellation of an offset voltage associated with the at least one output during a normal operation mode using a third offset cancellation signal which substantially corresponds to an average of the first and second offset cancellation signals.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: April 11, 2006
    Assignee: Tripath Technology, Inc.
    Inventor: William D. Llewellyn
  • Patent number: 7026865
    Abstract: An analogue amplifier with multiplexing capability, without the need to incorporate a multiplexor, comprising an input port, a test input port, an output port, a control input to switch the amplifier between a normal amplifying mode and a test mode, wherein a analogue signal introduced to the input port is amplified to the output port in normal mode, and a test signal on the test port is routed to the output port when the amplifier is in test mode.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: April 11, 2006
    Assignee: Infineon Technologies AG
    Inventor: Javier Arguelles
  • Patent number: 7015760
    Abstract: A method of operating an amplifier, for example, in a wireless radio transceiver, including monitoring a characteristic of the amplifier during an operating interval of the amplifier, for example, during a transmission burst, providing an open-loop control signal to the amplifier during a subsequent operating interval of the amplifier wherein the open-loop control signal based on the characteristic monitored during a previous operating interval. In one embodiment, the corrected control signals are stored in a look-up table (510) that is updated based on the changes in load impedance.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: March 21, 2006
    Assignee: Motorola, Inc.
    Inventors: Lazaar J. Louis, Matt C. Hayek
  • Patent number: 7005918
    Abstract: A current-to-voltage converting apparatus connected to an element or a circuit having a first terminal connected to a signal source and comprising a feedback amplifier, which is connected to a second terminal of the element or the circuit and keeps the second terminal at virtual ground, and which converts the current signals that flow to the element or the circuit to voltage signals and outputs these signals; a device for opening the feedback loop of the feedback amplifier and measuring the open-loop loss of the feedback loop; and a compensating amplifier, which compensates for the open-loop loss. It further comprises a device for measuring the open-loop phase shift of the feedback loop when the feedback loop is open and a control unit for keeping the open-loop phase shift at a pre-determined value.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: February 28, 2006
    Assignee: Agilent Technologies, Inc.
    Inventor: Yukoh Iwasaki
  • Patent number: 6998909
    Abstract: Methods and apparatus are provided for nonlinear compensation of a supposedly linear behaving semiconductor device (e.g., power amplifier). A measure corresponding to the temperature of the silicon in the semiconductor device can be derived from both current and previous inputs using a filter (e.g., infinite impulse response or finite impulse response). This measure can then be used as an index, or address, of a lookup table. The lookup table is continually updated through a feedback loop where the updated lookup table values (e.g., correction factors) are based on the differences between the desired output signals and the measured output signals. A lookup table value, when combined with an input signal, will distort the input signal in an amount that is substantially an inverse of the distortion introduced by the semiconductor device. As a result, an output signal that is in substantial linear relationship with the input signal can be achieved.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: February 14, 2006
    Assignee: Altera Corporation
    Inventor: Volker Mauer
  • Patent number: 6956430
    Abstract: A distortion detector comprises a clip detector to generate a distortion pulse, processing means to calculate the duty cycle of the distortion pulse and comparator means for supplying a control signal when the calculated duty cycle exceeds a certain threshold value. This control signal can be used, for example, the reduce the volume of audio reproduction.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: October 18, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Gerrit Frederik Magdalena De Poortere
  • Patent number: 6949976
    Abstract: A distortion compensating amplifier device is disclosed that maintains uniform delay amounts between a transmission input signal and a transmission output signal, even if there is a change in the device characteristics. The distortion compensating amplifier device of a digital predistortion type includes a second delay circuit that delays the transmission input signal; a distortion compensating circuit that performs predistortion compensation on the delayed signal, using a distortion compensating parameter; an amplifier that amplifies the signal subjected to the predistortion compensation; a first delay circuit that further delays the signal delayed by the second delay circuit; and a calculator that calculates the distortion compensating parameter to be used in the predistortion compensation, based on the difference between the signal output from the first delay circuit and the amplified signal.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: September 27, 2005
    Assignee: Fujitsu Limited
    Inventors: Yasuhito Funyu, Takao Sasaki, Hiromi Miyamoto, Takeshi Ohba
  • Patent number: 6927624
    Abstract: A method and circuit is provided for improving the control of the trimming procedure for various devices without the need for additional dedicated control pins. Instead, the trimming procedure is controlled through sensing of changes in current and/or voltage applied through the existing available pins or bondpads of the devices to determine whether a command for trim programming has occurred. As a result, package-level trimming of the devices can be conducted in standard device packages having low pin count configurations, such as operational amplifiers, instrumentation amplifiers, difference amplifiers, low drop-out regulators, voltage references and other similar types of devices. A device to be trimmed is configured with internal circuitry configured to sense changes in current and/or voltage in the output or supply voltage of the device, and a test system for applying changes in the current and/or voltage through the existing available pins or bondpads of the devices.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: August 9, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Vadim V. Ivanov, Stephen J. Sanchez, David M. Jones, David Spady
  • Patent number: 6924699
    Abstract: Apparatus, methods and articles of manufacture are disclosed for digital signal modification. Various wave characteristics of an electromagnetic wave may be modified according to desired values. Those values are provided to one or more current sources, wherein the output values of the current sources are modified accordingly.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: August 2, 2005
    Assignee: M/A-Com, Inc.
    Inventor: Walid K. M. Ahmed
  • Patent number: 6914943
    Abstract: A phase signal is modulated in quadrature modulation by a quadrature modulator, and the frequency of this modulated phase signal is converted into carrier frequency by a frequency converter. An amplitude signal extracted from the modulating signal is delayed by a delay circuit, and an output gain signal designating the output average power gain is supplied to the output signal of the delay circuit. Synchronization of this frequency modulated phase signal and the amplitude signal delayed and added to the output gain signal allows to obtain an RF signal with little out of band undesired component even if the modulating signal contains amplitude variation. Therefore, the RF signal with little out of band undesired component is output even if the modulating signal contains amplitude variation.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: July 5, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroaki Shimizu
  • Patent number: 6903604
    Abstract: Disclosed is an apparatus and method for modeling and estimating the characteristics of a power amplifier with memory. A predistortion module generates a predistorted signal in response to coefficients of a complex polynomial representative of the amplifier and to an input signal. A power amplifier receives time-spaced samples of the predistorted signal and generates an output signal. A polynomial module updates the coefficients of the complex polynomial in response to a current sample of the output signal and to the time-spaced samples of the predistorted signal. In particular, the complex polynomial is implemented with both even and odd terms.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: June 7, 2005
    Assignee: Lucent Technologies Inc.
    Inventor: Jaehyeong Kim
  • Patent number: 6882217
    Abstract: The present invention includes methods and devices to apply predistortion to correct nonlinearities of a power amplifier in an OFDM symbol transmission system. More particularly, predistortion is patterned to take into account clipping of symbols and to match an effective input range of the predistorter with an average power output of the power amplifier. This invention may be applied to a variety of standards utilizing OFDM technology, including IEEE 802.11a, Hiperlan/2 and MMAC.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: April 19, 2005
    Assignee: 3com Corporation
    Inventor: A. Joseph Mueller