With Amplifier Condition Indicating Or Testing Means Patents (Class 330/2)
  • Publication number: 20040263242
    Abstract: A composite amplifier includes a first and a second power amplifier (16, 18) connected to a Chireix output network (20). Means (10, 22) provide equal first and linear drive signal components that depends linearly on the amplitude A(t) of an amplitude modulated input signal. Further means (10, 24)provide first and second nonlinear drive signal components that have the same magnitude but opposite signs and depend non-linearly as {square root}1-A(t) on the amplitude A(t) and are in quadrature to the first and second linear drive signal components. Means (26, 28, 30, 32) individually adjust amplitudes and phases of the drive signal components to lower drive power consumption.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 30, 2004
    Inventor: Richard Hellberg
  • Publication number: 20040251959
    Abstract: A method and circuit is provided for improving the control of the trimming procedure for various devices without the need for additional dedicated control pins. Instead, the trimming procedure is controlled through sensing of changes in current and/or voltage applied through the existing available pins or bondpads of the devices to determine whether a command for trim programming has occurred. As a result, package-level trimming of the devices can be conducted in standard device packages having low pin count configurations, such as operational amplifiers, instrumentation amplifiers, difference amplifiers, low drop-out regulators, voltage references and other similar types of devices. A device to be trimmed is configured with internal circuitry configured to sense changes in current and/or voltage in the output or supply voltage of the device, and a test system for applying changes in the current and/or voltage through the existing available pins or bondpads of the devices.
    Type: Application
    Filed: June 12, 2003
    Publication date: December 16, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: Vadim V. Ivanov, Stephen J. Sanchez, David M. Jones, David Spady
  • Publication number: 20040246048
    Abstract: The invention provides robust and non-invasive calibration of an adaptive signal conditioning system having a signal conditioning block in the signal path to a signal conversion system, and a feedback path with a number of feedback components for enabling adaptation, by means of a parameter adaptation block, of the parameters used in the signal conditioning. In order to calibrate the feedback path, a well-defined reference signal is inserted into the feedback path, and an appropriate calibration coefficient is then determined by a coefficient calibrator in response to the received reference signal. The calibration coefficient is provided to a compensator, which effectively compensates for changes in the transfer characteristics of the feedback path due to factors such as variations in ambient temperature and component aging.
    Type: Application
    Filed: February 26, 2004
    Publication date: December 9, 2004
    Inventors: Scott Leyonhjelm, Vimar Bjork, John Grass, Lennart Neovius, Paul Leather
  • Patent number: 6812792
    Abstract: A method and apparatus are disclosed for predistorting an input signal to a non-linear amplifier. An appropriate precorrection is determined for the input signal over a series of iterative stages according to an amplifier model. The amplifier model includes a limiting function that clips the input signal to reduce error due to amplifier saturation. The determined precorrection is then applied to the input signal.
    Type: Grant
    Filed: January 2, 2003
    Date of Patent: November 2, 2004
    Assignee: Harris Corporation
    Inventors: Anders S. Mattsson, Carlos Abascal, Wayne Duello, David Danielssons
  • Publication number: 20040201416
    Abstract: On-chip calibrated source termination for voltage mode driver. An amplifier is disclosed having an internal amplifier with a first output and a second output, the first output interfaced to a non-inverting input through an interface. The second output is coupled to the first output through a series resistance element. The output impedance of the amplifier is determined by the ratio of the current drive of the first and second outputs. The voltage on said second output being a function of said interface and the current input to said internal amplifier.
    Type: Application
    Filed: April 11, 2003
    Publication date: October 14, 2004
    Inventors: Eric James Wyers, Dan Stiurea, John James Paulos
  • Patent number: 6794936
    Abstract: A predistortion system compensates or equalizes the phase and/or amplitude response over frequency of at least a portion of a signal path prior to the distortion generating circuitry, such as an amplifier, and/or of at least a portion of a feedback path after the distortion generating circuitry. For example, in a power amplification system using predistortion, an equalizer on the signal path adjusts the phase and amplitude of a predistorted signal across frequency to compensate for the amplitude and phase response of circuitry on the signal path, such as the amplitude and phase response of analog filters in the up-conversion process. After amplification, an equalizer on a feedback path adjusts the phase and amplitude across frequency of the signal representing the output of the amplifier to compensate for the amplitude and phase response of circuitry, such as analog filters in the down-conversion process, on the feedback path.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: September 21, 2004
    Assignee: Lucent Technologies Inc.
    Inventors: Liang Hsu, Jaehyeong Kim, Kyriaki Konstantinou
  • Publication number: 20040150469
    Abstract: Analogue amplifier with multiplexing capability comprising an input port (2) for receiving an analogue signal (S); a test input port (3) for receiving a test signal (T); an output port (5); a control input (4) for receiving a test control signal (CRTL-mode) switching the amplifier (1) between a normal amplifying mode and a test mode; wherein in the normal amplifying mode the analogue signal (S) is amplified and transmitted via said output port (5); wherein in the test mode the test signal (T) is routed to said output port (5).
    Type: Application
    Filed: January 21, 2004
    Publication date: August 5, 2004
    Applicant: Infineon Technologies AG
    Inventor: Javier Arguelles
  • Patent number: 6768434
    Abstract: A high speed x/sine(x) correction circuit for a digital to analog converter (DAC) functions by implementing a filter with an impulse response that approximates a sine(x)/x response. Each digital data value of an input signal to be converted by the DAC is considered a separate impulse. Each impulse, or initial pulse, is used to create a first reflection pulse by delaying the initial pulse by one clock cycle, inverting the delayed initial pulse and multiplying the delayed initial pulse by a constant less than one, such as dividing the delayed initial pulse by right-shifting the digital data value of the delayed initial pulse. The first reflection pulse is added to the input signal in the clock cycle it is generated prior to input to the DAC. A second reflection pulse may be generated in like manner from the first reflection pulse with an additional clock cycle delay for optimum results, both reflection pulses being added to the input signal in the clock cycle they are generated prior to input to the DAC.
    Type: Grant
    Filed: May 15, 2003
    Date of Patent: July 27, 2004
    Assignee: Tektronix, Inc.
    Inventor: Linley F. Gumm
  • Patent number: 6756924
    Abstract: A signal processing apparatus for correcting DC offset in a communication system is provided.
    Type: Grant
    Filed: May 16, 2003
    Date of Patent: June 29, 2004
    Assignee: Integrant Technologies Inc.
    Inventors: Junghwan Lee, Bo-Eun Kim, Jinkyu Lim, Minsu Jeong, Bonkee Kim
  • Patent number: 6750663
    Abstract: The present invention provides for a method (30) and system (10) for isolating the input nodes (3, 4) and/or the output nodes (5, 8) of an analog device (12) and performing continuity testing thereof without using relays. The system includes an analog device having a pair of input and output terminals and a plurality of resistors (R1-R3 and R4-R6) arranged in parallel and connected thereto. The method for testing continuity of the analog device includes providing a voltage input via at least one of the resistors to either input node, and then measuring the voltage at the same node via a resistor. If a diode drop from ground is sensed there is continuity, and if the applied voltage is sensed at the node there is not continuity. As a result, the invention advantageously isolates the nodes and removes any unwanted capacitance and impedance loading thereon during testing thereof.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: June 15, 2004
    Assignee: Texas Instruments Incorporated
    Inventor: Gunvant Patel
  • Patent number: 6744310
    Abstract: A power amplifying device promptly detects an abnormal condition of a load and permits protection of an output without causing power loss. A test signal having a predetermined frequency and signal level is supplied to an amplifier, and the output level is measured. The measured level is compared with the output level that is projected when the test signal is supplied with an appropriate load connected to the amplifier so as to detect a load condition. If a determination result indicates that the load is short-circuited or released, then the operation of the amplifier is promptly interrupted.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: June 1, 2004
    Assignee: Pioneer Corporation
    Inventor: Jun Honda
  • Patent number: 6737919
    Abstract: A method and apparatus for calibrating a Gm cell using a Gm replica cell. A digital to analog converter receives a Gm setting code and generates a reference current. The Gm replica cell adjusts the tuning voltage until the difference between a pair of drain currents is substantially equal to the reference current. Where this condition is satisfied, the proper tuning voltage has been acquired. This results in proper calibration for the tuning voltage, which then may be utilized by a Gm cell connected with the Gm replica cell.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: May 18, 2004
    Assignee: Infineon Technologies North America Corp.
    Inventor: Sasan Cyrusian
  • Patent number: 6737913
    Abstract: A common mode feedback circuit includes first and second nodes defining a differential node pair. A collective plurality of transconductors includes a first plurality of transconductors associated with the first node and a second plurality of transconductors associated with the second node. Each plurality, for example, may consist of 2 transconductors such that one may be serve as a common mode current sink and the other may be operated as a current source during calibration. At least one transconductor of the collective plurality has an adjustable transconductance. In various embodiments, each node has at least one transconductor with an adjustable transconductance. The common mode feedback circuit includes a calibration engine. The calibration engine adjusts at least one adjustable transconductor until a sensed differential voltage across the differential node pair is substantially zero without the use of external current sources.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: May 18, 2004
    Assignee: Silicon Laboratories, Inc.
    Inventor: Marius Goldenberg
  • Patent number: 6737914
    Abstract: A method for removing effects of gain and phase mismatch in amplification branches of a linear amplification using nonlinear components (LINC) system. The method includes receiving an input signal, calculating a relative phase and gain difference in the amplification branches, and generating phasing components. The input signal is then controllably separated into a plurality of branch signals of different but constant envelope. The mismatch between branches may cause each branch signal to have a different envelop. The phases of the branch signals are then appropriately adjusted in a certain amount of corresponding phasing components, such that when the branch signals are recombined, the combined signal substantially replicates the input signal.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: May 18, 2004
    Assignee: 4D Connect, Inc.
    Inventor: Jian Gu
  • Patent number: 6734731
    Abstract: An amplifier linearizer includes a signal adjuster having an internal signal, and an adaptation controller for monitoring the signal adjuster. The internal signal at an input to the adaptation controller is deemed a monitor signal. The adaptation controller generates a control signal for the signal adjuster by accounting for a difference between the internal and monitor signals.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: May 11, 2004
    Assignee: Simon Fraser University
    Inventors: James K. Cavers, Thomas Johnson
  • Patent number: 6731161
    Abstract: An integrated device having a transimpedance amplifier (TIA) cascaded with a limiter can be tested such that the frequency response of the TIA is accurately measured. The frequency response of the TIA is derived from the measured output jitter response of the integrated TIA/limiter device. In a practical testing system, a sinusoidal test signal having a constant amplitude is combined with a broadband noise signal having a constant power level to obtain a noisy test signal. The TIA/limiter is driven by the noisy test signal while the frequency of the test signal is varied. The output jitter of the TIA/limiter is measured for a number of frequency settings to obtain the output jitter response.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: May 4, 2004
    Assignee: Applied Micro Circuits Corporation
    Inventor: Mark O'Leary
  • Patent number: 6727747
    Abstract: Three kinds of shrink factors, 1 time, 0.5 time, and 0.25 time, are prepared and three sets of operational amplifier layout information are also prepared as a library in correspondence with the three kinds of shrink factors. At each shrink factor, the bias voltage is varied between upper and lower limits to vary the bias current.
    Type: Grant
    Filed: January 24, 2002
    Date of Patent: April 27, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kuniyuki Tani, Atsushi Wada
  • Patent number: 6724248
    Abstract: A differential amplifier includes first and second outputs and first and second supply rails. The differential amplifier further includes offset cancellation circuitry. The offset cancellation circuitry is operable during a calibration mode to generate an offset cancellation signal when the first and second outputs are both coupled to a voltage between the first supply rail and the second supply rail. The offset cancellation signal is for facilitating at least partial cancellation of an offset voltage associated with the first and second outputs during a normal operation mode of the differential amplifier.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: April 20, 2004
    Assignee: Tripath Technology, Inc.
    Inventor: William D. Llewellyn
  • Publication number: 20040027195
    Abstract: A digitally adjustable amplifier with adjustable input offset voltage and amplification parameters for use in integrated circuits. Such adjustments are carried out by a binary counter which controls a non-binary weighting element which by a non-binary weighting of each stage to the next stage intentionally has a non-linearity of the ideal characteristic curve because of greater negative steps at increasing value count so that the steps remain below one least significant bit. Thus greater errors even can be tolerated, and a desired value can be very closely attained.
    Type: Application
    Filed: August 7, 2003
    Publication date: February 12, 2004
    Inventor: Albrecht Schmidt
  • Patent number: 6657492
    Abstract: In a method for estimating a non-linear characteristic of an amplifier, an input signal is provided, a reference signal is determined based on the power of the input signal, the input signal is amplified using said amplifier in order to produce an amplified signal, a measurement signal is determined based on the power of the amplified signal and respective samples of the measurement signal are associated with respective samples of the reference signal. A gain value of said amplifier for each sample is determined from the respective samples of the reference signal and the measurement signal. An operating range of the amplifier is divided into a plurality of power sections and an averaged gain value is produced for each power section. Thereafter, a measure of the deviation of the gain values associated with a power section from said averaged gain value is determined. Then, averaged gain values are rejected which have a measure of the deviation which exceeds a predetermined threshold.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: December 2, 2003
    Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Inventors: Rainer Perthold, Heinz Gerhauser, Gerald Ulbricht
  • Patent number: 6642784
    Abstract: A power amplifier module includes an input for receiving a signal having an input power level, at least one power amplifier coupled to the input to increase the input power level of the signal to an output power level and a power calibration and control module coupled to the power amplifier for measuring the output power level and correcting the output power level measurement based on a set of factors. The power calibration and control module further controls the at least one power amplifier to produce an output power level equivalent to a target power level. The power calibration and control module may include a power detector, a power calibrator and a power controller. The power amplifier module may further include a power set interface coupled to the power calibration and control module for providing the target power level.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: November 4, 2003
    Assignee: Analog Devices, Inc.
    Inventor: Robert J. McMorrow
  • Patent number: 6639393
    Abstract: A method of measuring the response of an electronic device to a high frequency input signal is performed with an analyzer (1).
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: October 28, 2003
    Assignee: University College Cardiff Consultants Ltd.
    Inventors: Paul Juan Tasker, Johannes Benedikt
  • Patent number: 6628165
    Abstract: The present invention provides radio frequency (RF) power controllers that regulate the power output signal of an RF power amplifier using a control signal. The RF power controller includes a power control amplifier that measures the difference between a feedback signal and a power control input signal to supply the control signal to the RF power amplifier. The output power signal is amplitude modulated for a period of time during an enable mode. During the amplitude modulation period, the RF power controller opens the power control loop and maintains a substantially constant output voltage to the RF power amplifier using a second amplifier and a capacitor coupled to power control amplifier. The capacitor is decoupled from the power control amplifier during the amplitude modulation period, and the second amplifier supplies the output voltage of the RF power controller based upon the stored voltage on the capacitor.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: September 30, 2003
    Assignee: Linear Technology Corporation
    Inventors: Edward L. Henderson, Samuel H. Nork
  • Publication number: 20030160651
    Abstract: A pad circuit and operating method for automatically adjusting gains is disclosed, wherein the pad circuit is embedded in an integrated circuit chip that further includes a core logic circuit therein. The pad circuit includes an input/output pin, a gain-adjustable output buffer, an input buffer and a signal feature detector. The method includes the steps as follows. A test signal is firstly issued from the core logic circuit to the gain-adjustable output buffer, while the test signal is then manipulated and outputted to an external device via the input/output pin. Next, a feedback test signal is fed into the input buffer from the external device, while a test result is realized according to a waveform feature of the feedback test signal. Finally, the gain of the gain-adjustable output buffer is adjusted according to the obtained test result.
    Type: Application
    Filed: January 23, 2003
    Publication date: August 28, 2003
    Inventors: Kun-Long Lin, Meng-Huang Chu
  • Patent number: 6608906
    Abstract: The masking-effect of loud audio passages is utilized to reduce the audibility of the fan noise from a cooling fan in an audio system. A power monitor determines an output power of an audio amplifier and generates a power signal proportional to the output power. A switchable cooling fan is positioned to provide a cooling flow of air within the audio system when the cooling fan is turned on. A fan control is coupled to the power monitor and the switchable cooling fan. The fan control compares the power signal with a predetermined threshold and turns on the switchable cooling fan in response to the comparison indicating that reproduction of the amplified audio signals is at an output power level that will substantially mask audible noise created by the switchable cooling fan.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: August 19, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Andrew Cyril Krochmal, Gregory Roger Hamel, John Elliott Whitecar
  • Patent number: 6603356
    Abstract: A method and circuit control a quiescent current of an amplifier including a preamplifier, error amplifiers, and output devices driven by the error amplifiers, the error amplifiers having an input-referred offset voltage. The method includes (a) applying a calibration voltage to an input of the error amplifiers, (b) calibrating a quiescent current of the output devices by changing the calibration voltage so that the calibrated quiescent current has a predetermined current value, the calibration voltage corresponding to the calibrated quiescent current being set as a correction voltage, and (c) operating the amplifier with the correction voltage applied to the input of the error amplifiers. The circuit includes a correction voltage generator supplying a correction voltage to the error amplifier input, a quiescent current detector detecting the quiescent current, and a calibration circuit adjusting the correction voltage so that the quiescent current is calibrated to a predetermined current value.
    Type: Grant
    Filed: January 14, 2002
    Date of Patent: August 5, 2003
    Assignee: LSI Logic Corporation
    Inventors: Chun-Sup Kim, Ara Bicakci, Sang-Soo Lee
  • Patent number: 6600368
    Abstract: A predistortion linearizer of a power amplifier capable of improving the nonlinearity of the power amplifier by compensating changes in the power amplifier's nonlinear characteristics according to the lapse of time or an external environment and easily implementing the reverse characteristics of the power amplifier's nonlinear characteristics is disclosed. The predistortion linearizer of the power amplifier as disclosed includes a control unit for controlling a gain and phase of an input signal so that they are the reverse of the power amplifier's nonlinear characteristics, and a unit for compensating changes in the power amplifier's distortion characteristics according to the lapse of time or an external environment, upon receipt of the output of the control unit.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: July 29, 2003
    Assignee: LG Electronics Inc.
    Inventor: Wang Rae Kim
  • Patent number: 6593808
    Abstract: A method of setting up a linearizing circuit such as a linear power amplifier is described. According to the method, an input signal is supplied at a low, starting power level and is lowly increased during a set-up until it attains an operational level for normal use. The advantage of this is that pilot tone used in the linearizing circuit can be readily detected during set-up because its amplitude is above that of the low, starting power level of the input signal. A feed-forward linearizing system and a transmission system utilizing the technique are described.
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: July 15, 2003
    Assignee: Nokia Corporation
    Inventors: Jari Pekkarinen, Toni Neffling
  • Patent number: 6586989
    Abstract: Circuits and methods for calibrating offset error in a differential amplifier in an efficient and reliable way are described. A final calibrated state for the differential amplifier is obtained in accordance with a nonlinear search that requires significantly fewer test stages to complete than linear search methods. As a result, longer test periods may be used with the invention without adversely affecting the overall length of the calibration process. Because circuit conditions near the calibration point cause internal test signals to switch more slowly from one state to another, lengthening the test period time may allow more time for the internal test signals to reach their final values and, thereby, improve calibration accuracy.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: July 1, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Frederick A. Perner, Kenneth K. Smith
  • Patent number: 6577192
    Abstract: In the mobile communication, a distortion compensation amplifying apparatus is provided.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: June 10, 2003
    Assignee: Fujitsu Limited
    Inventors: Toru Maniwa, Tsuyoshi Hasegawa, Yoshihiro Kawasaki
  • Publication number: 20030102907
    Abstract: A method of measuring the response of an electronic device to a high frequency input signal is performed with an analyzer (1).
    Type: Application
    Filed: November 30, 2001
    Publication date: June 5, 2003
    Inventors: Paul Juan Tasker, Johannes Benedikt
  • Patent number: 6571598
    Abstract: The calibration circuit is used with a differential input, monolithic integrated circuit preamplifier in a sensor system. The calibration circuit tests the integrity of the sensor, the preamplifier, and the wiring in the sensor system. The calibration circuit includes first and second calibration capacitors having different capacitances connected to the preamplifier input leads. A calibration signal source is connected between the capacitors. The capacitors are preferably implemented on the same integrated circuit as the preamplifier. In operation, a calibration signal of known amplitude is applied to the calibration circuit and the level at the preamplifier output is determined. The level at the preamplifier output indicates certain conditions relating to the integrity of the sensor and its wiring, for example, an open circuit condition or a short circuit condition.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: June 3, 2003
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Thomas A. Freehill, Timothy B. Straw
  • Patent number: 6525604
    Abstract: A control unit and two negative feedback branches limit the amplitudes of the output signal of an inverting differential amplifier. Each feedback branch includes a threshold value switch including a transistor as well as an adjustable current source and a resistor forming a voltage divider between a supply voltage and the amplifier output. The voltage divider output is connected to the transistor's base. The transistor selectively connects or disconnects the input of the amplifier with either the supply voltage or the amplifier output. The control unit controls the two current sources based on external programming commands, to establish two adjustable threshold values within which the negative and positive amplitudes of the output signal are limited, symmetrically or independently, in a hard or soft clipping manner. Even with small supply voltages, the limited output will not overdrive subsequent amplifier input stages and will not superimpose harmonics on the useful signal.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: February 25, 2003
    Assignee: ATMEL Germany GmbH
    Inventors: Juergen Eckert, Juergen Schnabel
  • Publication number: 20030020538
    Abstract: Disclosed is an apparatus and method for modeling and estimating the characteristics of a power amplifier. A predistortion module generates a predistorted signal in response to a predistortion function and an input signal. A power amplifier receives the predistorted signal and generates an output signal. A polynomial module generates coefficients of a complex polynomial of order p (p is an integer greater than one) in response to the predistorted signal and the output signal. In particular, the complex polynomial is inplemented with both even and odd terms, thereby improving the ability to accurately model the power amplifier.
    Type: Application
    Filed: June 7, 2001
    Publication date: January 30, 2003
    Inventor: Jaehyeong Kim
  • Publication number: 20030011425
    Abstract: An injection current test circuit for an amplifier (24) includes a test current input pad (16). One (14) of a plurality of current mirrors (12) is connected to the test current input pad (16). A switch (20) is connected to a second (18) of the plurality of current mirrors (12) and connected to the amplifier (24). A test current output pad (22) is connected to the switch (20).
    Type: Application
    Filed: July 12, 2001
    Publication date: January 16, 2003
    Applicant: EM Microelectronics - US Inc.
    Inventor: Kevin Scott Buescher
  • Patent number: 6504425
    Abstract: Disclosed is an apparatus and method for modeling and estimating the characteristics of a power amplifier. A predistortion module generates a predistorted signal in response to a predistortion function and an input signal. A power amplifier receives the predistorted signal and generates an output signal. A polynomial module generates coefficients of a complex polynomial of order p (p is an integer greater than one) in response to the predistorted signal and the output signal. In particular, the complex polynomial is implemented with both even and odd terms, thereby improving the ability to accurately model the power amplifier.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: January 7, 2003
    Assignee: Lucent Technologies Inc.
    Inventor: Jaehyeong Kim
  • Patent number: 6498529
    Abstract: Disclosed is an apparatus and method for iteratively calculating the predistortion function from a power amplifier when the inverse to the power amplifier characterization does not exist analytically. A predistortion module generates a predistorted signal in response to an input signal and a predistortion function received from a predistortion function calculating module. The predistortion function calculating module generates the predistortion function in response to given amplifier characteristics. In particular, the predistortion function calculating module uses a magnitude of the input signal at a given time to estimate the predistorted signal at that given time in order to calculate the predistortion function. Optionally, subsequent iterations based on the magnitude of the estimate occur until a desired accuracy of the predistorted signal approximation and of the predistortion function is achieved.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: December 24, 2002
    Assignee: Lucent Technologies Inc.
    Inventors: Jaehyeong Kim, Kyriaki Konstantinou
  • Publication number: 20020190787
    Abstract: Disclosed is an apparatus and method for iteratively calculating the predistortion function from a power amplifier when the inverse to the power amplifier characterization does not exist analytically. A predistortion module generates a predistorted signal in response to an input signal and a predistortion function received from a predistortion function calculating module. The predistortion function calculating module generates the predistortion function in response to given amplifier characteristics. In particular, the predistortion function calculating module uses a magnitude of the input signal at a given time to estimate the predistorted signal at that given time in order to calculate the predistortion function. Optionally, subsequent iterations based on the magnitude of the estimate occur until a desired accuracy of the predistorted signal approximation and of the predistortion function is achieved.
    Type: Application
    Filed: June 8, 2001
    Publication date: December 19, 2002
    Inventors: Jaehyeong Kim, Kyriaki Konstantinou
  • Publication number: 20020187761
    Abstract: A device for compensating for the nonlinearity of a power amplifier which has a simple configuration and can precisely linearize the transfer characteristics of the power amplifier by predistorting an input signal of the power amplifier. The nonlinearity compensation device of the present invention converts an RF input signal into an IF band rather than a baseband and predistorts the RF input signal in digital domain, and thus any modulation or demodulation process is obviated and the simultaneous processing of signals in multiple channels is facilitated. A first downconverter receives the RF input signal and converts the frequency band of the signal into the IF band to output an IF input signal. A predistortion unit receives and predistorts the IF input signal to compensate for the nonlinearity, and outputs an IF predistorted signal. An upconverter converts the frequency band of the IF predistorted signal into the RF band to provide such a signal to the amplifier.
    Type: Application
    Filed: February 21, 2002
    Publication date: December 12, 2002
    Applicant: Solid Technologies, Inc.
    Inventors: Sungbin Im, Chonghoon Kim, Yoan Shin
  • Patent number: 6480061
    Abstract: This invention relates to an amplifier having digital micro-processor control apparatus and, in particular, to a high frequency power amplifier that includes a micro-processor control system to accurately regulate the operating point of the various amplifying elements in the high frequency power amplifier. The basic amplifier circuitry consists of a micro-controller, a variable voltage attenuator (VVA), a digital to analogue converter and an EEPROM. The EEPROM provides a lookup table which is read by the micro-controller, which then writes to the digital to analogue converter to set the control voltage to the variable voltage attenuator.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: November 12, 2002
    Assignee: Nortel Networks Limited
    Inventors: Graham Dolman, Peter King, Andrew John Booth
  • Publication number: 20020163381
    Abstract: A method and apparatus for auto-calibrating an electronic device without interrupting normal operation of the device. An electronic device configured as a high voltage difference amplifier is disclosed having a calibration circuit which couples a calibration excitation signal to a common-mode signal path of the difference amplifier. The difference amplifier includes a variable transfer function circuit which may be used to adjust the common-mode rejection of the difference amplifier. The calibration excitation signal may be a random, pseudo-random, out-of-band, or other frequency shaped signal generated in reference to a clock signal. A calibration error signal is detected from an output signal. The variable transfer function circuit can be adjusted in response to the detected error signal to reduce the calibration error signal. As a result, common-mode rejection errors of the difference amplifier may be reduced while the difference amplifier is coupled to an input signal source.
    Type: Application
    Filed: April 3, 2001
    Publication date: November 7, 2002
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rodney T. Burt, R. Mark Stitt
  • Patent number: 6476670
    Abstract: A wideband predistortion system compensates for a nonlinear amplifier's frequency and time dependent AM—AM and AM-PM distortion characteristics. The system comprises a data structure in which each element stores a set of compensation parameters (preferably including FIR filter coefficients) for predistorting the wideband input transmission signal. The parameter sets are preferably indexed within the data structure according to multiple signal characteristics, such as instantaneous amplitude and integrated signal envelope, each of which corresponds to a respective dimension of the data structure. To predistort the input transmission signal, an addressing circuit digitally generates a set of data structure indices from the input transmission signal, and the indexed set of compensation parameters is loaded into a compensation circuit which digitally predistorts the input transmission signal.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: November 5, 2002
    Assignee: PMC-Sierra, Inc.
    Inventors: Andrew S. Wright, Bartholomeus T. W. Klijsen, Paul V. Yee, Chun Yeung Kevin Hung, Steven J. Bennett
  • Patent number: 6462617
    Abstract: Disclosed is an apparatus and method for calculating a predistortion function from power amplifier characteristics. A predistortion module generates a predistorted signal in response to an input signal and predistortion coefficients received from a predistortion function calculating module. The predistortion function calculating module generates the predistortion coefficients in response to the given amplifier characteristics. Polynomial fitting is used to obtain the predistortion coefficients. In particular, the input signal is represented by single or multiple sectors having multiple points and then predistortion coefficients are calculated for each sector.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: October 8, 2002
    Assignee: Lucent Technologies Inc.
    Inventor: Jaehyeong Kim
  • Patent number: 6459334
    Abstract: A wideband predistortion system compensates for a nonlinear amplifier's frequency and time dependent AM—AM and AM-PM distortion characteristics. The system comprises a data structure in which each element stores a set of compensation parameters (preferably including FIR filter coefficients) for predistorting the wideband input transmission signal. The parameter sets are preferably indexed within the data structure according to multiple signal characteristics, such as instantaneous amplitude and integrated signal envelope, each of which corresponds to a respective dimension of the data structure. To predistort the input transmission signal, an addressing circuit digitally generates a set of data structure indices from the input transmission signal, and the indexed set of compensation parameters is loaded into a compensation circuit which digitally predistorts the input transmission signal.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: October 1, 2002
    Assignee: PMC-Sierra, Inc.
    Inventors: Andrew S. Wright, Bartholomeus T. W. Klijsen, Paul V. Yee, Chun Yeung Kevin Hung, Steven J. Bennett
  • Publication number: 20020130715
    Abstract: Provided is a system and method for concurrently adjusting parameters of a system incorporating separate devices. In a preferred embodiment, a series of amplifiers used in an instrumentation system are able to be adjusted and calibrated concurrently via a simple operation of an unskilled operator. One option provides for this adjustment to occur remotely from the devices.
    Type: Application
    Filed: May 7, 2002
    Publication date: September 19, 2002
    Inventors: Lewis B. Naron, Humphrey M. Barlow, Clifford E. Grey
  • Publication number: 20020127979
    Abstract: A method of setting up a linearizing circuit such as a linear power amplifier is described. According to the method, an input signal is supplied at a low, starting power level and is lowly increased during a set-up until it attains an operational level for normal use. The advantage of this is that pilot tone used in the linearizing circuit can be readily detected during set-up because its amplitude is above that of the low, starting power level of the input signal. A feed-forward linearizing system and a transmission system utilizing the technique are described.
    Type: Application
    Filed: January 19, 2001
    Publication date: September 12, 2002
    Inventors: Jari Pekkarinen, Toni Neffling
  • Publication number: 20020109543
    Abstract: Three kinds of shrink factors, 1 time, 0.5 time, and 0.25 time, are prepared and three sets of operational amplifier layout information are also prepared as a library in correspondence with the three kinds of shrink factors. At each shrink factor, the bias voltage is varied between upper and lower limits to vary the bias current.
    Type: Application
    Filed: January 24, 2002
    Publication date: August 15, 2002
    Inventors: Kuniyuki Tani, Atsushi Wada
  • Patent number: 6429736
    Abstract: A cartesian amplifier system for pre-distorting a signal to be amplified to take account of non-linearities and other non-ideal characteristics of the amplifier itself. A signal to be amplified is divided into quadrature and in-phase signal components in a digital signal processor 1. The processor 1 also pre-distorts the resolved quadrature and in-phase components using various pre-distortion factors. These pre-distortion factors are derived on the basis of a feedback signal from a measurement of the output signal power from the amplifier and on the basis of the signal levels of the pre-distorted resolved components themselves. These pre-distortion factors are constantly updated, thus taking into account any shifts in the non-ideal characteristics of the amplifier.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: August 6, 2002
    Assignee: Securicor Wireless Technology Limited
    Inventors: Ian Stuart Parry, Richard Arthur Hillum
  • Patent number: 6424211
    Abstract: An operational amplifier is trimmed electrically using non-volatile fuses. The non-volatile fuses may be programmed electrically without destroying any passivation layers or other devices on the electronic component. In the case of an integrated circuit analog component, the trimming may be performed either at the wafer level or at the packaging level. The trimming may be performed specifically to adjust the quiescent current or offset voltage of the operational amplifier.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: July 23, 2002
    Assignee: Microchip Technology Incorporated
    Inventors: James B. Nolan, Bonnie Baker
  • Publication number: 20020070797
    Abstract: An apparatus for conditioning an electronic signal that includes a number of signal amplifiers sequentially arranged from a first amplifier to a final amplifier. There is also a microcontroller/microcomputer. A balance circuit is interposed between the first amplifier and the microcontroller/microcomputer, and a calibration step circuit is interposed between the microcontroller/microcomputer and a second amplifier. A digital to analog converter (DAC) is interposed between the microcontroller/microcomputer and each of the amplifiers.
    Type: Application
    Filed: December 7, 2000
    Publication date: June 13, 2002
    Inventors: Clifford E. Grey, Lewis B. Naron, Humphrey M. Barlow