Abstract: A bandpass parametric amplifier circuit includes a plurality of unit cells. At least one unit cell includes a first inductor having a first node coupled to a center conductor and a second node coupled to ground. There is a first capacitor having a first node coupled to the center conductor and a second node coupled to ground. There is a second inductor having a first node coupled to the center conductor. A second capacitor has a first node coupled to a second node of the second inductor. The second capacitor and the second inductor are in series with the center conductor.

Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability.

Abstract: Linearity is improved in an amplifier circuit without lowering gain. The amplifier circuit includes a transistor, a load, an impedance element, and a variable current source. The transistor amplifies an input signal. The load is connected between the transistor and a power supply. The impedance element is connected between the transistor and a ground terminal, and passes a direct current. The variable current source is connected to a connection part between the transistor and the impedance element, and supplies a current in accordance with a voltage of the connection part.

Abstract: Cascode amplifier having feedback circuits. In some embodiments, an amplifier can include a first transistor and a second transistor arranged in a cascode configuration, with each transistor having a gate. The amplifier can further include a first feedback circuit implemented between an output of the second transistor and the gate of the second transistor. The amplifier can further include a second feedback circuit implemented between the output of the second transistor and the gate of the first transistor.

Abstract: A circuit includes first and second operational amplifiers, each including positive and negative inputs and first and second internal nodes. A mixer couples first and second input nodes to the positive and negative inputs of the operational amplifiers. The mixer switches the first and second input nodes between the positive and negative inputs of the first and second operational amplifiers in accordance with clock signals. A first cancellation capacitor couples to the first input node, and a second cancellation capacitor couple to the second input node. First and second switches selectively couple the first cancellation capacitor to the first and second internal nodes, respectively, of the first operational amplifier. Third and fourth switches selectively couple the second cancellation capacitor to the first and second internal nodes, respectively, of the second operational amplifier.

Abstract: A semiconductor includes a semiconductor substrate having first and second opposite facing surfaces. An amplifier device is formed in the semiconductor substrate, the amplifier device is configured to amplify an RF signal at a fundamental frequency. A first dielectric layer is formed on the first surface of the substrate. A first metallization layer is formed on the first dielectric layer. The first metallization layer is spaced apart from the substrate by the first dielectric layer. The first metallization layer includes a first elongated finger interdigitated with a first reference potential pad. The first elongated finger is physically disconnected from the first reference potential pad. The first reference potential pad includes a first patterned shape that is devoid of metallization. The first patterned shape has a geometry that filters harmonic components of the fundamental frequency.

Abstract: A filtering apparatus includes a passband of a first-level unit which is formed by at least three coaxial filters covers a passband of a second-level unit which is formed by at least three dielectric filters, and a bandwidth of the first-level unit is twice the bandwidth of the second-level unit, so that when the coaxial filters are coupled to the dielectric filters, insertion loss of the coaxial filters is reduced, thereby reducing overall insertion loss of the filtering apparatus. By making a transmission zero of the first-level unit be located at a second harmonic frequency point of the second-level unit, the filtering apparatus can have high suppression on a second harmonic, thereby obtaining relatively desirable far-end suppression performance.

Abstract: A tunable duplexer circuit is described, wherein the frequency response as well as bandwidth and transmission loss characteristics can be dynamically altered, providing improved performance for transceiver front-end applications. The rate of roll-off of the frequency response can be adjusted to improve performance when used in duplexer applications. A method is described where the duplexer circuit characteristics are optimized in conjunction with a specific antenna frequency response to provide additional out-of-band rejection in a communication system. Dynamic optimization of both the duplexer circuit and an active antenna system is described to provide improved out-of-band rejection when implemented in RF front-end circuits of communication systems. Other features and embodiments are described in the following detailed descriptions.

Abstract: A device for generating a signal, including: a balun; and a circuit capable of summing up, on a first access terminal of the balun, currents representative of signals received on first input terminals of the device, and on a second access terminal of the balun, currents representative of signals received on second input terminals of the device.

Abstract: A circuit for down-converting an RF signal to a baseband signal includes a trans-admittance amplifier adapted to receive the RF signal and generate in response a pair of differential current signals. The circuit further includes a trans-impedance amplifier having at least four mixers and at least four linear amplifiers. The four mixers frequency down-convert the pair of differential current signals to generate four pairs of differential baseband current signals, wherein each pair of the differential baseband current signals has a different phase and is associated with each of the linear amplifiers. Additionally, the circuit includes a summing block that generates an in-phase signal using a first weighted sum of the four different baseband current signals and a quadrature signal using a second weighted sum of the four different baseband current signals. The circuit further includes an analog-to-digital converter for converting the in-phase and quadrature signals to respective digital representations.

Abstract: A semiconductor package device comprises a radio frequency power transistor having an output port operably coupled to a single de-coupling capacitance located within the semiconductor package device. The single de-coupling capacitance is arranged to provide both high frequency decoupling and low frequency decoupling of signals output from the radio frequency power transistor.

Abstract: A processing chip for a digital microphone and related input circuit and a digital microphone are described herein. In one aspect, the input circuit for a processing chip of a digital microphone includes: a PMOS transistor, a resistor, a current source, and a low-pass filter. The described processing chip possesses high anti high-frequency interference capabilities and the described input circuit possesses high high-frequency power supply rejection ratio.

Abstract: An integrated passive device with electrostatic discharge protection mechanism includes an antenna terminal for receiving and transmitting a wireless signals, a first frequency terminal for receiving and transmitting a signal with a first frequency, a first filtering circuit for filtering the wireless signal, and an electrostatic discharge protection element for conducting static electricity to ground. The first filtering circuit includes a first filtering element with a first end electrically connected to the antenna terminal, a second filtering element with a first end electrically connected to a second end of the first filtering element and a second end electrically connected to the first frequency terminal, and a third filtering element with a first end electrically connected to the second end of the first filtering element and a second end electrically connected to ground. The electrostatic discharge protection element is coupled between the second end of the first filtering element and ground.

Abstract: An amplifying circuit includes a first transistor configured to convert an input voltage signal to a current signal, a second transistor configured to convert the current signal to an output voltage signal, and a variable active inductor in which resistors and a switch are arranged between a gate and a drain of the second transistor. The amplifying circuit further includes a third transistor configured to draw a current and connected in parallel to the first transistor and a bias circuit configured to control individually a current flowing through the first transistor and a current flowing through the third transistor.

Abstract: A capacitor amplifying circuit and an operating method thereof are disclosed. The capacitor amplifying circuit includes a first current source, a second current source, a current mirror unit, and an output capacitor. There is a proportion relationship between a first current of the first current source and a second current of the second current source. The current mirror unit is coupled between the first current source and the second current source. The current mirror unit includes N stages of current mirror circuit in series, wherein N is larger than or equal to 1. Each of the N stages of current mirror circuit has a proportional constant respectively. Two terminals of the output capacitor are coupled to the current mirror unit and a ground terminal respectively. The equivalent capacitance magnification of the output capacitor is related to the proportional constants based on the proportion relationship.

Abstract: A self-oscillating driver circuit includes a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path includes a feedforward filter which is designed as an active filter. In order to prevent an oscillatory state of the driver circuit at an unwanted frequency, it is proposed that an internal state variable of the feedforward filter be monitored and that the feedforward filter be reset if the value of the monitored internal state variable is outside a predefined range.

Abstract: An electronic signal processor for processing signals includes a complex first filter, one or more gain stages and a second filter. The first filter is characterized by a frequency response curve that includes multiple corner frequencies, with some corner frequencies being user selectable. The first filter also has at least two user-preset gain levels which may be alternately selected by a switch. Lower frequency signals are processed by the first filter with at least 12 db/octave slope, and preferably with 18 db/octave slope to minimize intermodulation distortion products by subsequent amplification in the gain stages. A second filter provides further filtering and amplitude control. The signal processor is particularly suited for processing audio frequency signals.

Abstract: In an embodiment, a single-ended transmission line N-path filter includes one or more filter stages, each stage having a first series inductive element, a shunt N-path filter, and a second series inductive element; an input port; and an output port.

Abstract: A passive tag receiving a reader signal provided by a reader is disclosed. The passive tag includes an antenna, an oscillator circuit, and an internal chip. The antenna receives the reader signal. The reader signal is within an operation frequency band. The oscillator circuit is coupled to the antenna and generates a frequency signal. The internal chip processes the reader signal according to power provided by the reader signal and the frequency signal when the reader signal is received and the frequency signal is generated.

Abstract: An electronic signal processor for processing signals includes a complex first filter, one or more gain stages and a second filter. The first filter is characterized by a frequency response curve that includes multiple corner frequencies, with some corner frequencies being user selectable. The first filter also has at least two user-preset gain levels which may be alternately selected by a switch. Lower frequency signals are processed by the first filter with at least 12 db/octave slope, and preferably with 18 db/octave slope to minimize intermodulation distortion products by subsequent amplification in the gain stages. A second filter provides further filtering and amplitude control. The signal processor is particularly suited for processing audio frequency signals.

Abstract: An equalization system (18) that reduces inter-symbol interference in an input signal (220) includes a variable gain amplifier (430), and one or more peaking amplifiers (432) that are connected in series to the variable gain amplifier (430). The variable gain amplifier (430) receives the input signal (220) and scales the input signal (220) while each peaking amplifier (432) can be selectively controlled to selectively adjust a peaking gain (326) and a peaking corner frequency (328). Additionally, the equalization system (18) can include a PTAT bias generator (434) that provides a PTAT bias current to one or more of the peaking amplifiers (432) to maintain a transconductance of one or more of the peaking amplifiers (432) substantially constant as temperature changes. With this design, the equalization system (18) provides programmable and stabilized equalization gain, has a tunable peaking corner frequency, and superior common mode rejection.

Abstract: A RF device such as a tower mounted amplifier (TMA), mast-head amplifier (MHA), or Tower Mounted Boosters (TMB) includes a housing having a plurality of cavities and an input and an output, the input being coupled to the antenna and the output being coupled to a base station. The housing includes a transmission path holding multiple coaxial resonators. The housing further includes multiple receive paths including at least one path having a plurality of cavities, each cavity containing a dielectric resonator. The metallic transmit resonator nearest the antenna input is coupled to the first dielectric resonator via a common resonant wire. The last dielectric resonator in the receive path is coupled to a first metallic resonator of a downstream clean-up filter via another common resonant wire.

Abstract: An RF power amplifier including a single piece heat sink and an RF power transistor die mounted directly onto the heat sink.

Abstract: An electronic signal processor for processing signals includes a complex first filter, one or more gain stages and a second filter. The first filter is characterized by a frequency response curve that includes multiple corner frequencies, with some corner frequencies being user selectable. The first filter also has at least two user-preset gain levels which may be alternately selected by a switch. Lower frequency signals are processed by the first filter with at least 12 db/octave slope, and preferably with 18 db/octave slope to minimize intermodulation distortion products by subsequent amplification in the gain stages. A second filter provides further filtering and amplitude control. The signal processor is particularly suited for processing audio frequency signals.

Abstract: Embodiments include but are not limited to apparatuses and systems including a circuit comprising a unit cell including an input and an output, and a harmonic trap, intrinsic to the unit cell, implemented on one of the input and the output. Other embodiments may be described and claimed.

Abstract: An operational amplifier includes an input stage for generating a first differential output signal pair according to a first differential input signal pair, an output stage for generating a second differential output signal pair according to at least a second differential input signal pair, and a high-pass filtering circuit coupled between the input stage and the output stage for performing high-pass filtering on the first differential output signal pair, for generating the at least a second differential input signal pair.

Abstract: A RF device such as a tower mounted amplifier (TMA), mast-head amplifier (MHA), or Tower Mounted Boosters (TMB) includes a housing having a plurality of cavities and an input and an output, the input being coupled to the antenna and the output being coupled to a base station. The housing includes a transmission path holding multiple coaxial resonators. The housing further includes multiple receive paths including at least one path having a plurality of cavities, each cavity containing a dielectric resonator. The metallic transmit resonator nearest the antenna input is coupled to the first dielectric resonator via a common resonant wire. The last dielectric resonator in the receive path is coupled to a first metallic resonator of a downstream clean-up filter via another common resonant wire.

Abstract: Bonded wafer packages having first and second wafers bonded together forming a matrix of sealed devices, at least one of the wafers having a plurality of passive devices formed thereon, including at least one BAW resonator within each of the sealed devices, the first wafer having conductor filled through-holes forming electrical connections between the passive devices and connections assessable from outside the sealed devices, the bonded wafers being diced to form individual sealed devices. The devices may be duplexers, interstage filters or other circuits such as VCOs and RF circuits. Various embodiments are disclosed.

Abstract: An active compensation filter for the application in the electric power supply in a land vehicle, which comprises a high-pass filter which is to be coupled with a supply voltage line which carries a supply voltage, in order to detect frequency and amplitude of interference voltage components of the supply voltage. A signal amplifier which is connected in series with the high-pass filter amplifies the detected interference voltage components and supplies them to a coupling element as output signals, which is connected in series with the signal amplifier and comprises a primary side and a secondary side. The primary side is fed with the output signals of the signal amplifier and the secondary side is looped into the supply voltage line.

Abstract: A fully differential amplifier that amplifies and filters a signal band of a communications channel, the signal band including a desired signal and at least one blocker signal of an adjacent communications channel, the fully differential amplifier includes a fully differential operational amplifier (op-amp) with a common mode feedback, the fully differential operational amplifier amplifying the desired signal, a variable input resistance connected to an input of the fully differential op-amp, and an asymmetric floating frequency dependent negative resistance (AFFDNR) filter connected to the fully differential op-amp between the input and an output of the fully differential op-amp. A plurality of inputs of the fully differential op-amp may be virtually grounded to reduce swings in a voltage. The AFFDNR filter filters the at least one blocker signal and includes a plurality of resistors that implement a high order filtering of the at least one blocker signal.

Abstract: Apparatus, systems, and methods implementing techniques for filtering signals are described. A filter circuit receives an input signal and produces a corresponding filtered signal. The filter circuit has a transfer function that relates the filtered signal to the input signal. The transfer function includes at least one pole and at least one zero, where at least one of the zeros corresponds to a first frequency, and at least one of the poles corresponds to a second frequency. The apparatus also includes a negative-transconductance circuit that is coupled to the filter circuit and that increases a magnitude of a component of the filtered signal that corresponds to the second frequency.

Abstract: Reliable and efficient sensing becomes increasingly difficult in harsher environments. A sensing module for high-temperature conditions utilizes a digital, rather than analog, implementation on a wireless platform to achieve good quality data transmission. The module comprises a sensor, integrated circuit, and antenna. The integrated circuit includes an amplifier, A/D converter, decimation filter, and digital transmitter. To operate, an analog signal is received by the sensor, amplified by the amplifier, converted into a digital signal by the A/D converter, filtered by the decimation filter to address the quantization error, and output in digital format by the digital transmitter and antenna.

Abstract: An apparatus for amplifying differential signals is provided. The apparatus comprises a differential amplifier, a first impedance component, a second impedance component, a voltage source and a high-pass filter. The differential amplifier receives an input differential signal with a first terminal and a second terminal. The differential amplifier also drains currents from the voltage source into a third terminal and a fourth terminal via the first and the second impedance components respectively. The high-pass filter receives the input differential signal and outputs a control differential signal to control the first and the second impedance components so that the impedance of the first and the second impedance components vary inversely in response to the voltages at the first and the second terminals respectively when the state of the input differential signal changes.

Abstract: An electronic signal processor for processing signals includes a complex first filter, one or more gain stages and a second filter. The first filter is characterized by a frequency response curve that includes multiple corner frequencies, with some corner frequencies being user selectable. The first filter also has at least two user-preset gain levels which may be alternately selected by a switch. Lower frequency signals are processed by the first filter with at least 12 db/octave slope, and preferably with 18 db/octave slope to minimize intermodulation distortion products by subsequent amplification in the gain stages. A second filter provides further filtering and amplitude control. The signal processor is particularly suited for processing audio frequency signals.

Abstract: a circuit for an RFID device in one embodiment includes an operational amplifier having a first input, a second input, and an output where the first input receives an incoming signal, arid the second input is coupled to the output via a feedback loop. An operational amplifier for an RFID device according to another embodiment compares an output of the operational amplifier to an incoming baseband signal, A circuit according to another embodiment includes an operational amplifier having a first input, a second input, and an output, wherein the first input receives an incoming signal, and wherein the second input is coupled to the output via a feedback loop. A comparator having one input is coupled to the output of the operational amplifier, another input receiving the incoming signal, and an output for outputting an outgoing signal. Methods for adjusting a filtering characteristic of an operational amplifier are also disclosed.

Abstract: A method for tuning a transconductor includes receiving a digital value. The method also includes determining a bit value for a selected bit of the digital value, and selecting a tuning range for a transconductor based on the bit value. The method further includes tuning the transconductor within the selected range based on any remaining bits in the digital value.

Abstract: The present invention discloses a bandpass amplifier having gain and bandpass performance. The bandpass amplifier includes an input match unit for matching the gain of the amplifier and having a first filter response; a first bias unit electrically connected to the input match unit for driving the first terminal of the amplifier and having a first high pass filter response; a gain stage electrically connected to the first bias unit for providing the flat gain of the amplifier; a second bias unit electrically connected to the gain stage for driving the second terminal of the amplifier and having a second high pass filter response; and an output match unit electrically connected to the second bias unit for matching the gain of the amplifier and having a second filter response.

Abstract: A tunable bandpass filter is provided that comprises a first shunt-connected ferroelectric (FE) tunable tank circuit having a first node to accept an input signal. A second shunt-connected FE tunable tank circuit has a second node to supply a bandpass filtered signal. A first capacitor is connected in series between the first and second nodes. In one aspect, the first tank circuit comprises a first resonator connected to the first node, and a fourth capacitor connected between the first resonator and a reference voltage. The fourth capacitor is a tunable FE capacitor. Typically, a fifth capacitor is connected between the first node and the reference voltage. Likewise, the second tank circuit comprises a second resonator connected to the second node, and a sixth (FE) capacitor connected between the second resonator and the reference voltage. A seventh capacitor is connected between the second node and the reference voltage.

Abstract: A low distortion filter circuit implementing variable gain amplification (VGA). An aspect of the present invention increases the degrees of freedom (number of components which can be independently programmed/changed to corresponding desired values) to achieve a desired combination of D.C. gain and filter characteristics (e.g., corner frequency, Q-factor, notch frequency, etc.). Such additional degrees of freedom are attained by including additional components in either on input block or a feedback block (implemented with reference to an operational amplifier), and by redesigning the other block using principles such as admittance concellation to remove the effects of such additional components. The blocks are designed such that a terminal of the programmable components is connected to a fixed/constant voltage (e.g., ground). Embodiments implementing bi-quad single amplifier with and without notch are disclosed.

Abstract: A direct-down conversion receiver may include a transconductance-capacitor (GmC) filter to filter undesirable mixing products and provide a filtered baseband-differential signal. The GmC filter may include first and second transconductance-capacitor (GmC) circuits in series and a transconductance-feedback circuit in feedback with the second transconductance-capacitor circuit. The GmC circuits may comprise cross-coupled pairs of transistors to receive a baseband-differential signal and generate a differential output current. The GmC circuits may also comprise MOSCAPs coupled respectively between the differential inputs of the GmC circuit and internal-feedback nodes. In some embodiments, a substantially-constant bias voltage may be maintained across the voltage-dependent capacitors to allow the voltage-dependent capacitors to provide a substantially constant capacitance.

Abstract: A variable time constant circuit includes an inverting amplifier which has an amplifier input terminal and an amplifier output terminal connected to a signal output terminal and inverts a signal inputted to the amplifier input terminal, a first and a second resistor which are connected in series between the signal input terminal and the amplifier input terminal, a capacitor connected between the amplifier input terminal and the amplifier output terminal, a field effect transistor including a gate terminal connected to a junction point of the first and second resistors, a source terminal kept at a constant potential, and a drain terminal connected to the amplifier input terminal, the transistor flowing a current through the drain terminal according to a voltage between the gate terminal and the source terminal, and a control circuit which controls a voltage-current conversion ratio of the transistor according to a time constant control signal.

Abstract: A microphone unit capable of suppressing the sensitivity reduction due to a parasitic capacitance that occurs depending on the structure of an electret capacitor, can be realized by the following manner. Specifically, an output signal (Vout) that is the inverted output of an input signal (Vin) is inputted to an operational amplifier (OP2) that is an inverting amplifier, such that the output signal (Vout) has the same phase as the input signal (Vin) and is amplified. With an output signal (Vfb) of the operational amplifier (OP2) connected to a first electrode of a parasitic capacitor (CX), the parasitic capacitor (CX) functions as a coupling capacitor, while a feedback is applied to an electret capacitor (EC). This allows for an increase in the voltage between both terminals of the electret capacitor (EC), and thus suppresses that the sensitivity of the microphone unit is lowered due to the parasitic capacitor.

Abstract: Input conversion noises of a filter circuit are reduced. The circuit has plural circuit arrangements obtained by dividing the filter circuit so as to include at least one voltage controlled current source, and at least one circuit arrangement is an amplification circuit having an amplifying function for amplifying an input signal to the filter circuit at a set amplification factor. The amplification element circuit has: a loop circuit constructed by plural intra-loop voltage controlled current sources in which mutual conductance values have a predetermined corresponding relation; and a corresponding capacitor connected to a node in the loop circuit and having a capacitance depending on the corresponding relation so as to set a potential at the node to a predetermined potential corresponding to the amplification factor, and amplification element circuit has an electric nature which is independent of the amplification factor when seeing from the input side of the filter circuit.

Abstract: A variable time constant circuit includes an inverting amplifier which has an amplifier input terminal and an amplifier output terminal connected to a signal output terminal and inverts a signal inputted to the amplifier input terminal, a first and a second resistor which are connected in series between the signal input terminal and the amplifier input terminal, a capacitor connected between the amplifier input terminal and the amplifier output terminal, a field effect transistor including a gate terminal connected to a junction point of the first and second resistors, a source terminal kept at a constant potential, and a drain terminal connected to the amplifier input terminal, the transistor flowing a current through the drain terminal according to a voltage between the gate terminal and the source terminal, and a control circuit which controls a voltage-current conversion ratio of the transistor according to a time constant control signal.

Abstract: A filter module for reducing a DC offset voltage in a radio frequency communication channel is described. A first capacitor is coupled between a first differential input node and a first differential output node. A second capacitor is coupled between a second differential input node and a second differential output node. An active variable resistor is coupled between the first differential output node and the second differential output node. The active variable resistor receives a control signal. The control signal adjusts the value of the active variable resistor, which adjusts the frequency response of the filter module. The rate at which the filter module reduces DC offset voltages is thereby adjusted. The filter module is also adaptable to single-ended applications.

Abstract: A loop filter for a continuous time sigma delta analog to digital converter which converts an analog input signal into a digital output signal, said loop filter comprising an active analog filter which includes active devices for providing a power gain, wherein the number of active devices is lower than the filter order of said active analog filter.

Abstract: A Gm-C filter includes a filter passing an intended signal SI# in an input signal SI, and a control signal producing portion detecting a peak voltage value of an output signal of a filter to be controlled and a peak voltage value of the intended signal SI#, and making a comparison between them to produce a gain control signal CS for controlling a gain, and corrects a gain loss in the filter by applying the gain control signal CS to the filter.

Abstract: A circuit and method for input side impedance matching of a power amplifier in an electronic device. Specifically, the present invention provides an impedance transformer network that includes a negative resistor in series with a bondwire inductor. The network is placed in parallel with a signal source and synthesizes the source side impedance at the input of the power amplifier. The desired impedance is synthesized by selecting an appropriate value for the negative resistor and setting the reactance of the inductor equal to the capacitance of the electronic device at a required frequency of operation.

Abstract: A filter circuit includes two first differential circuits disposed on A and B sides, in each of which a ratio of the number of transistors to that of diodes is 1:4, and two second differential circuits disposed on the A and B sides, in each of which the ratio of the number of transistors to that of diodes is 4:1. Base electrodes of the transistors of the A-side first differential circuit and the A-side second differential circuit are connected to a circuit input terminal, while base electrodes of the transistors of the B-side first differential circuit and the B-side second differential circuit are connected to another circuit input terminal. A current source is connected to an A-side connection node for the A-side first differential circuit and the A-side second differential circuit and another current source is connected to a B-side connection node for the B-side first differential circuit and the B-side second differential circuit.

Abstract: A high-frequency power amplifier includes a transistor which is inputted with a high-frequency signal, amplifies the high-frequency signal and outputs the same; a fundamental-signal matching circuit, one end of which is connected to an output of said transistor and which matches at least the impedance of fundamental signal in the amplified high-frequency signal and outputs the same from the other end; a power supply which supplies electric power to said transistor from a node located in an interval from the output of said transistor to said fundamental-signal matching circuit; a first inductor, one end of which is connected to said power supply; a second inductor connected in series between the other end of said first inductor and said node; and a first capacitor, one end of which is connected between said first inductor and said second inductor while the other end thereof is connected to a reference potential, said first capacitor forming a first series-resonant circuit with said second inductor and a parall