Including Frequency-responsive Means In The Signal Transmission Path Patents (Class 330/302)
  • Patent number: 11139783
    Abstract: A circuit structure for improving the harmonic suppression capability of a radio frequency power amplifier includes an output stage unit, a high-order harmonic suppression unit, and a low-order harmonic suppression unit. The output stage unit outputs a signal to be subjected to harmonic suppression; the high-order harmonic suppression unit comprises a first filter capacitor and a back hole, and is used for suppressing fifth or higher harmonics; the output stage unit and the first filter capacitor are connected to the ground in series by means of the back hole; the low-order harmonic suppression unit is connected to the output stage unit to suppress second, third and fourth harmonics. According to the design, the high-harmonic suppression capability of the radio frequency power amplifier is improved.
    Type: Grant
    Filed: October 19, 2017
    Date of Patent: October 5, 2021
    Assignee: LANSUS TECHNOLOGIES INC
    Inventors: Jiahui Zhou, Bin Hu, Jiashuai Guo, Kai Xuan, Hua Long
  • Patent number: 11128269
    Abstract: An amplifier includes a driver stage amplifier transistor and a final stage amplifier transistor, which are integrated in a semiconductor die. The driver stage amplifier transistor has a driver stage input, a driver stage output, and an output impedance, and the driver stage amplifier transistor is configured to operate using a first bias voltage at the driver stage output. The final stage amplifier transistor has a final stage input, a final stage output, and an input impedance. The final stage input is electrically coupled to the driver stage output. The final stage amplifier transistor is configured to operate using a second bias voltage at the final stage output, and the second bias voltage is at least twice as large as the first bias voltage.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: September 21, 2021
    Assignee: NXP USA, Inc.
    Inventors: Elie A. Maalouf, Yu-Ting David Wu, Lu Wang, Nick Yang
  • Patent number: 11113225
    Abstract: An interconnect interface is provided to enable communication with an off-package device over a link including a plurality of lanes. Logic of the interconnect interface includes receiver logic to receive a valid signal from the off-package device on a dedicated valid lane of the link indicating that data is to arrive on a plurality of dedicated data lanes in the plurality of lanes, receive the data on the data lanes from the off-package device sampled based on arrival of the valid signal, and receive a stream signal from the off-package device on a dedicated stream lane in the plurality of lanes. The stream signal corresponds to the data and indicates a particular data type of the data. The particular data type can be one of a plurality of different data types capable of being received on the plurality of data lanes of the link.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: September 7, 2021
    Assignee: Intel Corporation
    Inventors: Debendra Das Sharma, Zuoguo Wu, Mahesh Wagh, Mohiuddin M. Mazumder, Venkatraman Iyer, Jeff C. Morriss
  • Patent number: 11088909
    Abstract: A reconfigurable triplexer that can support more frequency bands than a traditional triplexer is disclosed. For example, the reconfigurable triplexer can handle frequencies of several hundred megahertz up to 10 gigahertz. Further, certain implementations of the reconfigurable multiplexer can reduce or eliminate frequency dead zones that exist with traditional multiplexers. The reconfigurable triplexer includes a multi-stage filter bank capable of supporting a number of frequency bands and a bypass circuit that enables the triplexer to support a variety of sets of frequencies. For instance, unlike traditional triplexers, the reconfigurable triplexer can support both frequency bands with relatively narrow spacing and frequency bands with relatively wide spacing. Further, the inclusion of the bypass circuit enables the reduction or elimination of dead zones between supported frequencies.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: August 10, 2021
    Assignee: Skyworks Solutions, Inc.
    Inventors: Yang Hou, Reza Kasnavi, Jianxing Ni, Shanshan Zhao
  • Patent number: 11018712
    Abstract: A wireless multi-band device comprises a radiating system comprising a ground plane layer, a boosting element, and a radiofrequency system, wherein the radiofrequency system comprises a tunable reactive element.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: May 25, 2021
    Assignee: Fractus Antennas, S.L.
    Inventors: Jaume Anguera Pros, Aurora Andujar Linares
  • Patent number: 11012035
    Abstract: The embodiments described herein include amplifiers that are typically used in radio frequency (RF) applications. Specifically, the amplifiers described herein include one or more transient termination circuits coupled to transistor inputs. For example, the transient termination circuits can be configured to reduce the transient response for some signal energy at frequencies below a baseband frequency (fB) of signals being amplified while not similarly reducing the transient response for signal energy near a fundamental frequency (f0) of the signals being amplified.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: May 18, 2021
    Assignee: NXP USA, Inc.
    Inventors: Arturo Roiz, Justin Nelson Annes, Ricardo Uscola, Terry L. Thomas
  • Patent number: 11005433
    Abstract: The disclosed technology can include a power amplifier comprising an input, an output, and a transformer. The power amplifier can include a primary inductor coil coupled to the input, a secondary inductor coil coupled to the output, and three harmonic branches coupled to the primary coil. Each branch can comprise at least one electrical component having a tunable impedance.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: May 11, 2021
    Assignee: Georgia Tech Research Corporation
    Inventor: Tso-Wei Li
  • Patent number: 10992268
    Abstract: A radio frequency signal amplification device includes an amplification circuit, an impedance matching circuit, a frequency detection circuit, and a control circuit. The amplification circuit has an input terminal and an output terminal. The amplification circuit amplifies a radio frequency (RF) signal received from the input terminal, and generates an amplified radio frequency signal to the output terminal. The impedance matching circuit is coupled to the input terminal or the output terminal of the amplification circuit. The impedance matching circuit receives the radio frequency signal and provides an impedance matching the radio frequency signal, or receives the amplified radio frequency signal and provides an impedance matching the amplified radio frequency signal. The frequency detection circuit determines a frequency band to which the radio frequency signal belongs. The control circuit adjusts the impedance of the impedance matching circuit according to the frequency band.
    Type: Grant
    Filed: September 15, 2019
    Date of Patent: April 27, 2021
    Assignee: RichWave Technology Corp.
    Inventors: Shyh-Chyi Wong, Cheng-Min Lin
  • Patent number: 10972060
    Abstract: In a radio frequency power amplifier, a semiconductor chip includes at least one first transistor amplifying a radio frequency signal, a first external-connection conductive member connected to the first transistor, a bias circuit including a second transistor that applies a bias voltage to the first transistor, and a second external-connection conductive member connected to the second transistor. The second external-connection conductive member at least partially overlaps with the second transistor when viewed in plan.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: April 6, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Sasaki, Isao Obu, Takayuki Tsutsui
  • Patent number: 10944370
    Abstract: A multi-gain mode power amplifier, a chip, and a communication terminal. The multi-gain mode power amplifier comprises at least one amplifier circuit. The amplifier circuit comprises a bias circuit, a feedback circuit, a transistor (101), and an input matching network/output matching network. A bias voltage or a control voltage (120) is adjusted to make the feedback circuit to be either turned on or turned off, thus allowing the amplifier circuit to work in a high-gain mode or a low-gain mode. The multi-gain mode power amplifier has different gain modes, fully satisfies the actual demand of the communication terminal to work in the high-gain mode when transmitting a high power and to work in the low-gain mode when transmitting a low power.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: March 9, 2021
    Assignee: VANCHIP (TIANJIN) TECHNOLOGY CO., LTD.
    Inventor: Jinxin Zhao
  • Patent number: 10855244
    Abstract: A transistor device includes a transistor cell comprising a channel region, a gate runner that is electrically connected to a gate electrode on the channel region and physically separated from the gate electrode, and a harmonic termination circuit electrically connected to the gate runner between the gate electrode and an input terminal of the transistor device, the harmonic termination circuit configured to terminate signals at a harmonic frequency of a fundamental operating frequency of the transistor device.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: December 1, 2020
    Assignee: Cree, Inc.
    Inventors: Frank Trang, Zulhazmi Mokhti, Guillaume Bigny
  • Patent number: 10825785
    Abstract: A semiconductor device includes a semiconductor substrate, a transistor, and a first harmonic termination circuit. The transistor is formed at the semiconductor substrate. The transistor amplifies an input signal supplied to an input end and outputs an amplified signal through an output end. The first harmonic termination circuit attenuates a harmonic component included in the amplified signal. The first harmonic termination circuit is formed at the semiconductor substrate such that one end of the first harmonic termination circuit is connected to the output end of the transistor and the other end of the first harmonic termination circuit is connected to a ground end of the transistor.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: November 3, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hisanori Namie, Satoshi Goto, Satoshi Tanaka
  • Patent number: 10812025
    Abstract: Radio frequency (RF) amplifier circuitry includes an input node, an output node, an amplifier, and bootstrap circuitry. The amplifier includes a control node coupled to the input node, a first amplifier node coupled to the output node, and a second amplifier node coupled to a fixed potential. The amplifier is configured to receive an input signal having a first frequency at the control node and change an impedance between the first amplifier node and the second amplifier node based on the input signal. The bootstrap circuitry is coupled between the control node and the second amplifier node. The bootstrap circuitry is configured to provide a low impedance path between the control node and the second amplifier node for signals having a second frequency that is equal to about twice the first frequency and provide a high impedance path for signals having a frequency outside the second frequency.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: October 20, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Marcus Granger-Jones, George Maxim, Jinsung Choi
  • Patent number: 10720894
    Abstract: A power amplifier is provided having an input for receiving a signal to be amplified that is associated with a fundamental frequency. An amplifier circuit of the power amplifier includes an active device for amplifying the input signal and an output for providing the amplified signal to a load. A load network is electrically interposed between the amplifier circuit and the output and includes fundamental frequency matching circuitry which presents an optimal resistance at the fundamental frequency. The load network further includes a parallel transmission line arrangement having, at the fundamental frequency, a one-eighth wavelength short-circuited stub and a one-eighth wavelength open-circuit stub. The fundamental frequency matching circuitry and the parallel transmission line arrangement cooperate such that the load network operatively presents an optimal resistance at the fundamental frequency, an open-circuit at a second harmonic frequency and a short-circuit at a third harmonic frequency.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: July 21, 2020
    Assignee: Cape Peninsula University of Technology
    Inventors: Safari Mugisho Moise, Clive Whaits
  • Patent number: 10715084
    Abstract: A power amplifier circuit includes an amplifier that receives an input signal with an alternating current and outputs an output signal obtained by amplifying power of the input signal to a first node; an inductive element that is connected between the first node and a second node; and a variable capacitor that is connected between the second node and a reference potential, and whose electrostatic capacitance increases as power of the output signal increases.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: July 14, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Masatoshi Hase, Norio Hayashi, Kazuo Watanabe, Yuuri Honda
  • Patent number: 10700651
    Abstract: A wide bandpass filtering power amplifier using discriminating coupling is disclosed, which comprises a DC bias circuit, an input impedance matching circuit, a transistor and an output impedance matching circuit. The DC bias circuit is connected to the input impedance matching circuit which is further connected to the transistor, and the transistor is further connected to the output impedance matching circuit which comprises a tuning microstrip line and a bandpass filter. The complexity and the area of the impedance matching circuit in the power amplifier are effectively reduced. At the same time, the filtering PA has good frequency selectivity by using the discriminating coupling BPF. Meanwhile the work efficiency and bandwidth of the filtering power amplifier are effectively improved by taking both of the extended continuous mode theory and filter synthesis theory into account.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: June 30, 2020
    Assignee: South China University of Technology
    Inventors: Yuanchun Li, Qinchuang Chen, Quan Xue
  • Patent number: 10700650
    Abstract: Methods and devices addressing design of wideband LNAs with gain modes are disclosed. The disclosed teachings can be used to reconfigure RF receiver front-end to operate in various applications imposing stringent and conflicting requirements. Wideband and narrowband input and output matching with gain modes using a combination of the same hardware and a switching network are also disclosed. The described methods and devices also address carrier aggregation requirements and provide solutions that can be used both in single-mode and split-mode operations.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: June 30, 2020
    Assignee: pSemi Corporation
    Inventors: Emre Ayranci, Miles Sanner, Phanindra Yerramilli
  • Patent number: 10685927
    Abstract: A packaged RF power amplifier comprises an output network coupled to the output of a RF power transistor, which output network comprises a plurality of first bondwires extending along a first direction between the output of transistor and an output lead of the package, a series connection of a second inductor and a first capacitor between the output of the RF power transistor and ground, and a series connection of a third inductor and a second capacitor connected in between ground and the junction between the second inductor and the first capacitor. The first and second capacitors are integrated on a single passive die and the third inductor comprises a first part and a second part connected in series, wherein the first part extends at least partially along the first direction, and wherein the second part extends at least partially in a direction opposite to the first direction.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: June 16, 2020
    Assignee: Ampleon Netherlands B.V.
    Inventors: Johannes Adrianus Maria De Boet, Yi Zhu, Yuri Volokhine, Vittorio Cuoco, Albertus Gerardus Wilhelmus Philipus Van Zuijlen, Iordan Konstantlnov Sveshtarov, Josephus Henricus Bartholomeus Van der Zanden
  • Patent number: 10680561
    Abstract: A power amplifier module includes an amplifier that amplifies an input signal and outputs the amplified signal, a harmonic termination circuit that is disposed subsequent to the amplifier and that attenuates a harmonic component of the amplified signal, the harmonic termination circuit including at least one field effect transistor (FET), and a control circuit that controls a gate voltage of the at least one FET to adjust a capacitance value of a parasitic capacitance of the at least one FET. The control circuit adjusts the capacitance value of the parasitic capacitance of the at least one FET, and thereby a resonance frequency of the harmonic termination circuit is adjusted.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: June 9, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shota Ishihara, Yuji Shintomi, Satoshi Matsumura
  • Patent number: 10673393
    Abstract: An amplifier for a receiver circuit is disclosed. The amplifier has an input node (Vin) and an output node (Vout). It comprises a tunable tank circuit connected to the output node (Vout), a feedback circuit path connected between the output node (Vout) and the input node (Vin), and a tunable capacitor connected between an internal node of the feedback circuit path and a reference-voltage node. A receiver circuit and a communication apparatus is disclosed as well.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: June 2, 2020
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (publ)
    Inventor: Fenghao Mu
  • Patent number: 10666204
    Abstract: A circuit includes an amplifier to amplify an input signal and generate an output signal. The circuit also includes a tuning network to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, which includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure over a control structure, which is to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: May 26, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Aritra Banerjee, Nathan R. Schemm, Rahmi Hezar, Lei Ding, Baher Haroun
  • Patent number: 10666207
    Abstract: The operative bandwidth of a broadband RF amplifier is improved by using a low-pass type broadband impedance transformer, instead of a broadband matching network, in a multi-stage impedance matching network connected, e.g., to the amplifier input. The multi-stage impedance matching network comprises three stages connected in series. The first stage is a low-pass type broadband impedance transformer that provides broadband fundamental impedances and high reflection for the second harmonics. The second stage is a phase shifter that controls the location of the second harmonic reflection coefficient phases. The third stage is a high-pass input matching circuit that transforms the complex conjugate device input impedance to a real impedance.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: May 26, 2020
    Assignee: Cree, Inc.
    Inventors: Haedong Jang, Richard Wilson, Björn Herrmann, Zulhazmi Mokhti
  • Patent number: 10601376
    Abstract: A receiver front end having low noise amplifiers (LNAs) with enhanced input third order intercept point is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured load FET have a degeneration circuit comprising a tank circuit tuned to a harmonic of the operating frequency.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: March 24, 2020
    Assignee: pSemi Corporation
    Inventor: Michael P. Gaynor
  • Patent number: 10594273
    Abstract: A power amplifier module includes a first amplifier that amplifies an input signal to generate a first amplified signal and outputs the first amplified signal, a second amplifier that amplifies the first amplified signal to generate a second amplified signal and outputs the second amplified signal, and a matching network disposed between an output terminal of the first amplifier and an input terminal of the second amplifier. The first amplifier is provided on a first chip, and the second amplifier is provided on a second chip. The matching network has an impedance transformation characteristic adjustable in accordance with a control signal.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: March 17, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Shingo Yanagihara
  • Patent number: 10588181
    Abstract: The present disclosure provides a microwave oven, and a thawing control method and device for the same. The method includes: acquiring a total period T of thawing according to a weight x of food in the microwave oven, wherein the total period T of thawing satisfies: T=K(x/100) seconds, where, 20 seconds/g?K?120 seconds/g; and controlling the microwave generator to start, and thawing the food according to the total period T of thawing. With the method, the thawed food is more nutritious, healthier, and easier to cut, and has the low temperature difference, without a cooked discoloration phenomenon.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: March 10, 2020
    Assignees: GUANGDONG MIDEA KITCHEN APPLIANCES MANUFACTURING CO., LTD., MIDEA GROUP CO., LTD.
    Inventors: Xiangwei Tang, Yuze Jia, Yan Li, Chun Luan, Dawen Sun, Zhong Han, Xinan Zeng
  • Patent number: 10581387
    Abstract: An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: March 3, 2020
    Assignee: pSemi Corporation
    Inventors: Tero Tapio Ranta, Chih-Chieh Cheng, Kevin Roberts
  • Patent number: 10581396
    Abstract: Provided is an electric transmission cable module that has both a squelch function and an AGC function, and realizes a highly accurate function while suppressing an increase in chip cost.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: March 3, 2020
    Assignee: Hitachi Metals, Ltd.
    Inventors: Koji Maeda, Izumi Fukasaku
  • Patent number: 10536119
    Abstract: An amplifier circuit for amplifying an input signal includes a transistor configured to receive the input voltage via an input port, and a second-harmonic trap connected between the transistor and ground, the second-harmonic trap having an impedance high enough to enable the second-harmonic trap to act as an open circuit at a second harmonic frequency of a voltage provided by the transistor. The second-harmonic trap includes a transformer including a primary winding connected to ground and a secondary winding, the primary winding receiving the voltage provided by the transistor. The second-harmonic trap further includes a variable capacitor connected in parallel with the secondary winding of the transformer, the variable capacitor having an adjustable capacitance that may be adjusted for the second-harmonic trap to act as the open circuit at the second harmonic frequency.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: January 14, 2020
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Min-Su Kim, Namsoo Kim, Eun-gyu Hong
  • Patent number: 10523161
    Abstract: A power amplification module includes: an amplifier that amplifies an input signal and outputs an amplified signal; and a harmonic-termination circuit to which harmonics of the amplified signal are input and the impedance of which is controlled in accordance with the frequency of a harmonic. The power amplification module can operate in a first mode in which a power supply voltage changes in accordance with the average voltage value of the amplified signal over a prescribed time period or in a second mode in which the power supply voltage changes in accordance with the envelope of the input signal. The impedance of the harmonic-termination circuit is controlled such that at least one even-ordered harmonic is short-circuited when the power amplification module operates in the first mode and at least one odd-ordered harmonic of third order or higher is short-circuited when the power amplification module operates in the second mode.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: December 31, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Shigeki Koya
  • Patent number: 10454431
    Abstract: An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: October 22, 2019
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Pete Sivonen, Jarkko Jussila, Sami Vilhonen
  • Patent number: 10427402
    Abstract: The power supply unit includes a circuit substrate including a first layer that is a surface layer being conductive, a first wiring pattern formed of the first layer, a second layer that is conductive, and a second wiring pattern formed of the second layer, and first and second capacitors formed on the first layer. The first capacitor includes a first terminal and a second terminal. The second capacitor includes a third terminal and a fourth terminal. The circuit substrate includes a first electrode connecting the first terminal of the first capacitor to the first wiring pattern, a second electrode connecting the second terminal of the first capacitor to the second wiring pattern, a third electrode connecting the third terminal of the second capacitor to the second wiring pattern, and a fourth electrode connecting the fourth terminal of the second capacitor to the first wiring pattern.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: October 1, 2019
    Assignee: Seiko Epson Corporation
    Inventor: Katsuhiko Hayashi
  • Patent number: 10411583
    Abstract: In one form, a power amplifier system includes first and second amplification path, and a combination element. The first amplification path has an input for receiving a drive signal, and an output. The second amplification path has an input coupled to the input of the first amplification path, and an output. The second amplification path has a delay element that inserts a signal path delay with respect to the first amplification path, wherein the delay element has a delay corresponding to a harmonic that is desired to be reduced. The combination element is coupled to the output of the first amplification path and an output of the second amplification path, and provides an output signal as a sum of outputs of the first amplification path and the second amplification path.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: September 10, 2019
    Assignee: SILICON LABORATORIES INC.
    Inventors: Sriharsha Vasadi, Mustafa H. Koroglu, Sherry X. Wu
  • Patent number: 10411515
    Abstract: A primary coil circuit of a ground assembly for wirelessly transferring power to a secondary coil includes: a primary coil magnetically coupled to the secondary coil and having a first terminal and a second terminal; a second capacitor having a first terminal and a second terminal connected to the first terminal of the primary coil; a first inductor having a first terminal coupled to a first input terminal of a power source and a second terminal coupled to the first terminal of the second capacitor; and a first capacitor having a first terminal coupled commonly to the second terminal of the first inductor and the first terminal of the second capacitor and a second terminal coupled commonly to the second terminal of the primary coil and a second input terminal of the power source.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: September 10, 2019
    Assignees: Hyundai Motor Company, Kia Motors Corporation, Research & Business Foundation Sungkyunkwan University
    Inventors: Woo Young Lee, Gyu Yeong Choe, Min Jung Kim, Min Kook Kim, Jong Eun Byeon, Min Hyuck Kang, Dong Gyun Woo, Byoung Kuk Lee, Dong Myoung Joo
  • Patent number: 10404166
    Abstract: Described herein are systems, architectures, circuits, devices, and methods for a DC-DC converter that dynamically adjusts a supply voltage to a power amplifier based on the number of resource blocks in a signal to be transmitted. The disclosed technologies estimate the number of resource blocks in a signal, generate a signal corresponding to the estimated number of resource blocks, and modify a supply voltage based on the generated signal. The disclosed DC-DC converters can be integrated into systems that employ power management strategies such as average power tracking (“APT”). In addition, the disclosed technologies can be used to improve existing APT-based systems.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: September 3, 2019
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Sabah Khesbak, Florinel G. Balteanu, Roman Zbigniew Arkiszewski
  • Patent number: 10396727
    Abstract: Exemplary embodiments including an amplifier circuit that includes a radio-frequency (RF) amplifier comprising an input terminal and an output terminal, the RF amplifier being configured to amplify, across a wideband frequency range, an RF signal applied to the input terminal to generate an amplified RF signal at the output terminal. The amplifier circuit also includes a first impedance matching network connected to the RF amplifier output terminal. The first impedance matching network includes a first reactive circuit, having substantially fixed impedance, connected between the RF amplifier input terminal and ground; a second reactive circuit; and a switching device configured to couple the second reactive circuit to the first reactive circuit in an ON state, and to decouple the second reactive circuit from the first reactive circuit in an OFF state. In some embodiments, the amplifier circuit can include a second impedance matching network connected to the RF amplifier input terminal.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: August 27, 2019
    Assignee: CREE, INC.
    Inventors: Saurabh Goel, Richard Wilson, Haedong Jang
  • Patent number: 10361663
    Abstract: Provided is a low-noise amplifier that can effectively suppress noise included in an input signal. A low-noise amplifier according to an embodiment of the present invention amplifies a reception signal in a predetermined frequency band from an antenna. The low-noise amplifier includes an input terminal, an output terminal, a field effect transistor, and a branch circuit. The branch circuit is branched from a circuit connecting the input terminal or the output terminal to the field effect transistor. The branch circuit is connected to the elastic wave resonator.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: July 23, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Saneaki Ariumi
  • Patent number: 10355724
    Abstract: Systems, devices and methods related to multi-band power amplifier. In some embodiments, a power amplifier module includes a power amplifier having an output stage and configured to receive a signal. The power amplifier module also includes a first programmable harmonic termination circuit in electrical communication with the output stage of the power amplifier. The first programmable harmonic termination circuit includes a first plurality of capacitors and a first plurality of switches, with at least one of the first plurality of capacitors being in electrical communication with at least one of the first plurality of switches. The power amplifier module further includes a controller configured to modify a configuration of the first plurality of switches of the first programmable harmonic termination circuit based at least in part on a second harmonic frequency of the signal.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: July 16, 2019
    Assignee: Skyworks Solutions, Inc.
    Inventors: Jinghang Feng, Shuqi Zheng, Netsanet Gebeyehu, Ying Shi, James Phillip Young
  • Patent number: 10326413
    Abstract: A power amplification circuit that includes: a capacitor element in which a first metal layer, a first insulating layer, a second metal layer, a second insulating layer and a third metal layer are sequentially stacked, the capacitor element including a first capacitor in which the first metal layer serves as one electrode thereof and the second metal layer serves as another electrode thereof, and a second capacitor in which the second metal layer serves as one electrode thereof and the third metal layer serves as another electrode thereof; and a transistor that amplifies a radio-frequency signal. The radio-frequency signal is supplied to the one electrode of the first capacitor. The other electrode of the first capacitor and the one electrode of the second capacitor are connected to a base of the transistor, and the other electrode of the second capacitor is connected to the emitter of the transistor.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: June 18, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Satoshi Goto
  • Patent number: 10312797
    Abstract: An energy harvesting system includes a transducer, a capacitor, a power converter, a power converter control line, a control switch and a control switch control line. The transducer harvests energy and outputs electrical current based on the harvested energy. The capacitor stores a rectified voltage based on the electrical current. The control switch can be open or closed. The control switch control line is arranged to provide a control voltage based on the rectified voltage to the control switch. When the control voltage is equal to or greater than a threshold voltage the control switch is closed such that the power converter control line electrically connects the power converter to a battery in order to provide harvested energy to the battery.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: June 4, 2019
    Assignee: The United States of America as represented by Secretary of the Navy
    Inventors: Alex G. Phipps, Eric G. Bozeman
  • Patent number: 10307117
    Abstract: Provided are an X-ray detecting apparatus which is capable of controlling an electric power supplied to an X-ray detector module while an X-ray tomography scanning is being performed, and a method for operating the X-ray detecting apparatus. The X-ray detecting apparatus includes an X-ray detector module which has a heat dissipation structure.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: June 4, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-kyu Park, Dae-yeong Jang, Key-jo Hong, Hee-cheol Kim, Jeong-geun Cho
  • Patent number: 10291267
    Abstract: Systems and methods are provided for band-limited digital pre-distortion (DPD) expansion estimation and curve adjustment. Pre-distortion adjustments may be applied during processing of an input signal, and expansion introduced as result of applying the pre-distortion adjustments may then be estimated. Expansion adjustments may then be determined based on the estimated expansion, and the expansion adjustments may be applied in a feedback manner during subsequent processing operations.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: May 14, 2019
    Assignee: MAXLINEAR, INC.
    Inventor: Elad Shaked
  • Patent number: 10270398
    Abstract: A low noise amplifier includes an amplifier transistor having a source, a gate, and a drain. An input node is coupled to the gate. An output node is coupled to the drain. An inductor is coupled between the gate and the drain.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Jun-De Jin
  • Patent number: 10270411
    Abstract: An amplifier according to an embodiment of the present invention includes a first transistor and a second transistor that are connected between a ground point and a power supply. A control terminal of the first transistor is connected to an input terminal. A first terminal of the first transistor is connected to the ground point. A second terminal of the second transistor is connected to an output terminal. The amplifier further includes an impedance element and a variable resistance unit. The impedance element is connected between the second terminal of the second transistor and the power supply. The variable resistance unit is connected between the second terminal of the first transistor and the first terminal of the second transistor.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: April 23, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Ken Wakaki, Daisuke Watanabe
  • Patent number: 10263575
    Abstract: The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: April 16, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Rajendrakumar Joish
  • Patent number: 10263537
    Abstract: A power conversion apparatus includes: DC input terminals for inputting a DC voltage; AC output terminals for outputting an AC voltage; a switching element; a first resonant capacitance connected across the switching element; a first LC resonance circuit that has an inductance and a capacitance connected in series and is connected together with the switching element between the AC output terminals; and a second LC resonance circuit connected in series together with the switching element between the DC input terminals. The second LC resonance circuit includes a first connector portion connected to one DC input terminal and a second connector portion connected to the switching element, and has a first current path, which includes an inductance, and a second current path, which includes a series circuit with an inductance and a capacitance, formed between the first connector portion and the second connector portion.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: April 16, 2019
    Assignee: TDK CORPORATION
    Inventors: Min Lin, Ken Matsuura, Hitoshi Kinoshita
  • Patent number: 10250212
    Abstract: Radio frequency devices and methods are provided where a network like a filter network or impedance matching network comprises a series connection of at least two inductors.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: April 2, 2019
    Assignee: Infineon Technologies AG
    Inventors: Ralf-Rainer Schledz, Vjekoslav Matic, Peter Solyom
  • Patent number: 10205425
    Abstract: LNA circuitry includes an input node, and output node, a primary amplifier stage, a first ancillary amplifier stage, and an input gain selection switch. The primary amplifier stage is configured to provide a first gain response between a primary amplifier stage input node and a primary amplifier stage output node, wherein the primary amplifier stage input node is coupled to the input node and the primary amplifier stage output node is coupled to the output node. The first ancillary amplifier stage is configured to provide a second gain response between a first ancillary amplifier stage input node and a first ancillary amplifier stage output node, wherein the first ancillary amplifier stage output node is coupled to the primary amplifier stage output node. The input gain selection switch is coupled between the input node and the first ancillary amplifier stage input node.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: February 12, 2019
    Assignee: Qorvo US, Inc.
    Inventors: George Maxim, Marcus Granger-Jones, Kelvin Kai Tuan Yan, Dirk Robert Walter Leipold, Baker Scott
  • Patent number: 10199991
    Abstract: A radio frequency (RF) power transistor circuit includes a power transistor and a decoupling circuit. The power transistor has a control electrode coupled to an input terminal for receiving an RF input signal, a first current electrode for providing an RF output signal at an output terminal, and a second current electrode coupled to a voltage reference. The decoupling circuit includes a first inductive element, a first resistor, and a first capacitor coupled together in series between the first current electrode of the power transistor and the voltage reference. The decoupling circuit is for dampening a resonance at a frequency lower than an RF frequency.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: February 5, 2019
    Assignee: NXP USA, INC.
    Inventors: Hussain H. Ladhani, Gerard J. Bouisse, Jeffrey K. Jones
  • Patent number: 10181822
    Abstract: A power amplifier module includes an amplifier that amplifies an input signal and outputs an amplified signal, a matching circuit disposed between an output terminal of the amplifier and a subsequent circuit, a choke inductor having a first end to which a power supply voltage is applied and a second end from which power supply is provided to the amplifier through the output terminal of the amplifier, and a first attenuation circuit disposed between the output terminal of the amplifier and the second end of the choke inductor and configured to attenuate a harmonic component of the amplified signal.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: January 15, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hiroki Shounai, Yoshiki Kogushi
  • Patent number: 10177723
    Abstract: A power amplifier circuit, including: an input node configured to receive a radio frequency (RF) signal; an output node configured to output an amplified RF signal; a main path switchably coupled between the input node and the output node, and including a first plurality of amplification stages to generate a first amplified RF signal; a bypass path switchably coupled between the input node and the output node, and including at least one second amplification stage to generate a second amplified RF signal; and a coupling switch configured to reuse at least a portion of the bypass path to drive the main path to generate a third amplified RF signal.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: January 8, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Marco Cassia, Jose Cabanillas