And Bandpass, Broadband (e.g., Wideband) Or Sidepass Means Patents (Class 330/306)
  • Publication number: 20090108944
    Abstract: A low-noise amplifier circuit includes a MOS transistor in a common gate amplifier configuration. A single-ended input is at a source of the MOS transistor. A resonant cavity filter circuit is coupled to a gate of the MOS transistor.
    Type: Application
    Filed: August 8, 2008
    Publication date: April 30, 2009
    Inventors: MING-CHING KUO, Hsiao-Wen Kao, Chih-Hung Chen
  • Patent number: 7508263
    Abstract: A digital amplifying apparatus includes a positive-phase amplifier, an inverting amplifier, a pair of LPFs, a positive and a negative noise component extracting unit, and noise component coupling units that couple a negative and a positive noise component extracted by the negative and the positive noise component extracting units with a positive and a negative PWM signals.
    Type: Grant
    Filed: November 1, 2005
    Date of Patent: March 24, 2009
    Assignee: Pioneer Corporation
    Inventor: Takao Inoue
  • Publication number: 20090039965
    Abstract: An electrical component includes an amplifier that includes an output stage, and a power-supply path for powering the output stage. The power supply path includes a line that includes conductor track sections in parallel. The electrical component also includes a carrier substrate containing the amplifier and the line with the conductor tracks.
    Type: Application
    Filed: May 10, 2006
    Publication date: February 12, 2009
    Applicant: EPCOS AG
    Inventors: Christian Block, Miguel Falagan, Holger Fluhr
  • Publication number: 20090021307
    Abstract: Described herein are multi-band LNAs that reuse inductors for different frequency bands to minimize chip area. In an embodiment, a multi-band LNA is capable of operating in a narrowband (NB) and a wideband (WB) while reusing at least one input impedance matching inductor and at least one load inductor for both bands. The reuse of inductors results in a more efficient use of chip area. In an exemplary embodiment, the LNA comprises a common source transistor and a common gate transistor. In this embodiment, the LNA operates in a common source configuration using the common source transistor to amplify input signals in the NB, and operates in a common gate configuration using the common gate transistor to amplify input signals in the WB. The LNA reuses an input impedance matching inductor and a load inductor in both configurations, and thus both bands.
    Type: Application
    Filed: April 22, 2008
    Publication date: January 22, 2009
    Inventors: Fred Tzeng, Amin Jahanian, Payam Heydari
  • Publication number: 20090021309
    Abstract: Disclosed is a novel design of a fully integrated UWB transmitter. The transmitter includes a pulse generator, a pulse modulator, and an ultra-wideband drive amplifier. A new low voltage low power pulse generator circuit is disclosed which can be fully integrated in CMOS or BiCMOS process. This circuit includes a squaring stage, an exponential stage, and a second-order derivative stage. Based on this, PPM, BPSK and PAM pulse modulator circuits and system are disclosed. The modulated pulse is symmetrical second-order derivative Gaussian pulses with a bandwidth up to 5 GHz and having sufficient swing for UWB applications. An ultra-wideband driver amplifier is proposed to amplify the modulator output and drive the antenna. For the driver amplifier, common source resistor and inductor shunt feedback with current reuse technique is employed to achieve the ultra-wideband bandwidth, high gain, and providing matching for the antenna simultaneously.
    Type: Application
    Filed: December 30, 2004
    Publication date: January 22, 2009
    Inventor: Yuan Jin Zheng
  • Patent number: 7474150
    Abstract: In a broadband communication system there are multi-stage power amplifier systems for amplifying the power of radio-frequency (RF) communication signals. Each stage of the amplifier system results in composite triple beat (CTB) distortion, and if the phase of the CTB distortions are approximately the same (i.e. are in-phase), then the amplitudes of the distortions are added (i.e. “20 dB” rule). The amplifier system of the invention includes one or more phase filters positioned in series between the power amplifier stages. The phase filters are adapted to shift the phase of the communication signals, so that the phase of CTB distortions, resulting from the amplification of the communication signals in the amplifier stages between the phase filters, are substantially different (i.e. are out-of-phase). Thus, only the power of the CTB distortions are added (i.e. “10 dB” rule).
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: January 6, 2009
    Assignee: Broadband Royalty Corporation
    Inventors: Marcel F. Schemmann, Zoran Maricevic
  • Publication number: 20080253477
    Abstract: An IQ-modulator pre-distorter includes an iteratively updated digital filter (gQ0, gQ1) for filtering one of the branches of an IQ-signal to compensate for IQ-modulator generated amplitude errors. An iteratively updated digital filter (cQI0, cQI1), cross-connected from one of the branches to the other branch, filters one of the components of an IQ-signal to compensate for IQ-modulator generated inter-modulation between the branches. Iteratively updated compensators (dcI, dcQ) counteract IQ-modulator generated offset errors.
    Type: Application
    Filed: February 24, 2005
    Publication date: October 16, 2008
    Applicant: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Spendim Dalipi
  • Patent number: 7425872
    Abstract: A bias voltage is applied via a first resistance to the base of a first transistor, and a radio frequency signal is input via a first capacitor to the base of the first transistor. The bias voltage is applied via a second resistance to the base of a second transistor. The bias voltage is applied via a third resistance to the base of a third transistor, and the radio frequency signal RF is input via a third capacitor to the base of the third transistor. A first band rejection filter is provided between the base of the first transistor and the base of the second transistor. A second band rejection filter is provided between the base of the second transistor and the base of the third transistor. The collectors of the first to third transistors are connected in common and the emitters thereof are all grounded.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: September 16, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiko Inamori, Kazuhiko Ohhashi, Hiroshi Sugiyama, Masao Nakayama, Kaname Motoyoshi
  • Publication number: 20080218273
    Abstract: Aspects of the disclosure can provide a bandpass transconductance amplifier that can include a minuend transconductance amplifier that converts a voltage signal to a first current and a subtrahend transconductance amplifier that converts the voltage signal to a second current having substantially the same amplitude as the first current but opposite polarity in both a first and a second stopband. The second current can have a substantially smaller amplitude than the first current in a passband. The disclosed bandpass transconductance amplifier can also include a controller that can tune the passband and the stopbands and a summing circuit that can add the first current and the second current.
    Type: Application
    Filed: March 10, 2008
    Publication date: September 11, 2008
    Inventors: Gregory Uehara, Brian Brunn
  • Patent number: 7423490
    Abstract: An n-stage RF choke comprises a series connection of two or more inductors connected in series between a source and a load. The inductor closest to the source has the largest inductance and the inductance closest to the load has the smallest inductance. The inductances of any inductors between the inductor closest to the supply and the inductor closest to the load decrease as a function of distance from the supply. The junctions between the inductors in the series connection are shunted to ground by capacitors connected in series with resistors that provide a matched termination for increasing bandwidth by lowering circuit Q factors and eliminating resonant frequencies. The capacitor closest to the supply has the largest capacitance and the capacitor closest to the load has the smallest capacitance. Any intermediate capacitors decrease in capacitance as a function of distance from the supply. Such an arrangement provides a high impedance that isolates the load from the supply at a wide range of frequencies.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: September 9, 2008
    Assignee: Rockwell Scientific Licensing, LLC
    Inventors: Yin Tat Ma, Jonathan Bruce Hacker
  • Publication number: 20080204148
    Abstract: An amplifier with integrated filter (e.g., an LNA) is described. In one design, the amplifier may include a gain stage, a filter stage, and a buffer stage. The gain stage may provide signal amplification for an input signal. The filter stage may provide filtering for the input signal. The buffer stage may buffer a filtered signal from the filter stage. The amplifier may further include a second filter stage and a second buffer stage. The second filter stage may provide additional filtering for the input signal. The second buffer stage may buffer a second filtered signal from the second filter stage. All of the stages may be stacked and coupled between a supply voltage and circuit ground. The filter stage(s) may implement an elliptical lowpass filter. Each filter stage may include an inductor and a capacitor coupled in parallel and forming a resonator tank to attenuate interfering signals.
    Type: Application
    Filed: September 10, 2007
    Publication date: August 28, 2008
    Applicant: QUALCOMM INCORPORATED
    Inventors: Tae Wook Kim, Guy Klemens, Kenneth Charles Barnett, Susanta Sangupta, Gurkanwal Singh Sahota
  • Patent number: 7411458
    Abstract: Power amplifier (PA) apparatus that includes: a PA device operating at a fundamental frequency and having a maximum operating frequency that is higher than the fundamental frequency, an output current having a fundamental component at the fundamental frequency and a plurality of harmonic components at different harmonic frequencies of the fundamental frequency, and an output voltage based on the output current; a first matching circuit coupled to the PA device and corresponding to the fundamental component; and a second matching circuit coupled between the PA device and the first matching circuit and corresponding to at least one of the harmonic components, wherein the first and second matching circuits maintain the PA output voltage at a value that is no more than a predetermined maximum value, which is less than a breakdown voltage for the PA device.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: August 12, 2008
    Assignee: Motorola, Inc.
    Inventors: Jeffrey A. Frei, Enver Krvavac
  • Publication number: 20080186103
    Abstract: A radio frequency (RF) application circuit is provided. In the RF application circuit, a pair of bipolar junction transistors (BJTs), instead of N-channel metal-oxide-semiconductor (NMOS) transistors, is composed of a switch-block operated in a reversion saturation region. The RF application circuit is used to serve as either an oscillator or a band pass amplifier according to the circuit characteristic of an active circuit. Thereby, not only the function of the conventional NMOS transistor served as a switch can be achieved by the switch-block, but also the element size, turned-on resistance value and turned-off parasitic capacitance value of the switch-block, and the power consumption of the RF application circuit thereof can be reduced. Thus, the resolution of the capacitance unit in a LC resonance circuit and the performance of the RF application circuit thereof can be promoted.
    Type: Application
    Filed: February 3, 2008
    Publication date: August 7, 2008
    Applicant: SUNPLUS TECHNOLOGY CO., LTD.
    Inventor: Jui-Pin Chen
  • Publication number: 20080169877
    Abstract: A cascode-connected transistor includes a common-source transistor which receives an input signal, and a common-gate transistor which is connected to a drain terminal of the common-source transistor and outputs an output signal. A band-pass filter receives the output signal of the cascode-connected transistors. An adjustment circuit is interposed between the drain terminal and the gate terminal of the common-gate transistor, and adjusts the output impedance of the cascode-connected transistor.
    Type: Application
    Filed: December 21, 2007
    Publication date: July 17, 2008
    Inventor: Seiichi Banba
  • Publication number: 20080150639
    Abstract: Disclosed is a power amplification apparatus in a communication system. The apparatus includes a high power amplifier for amplifying an input signal; and a lattice panel, one surface of which is in contact with a ground plane of the high power amplifier, the one surface including a first line and a second line. The first line has at least two first etched portions and at least one first copperplate portion, the first copperplate portion being positioned between the first etched portions, and the first copperplate portion being formed at an interval of ?0/4, and the second line has at least two second etched portions and at least one second copperplate portion, the second copperplate portion being positioned between the second etched portions, and the second copperplate portion being formed at an interval of ?0?/4.
    Type: Application
    Filed: December 20, 2007
    Publication date: June 26, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jin-Ho YOON
  • Patent number: 7391268
    Abstract: A power amplifying device includes a stabilizing circuit between an input terminal and an amplifier. The stabilizing circuit has a first line, a second line, and a third line. The first line is connected to the ground. The length of the first line is equal to or longer than three fourths of the wavelength of the operating frequency.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: June 24, 2008
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Junichi Udomoto
  • Patent number: 7391256
    Abstract: The present disclosure relates generally to systems and methods for direct current (DC) correction in wireless devices. In one example, a method includes setting a cutoff frequency of a filter at a first frequency, where a signal entering the filter is attenuated based on the cutoff frequency. If a qualified change is detected in a DC component of the signal, the cutoff frequency is set at a second frequency that attenuates more of the signal than the first frequency for a defined time period. The cutoff frequency may then be set to the first frequency after the defined time period.
    Type: Grant
    Filed: September 18, 2006
    Date of Patent: June 24, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: William Milton Hurley, Lup Meng Loh, Yinong Ding, Michael L. Brobston, John Alexander Interrante
  • Publication number: 20080136530
    Abstract: A circuit for broadband amplification is provided. The circuit includes an input HF_IN and an output HF_OUT, a first 90° hybrid coupler being connected to the input HF_IN of the circuit and a second 90° hybrid coupler being connected to the output HF_OUT of the circuit, and two amplifier stages being connected in parallel between the first and the second 90° hybrid coupler, the 90° hybrid couplers being hybrid couplers having an operating range of 1/n octaves between a lower frequency value and an upper frequency value, n?N\{0}, i.e., n is an element of the natural positive whole numbers in such a way that the upper frequency value is greater than the lower frequency range and simultaneously less than two times the value of the lower frequency range, and the amplifier stages being based on transistors having a III-nitride, or SiC, or diamond basis.
    Type: Application
    Filed: November 7, 2007
    Publication date: June 12, 2008
    Applicant: EADS Deutschland GmbH
    Inventor: Andreas SALOMON
  • Publication number: 20080119153
    Abstract: When switching over from a portable telephone system of 800 MHz band to a UWB communication system of 9 GHz band, depending upon a signal for changing over a high pass filter and a low pass filter, a reactance element, which is determined to be matching with a load Z of the high pass filter, is connected to an output terminal of a transmitting power amplifier. With this, it is possible to achieve a multi-band or multi-mode wireless receiver of using a frequency band from 800 MHz to 10 GHz, without an enlargement of a circuit scale and an increase of costs.
    Type: Application
    Filed: June 27, 2007
    Publication date: May 22, 2008
    Inventors: Yoshikazu Sugiyama, Satoshi Adachi, Yusaku Katsube, Masazumi Tone, Taku Takaki
  • Publication number: 20080112711
    Abstract: An operational amplifier circuit 5 of the present invention includes: a transconductance amplifier circuit 1 which converts a differential input voltage into a differential output current; a common-mode feedback circuit 2 which outputs a control signal to the transconductance amplifier circuit 1 so as to make a D.C. voltage level of a differential output voltage of the transconductance amplifier circuit 1 equal to a reference voltage vref; a voltage supply circuit 3 which supplies, as the reference voltage vref, a voltage which is hardly affected by a power source voltage to the common-mode feedback circuit 2; and an output load ZL to which the differential output voltage of transconductance amplifier circuit 1 is applied, and which constitutes an output terminal of the operational amplifier circuit 5. To each of the circuits, a power source voltage vdd is supplied from a power source terminal.
    Type: Application
    Filed: October 31, 2007
    Publication date: May 15, 2008
    Inventor: Takahiro INOUE
  • Patent number: 7355481
    Abstract: An amplification circuit connected with a lowpass filter, which reduces the time required for compensating the amplification characteristic and starting up at turning on the power supply, and a control method thereof are provided. An amplification circuit 10, which operates in any one of the operation mode of ordinary operation mode MDN and special operation mode MDT, includes an amplifying section 20, a lowpass filter 30 connected to the amplifying section 20, and a lowpass filter setting section 40 that sets a cut-off frequency fc. In the case of an ordinary operation mode MDN, the cut-off frequency is set to an ordinary cut-off frequency fcn in which error in the output signal does not exceed an output allowable error as an allowable error, and in the case other than that, set to the side higher than the ordinary cut-off frequency fcn.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: April 8, 2008
    Assignee: Fujitsu Limited
    Inventor: Koji Takekawa
  • Patent number: 7352237
    Abstract: A radio frequency power amplifier and corresponding methods are arranged and configured to drive or provide a radio frequency signal to a resonant load. The amplifier includes a radio frequency switching stage with an output that is coupled to a resonant circuit and configured to provide an output signal with amplitude modulation corresponding to amplitude modulation of an input signal when powered from a fixed voltage power supply and a feedback control system coupled to the input signal and the output signal. The feedback control system includes a sequencer configured to provide a sequencer output that is used to drive the radio frequency switching stage, where the sequencer output has an OFF state that begins at a variable time corresponding to the input and output signal.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: April 1, 2008
    Assignee: Pulsewave RF, Inc.
    Inventors: William Martin Snelgrove, Kelly Mekechuk, David Kelly, Richard Wilson
  • Patent number: 7260375
    Abstract: A frequency agile sequential amplifier circuit that includes first and second RF amplifiers coupled by a SAW delay line, a double balanced mixer coupling the first RF amplifier to the SAW delay line, the output of the first RF amplifier providing a signal as a first input to the double balanced mixer and a variable pulse generator coupled to both said first and second RF amplifiers to cause them to sequentially and alternately conduct, and a divide/2 circuit coupling said variable pulse generator to said double balanced mixer as a second input at ½ the rate of said RF amplifiers to cause the sequential amplifier circuit to achieve frequency agility and to substantially maintain its sensitivity.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: August 21, 2007
    Assignee: RF Monolithics, Inc.
    Inventor: Darrell Lee Ash
  • Patent number: 7245186
    Abstract: The present invention discloses a bandpass amplifier having gain and bandpass performance. The bandpass amplifier includes an input match unit for matching the gain of the amplifier and having a first filter response; a first bias unit electrically connected to the input match unit for driving the first terminal of the amplifier and having a first high pass filter response; a gain stage electrically connected to the first bias unit for providing the flat gain of the amplifier; a second bias unit electrically connected to the gain stage for driving the second terminal of the amplifier and having a second high pass filter response; and an output match unit electrically connected to the second bias unit for matching the gain of the amplifier and having a second filter response.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: July 17, 2007
    Assignees: Integrated System Solution Corp., Sheng-Fuh Chang
    Inventors: Sheng Fuh Chang, Jia Liang Chen, Cherng Cherng Liu, Hung Cheng Chen, Shu Fen Tang, Albert Chen
  • Patent number: 7202734
    Abstract: A circuit and method for electronically tuning an RF power amplifier. The output filter includes at least one electronically variable reactance. The electronically tuned power amplifier may be tuned rapidly to a selected frequency, to a selected impedance, or to produce a selected output amplitude. An optional controller translates frequency, impedance, or modulation inputs into tuning signals. High-efficiency, wideband amplitude modulation is produced by varying the amplifier load impedance along preferred loci.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: April 10, 2007
    Inventor: Frederick Herbert Raab
  • Patent number: 7193477
    Abstract: The present invention discloses a gain amplifier, capable of concurrently operating at three different frequency bands. The gain amplifier comprises an amplification stage for amplifying a signal applied to an input of the amplifier and a triple-band resonance load connected between a DC bias voltage and a DC bias input of the amplification stage. The triple-band resonance load uses a set of reactive elements to provide match in a first frequency band, a second frequency band and in a third frequency band, such as at 2.4 GHz, 5.8 GHz and 9.0 GHz. According to the gain amplifier of the present invention, it can effectively provide triple-band signal amplification and in-band interference suppression for various multi-standard coexist communication systems.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: March 20, 2007
    Assignee: Integrated System Solution Corp.
    Inventors: Sheng-Fuh Chang, Wen-Lin Chen, Hung-Cheng Chen, Shu-Fen Tang, Albert Chen
  • Patent number: 7161434
    Abstract: An amplifier comprising a field effect transistor, a terminating network comprising inductors connected in series separated by capacitors connected in parallel, a filter and a load, wherein the values of the capacitors and inductors are arranged to present open circuits to a predetermined number of odd harmonics of a signal frequency being amplified, and to present short circuits to a predetermined number of even harmonics of the signal frequency, wherein the normalised values of the inductors and capacitors of the terminating network are selected using the following procedure: Let gr=Cr r odd=Lr r even then g1=1, g1g2=(a); grgr+1=(b), r=2?2m?1 and g2mg2m+1=(c) where (m?1) represents the predetermined number of odd harmonics which are presented with an open circuit 1 m ? ( 2 ? m - 1 ) ( a ) 4 ( 2 ? m - 1 + r ) ? ( 2 ? m - r ) ( b ) 1 m .
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: January 9, 2007
    Assignee: Filtronic PLC
    Inventor: John David Rhodes
  • Patent number: 7138872
    Abstract: The power amplifier device comprises one or more transistors (16) with an output electrode and on top of that a thin-film capacitor. The capacitor comprises a first conductive layer (18), that is also the output terminal of the transistor. It further comprises a first dielectric layer (20) and a second conductive layer (22), that is connected by at least one first connecting wire (30) to said first conductive layer (18). A second connecting wire (34) connects said second conductive layer (22) to an output terminal of the power amplification device (40). In this manner a parallel LC circuit is created, and it is designed such that said parallel LC circuit shows resonance at a harmonic of a frequency (2Fo, 3Fo, 4Fo, 5Fo and so on) amplified by said power amplifier.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: November 21, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Igor Ivanovich Blednov
  • Patent number: 7126308
    Abstract: In order to provide an interface circuit, a power converter using the same and an electric vehicle using the same, wherein this interface circuit ensures improved control reliability without employing a photo-coupler, an interface circuit 100A transfers control signals to the power transistor in a large-current circuit 300 from a small-signal circuit 200 for driving a power transistor. The interface circuit 100A has a noise absorber 120 that electrically absorbs a noise voltage produced between the ground of the small-signal circuit 200 and that of the power transistor. The noise absorber 120 transfers to the power transistor the control signals generated by the small-signal circuit 200, without being affected by the noise voltage if produced.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: October 24, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Satoru Shigeta, Yuuji Maeda, Junichi Sakano, Shinji Shirakawa
  • Patent number: 7102447
    Abstract: Disclosed are methods and circuit configurations for reference frequency signal distribution circuitry that suppress unwanted spurious components introduced by way of RF signal leakage. The methods and circuitry may include relocating components of a buffer along a reference frequency signal path, thereby suppressing conductive and inductive components associated with RF leakage paths entering the circuitry. A filter also may be used after the buffer to suppress spurious components resulting from subsampling of unwanted tones in a phase frequency detector or intermodulation between the reference signal and interference tones in the signal-path of the buffer.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: September 5, 2006
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Sven Mattisson, Hans Hagberg
  • Patent number: 7042294
    Abstract: A power amplifier comprising input means for receiving signals at a plurality of different frequencies; a power transistor for amplifying received signals; first circuitry connected at one end to said power transistor and at another end to a relatively low frequency shorting circuitry, said first circuitry being such that said another end is an open circuit to said different frequencies, said first circuitry having a length which is substantially less than a quarter wavelength of said different frequencies.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: May 9, 2006
    Assignee: Nokia Corporation
    Inventor: Martin Goss
  • Patent number: 7038547
    Abstract: An amplifier circuit has an amplifier, a D.C. bias circuit, and an output signal path. The amplifier amplifies a modulated signal that has a carrier frequency. The D.C. bias circuit has a decoupling capacitor that is coupled to a transmission line having a length equal to N times the wavelength of the carrier frequency divided by four, where N is an odd integer. A low frequency decoupling capacitor is located between the decoupling capacitor and the output of the amplifier to reduce intermodulation distortion products. In one embodiment, the low frequency decoupling capacitor is a tantalum capacitor.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: May 2, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Samay P. Kapoor, Antoine J. Rabany
  • Patent number: 7034620
    Abstract: An RF power amplifier having reduced memory effects is disclosed. This is achieved by a novel design of the DC supply feed network to achieve low impedance across video frequencies, whilst maintaining the correct RF output matching. One or more transmission zeros are provided in the bias circuit transfer function, which are positioned in the video bandwidth so as to provide low and relatively constant impedance across the video bandwidth. Also, a parallel DC feed line may be employed to reduce impedance across the video bandwidth. The reduction in memory effects allows improved performance of predistortion linearization techniques and an implementation in a feed forward amplifier employing predistortion linearization is also disclosed.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: April 25, 2006
    Assignee: Powerwave Technologies, Inc.
    Inventors: Ahmad Khanifar, Nikolai Maslennikov, Gareth Spiller
  • Patent number: 7019594
    Abstract: A method and an apparatus for analyzing performance of a multi-stage radio frequency amplifier are described. The method simplifies the multi-stage radio frequency amplifier into equivalent input parts, output parts and mid-stage parts. The mid-stage parts are temporarily unset. Therefore, the equivalent input parts and output parts will be adjusted to make best gain performance and the mid-stage parts will be the next targets for analysis. Repeating the above-mentioned methods for decomposing the circuit can systemize the method for analyzing circuits and problems in each part of the circuit may be found more quickly.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: March 28, 2006
    Assignee: Richwave Technology Corp.
    Inventor: Chun Hsueh Chu
  • Patent number: 6992545
    Abstract: A GPS-cellular hand-set includes a receive antenna; a separate transmit antenna; a power amplifier; a duplex filter unit having an input connected to the receive antenna, a cellular output, and a GPS output; a cellular unit having a receive input and a transmit output, wherein the receive input is connected to the cellular output of the duplex filter unit and the transmit output is connected to the transmit antenna via the power amplifer; and a GPS unit having an input connected to the GPS output of the duplex filter unit.
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: January 31, 2006
    Assignee: U-BLOX AG
    Inventors: Solon Spiegel, Imre Kovacs
  • Patent number: 6982603
    Abstract: A radio-frequency power amplification circuit includes a transistor and a stablization circuit that is provided upstream of the transistor. The stabilization circuit includes a series resistor, a first end of which is connected to the transistor and a second end of which is connected to an input terminal, a resistance element, a first end of which is connected to the second end of the series resistor, and a short stub, a first end of which is connected to the second end of the resistance element and the second end of which is grounded via a capacitance element.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: January 3, 2006
    Assignee: Renesas Technology Corp.
    Inventor: Shin Chaki
  • Patent number: 6954106
    Abstract: An FET band amplifier for providing a high gain. An FET band amplifier 5 included in an AM receiver comprises amplifiers 11 to 15 e.g. at five stages and a BPF 16 inserted halfway in their connection. Each of the amplifiers 11 to 15 acts as a differential amplifier comprising a p-channel FET as an amplification element. The BPF 16 allows the passage of a component of a band wider than the amplification band of the whole of the FET band amplifier and reduces a 1/f noise by removing the low-band component of a signal amplified by the amplifiers 11 to 13 at three stages and thermal noise by removing the high-band component. Thus, each of the amplifiers 14, 15 connected to the rear stage of the BPF 16 is not saturated by a noise component.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: October 11, 2005
    Assignee: Niigata Semitsu Co., Ltd.
    Inventor: Hiroshi Miyagi
  • Patent number: 6933780
    Abstract: A predistortion circuit has an input terminal for inputting a predetermined signal; a nonlinear device directly or indirectly connected to the input terminal; a bias supply circuit for applying a voltage to the nonlinear device; specific-frequency suppressing means connected to one side or both sides of the nonlinear device directly without another intervening device and of suppressing all or part of such frequencies that are from a frequency corresponding to DC to a frequency corresponding to an occupied band width of an input signal inputted to the input terminal and/or suppressing at least one higher harmonic frequency of a carrier wave of the input signal; and an output terminal for outputting a signal.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: August 23, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiji Fujiwara, Toru Matsuura, Kaoru Ishida, Makoto Sakakura
  • Patent number: 6924715
    Abstract: Acoustic resonators such as surface acoustic wave (SAW) devices and thin film bulk acoustic resonators (FBAR) can be configured to produce a band reject filter. Such a filter overcomes the insertion loss and power handling limitations of conventional band pass configurations and as such can be used in power amplifier and duplexer applications.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: August 2, 2005
    Assignee: Nortel Networks Limited
    Inventors: Steve Beaudin, Chun-Yun Jian, Somsack Sychaleun, Yuxing Zhang
  • Patent number: 6922108
    Abstract: An active balun circuit is provided for single-ended to differential RF signal conversion with enhanced common-mode rejection which suppresses common mode signal and which achieves phase and amplitude balance without sophisticated tuning or compensation methods. The circuit has a single-ended input and balanced output with phase and amplitude balance error less than 2° and 1.2 dB, respectively, measured from 1.5 GHz to 1.8 GHz at 5V supply. When supply voltage drops down to 1.5V, its phase and amplitude balance error remains within 5° and 2 dB, respectively. The circuit achieves a balanced output via an output network which behaves as an impedance matching network for differential mode signal and is grounded for common mode signal. As a result, common mode signal is suppressed and 180-degree phase balance at output is achieved. The circuit has high-linearity (P1 dBin=5 dBm, IIP3=16.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: July 26, 2005
    Assignee: Lucent Technologies Inc.
    Inventor: Jenshan Lin
  • Patent number: 6920312
    Abstract: An RF generating system operates with high efficiency to supply RF output power to a plasma load. The RF generating system is capable of modulating the RF output power at frequencies up to the frequency of the RF output power while maintaining high efficiency operation. Broadband frequency modulation of the RF output power suppresses instabilities thereby minimizing unstable behavior of the plasma load.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: July 19, 2005
    Assignee: Lam Research Corporation
    Inventor: Neil Benjamin
  • Patent number: 6906593
    Abstract: A technique for minimizing the effect of parasitic capacitance in a resistive gain amplifier. Instead of the resistors being formed directly over the substrate, or over an oxide of the substrate, a semiconductor element (e.g., an n-well) is used between the resistor and the substrate. For resistors in the input circuit, this semiconductor element is connected to the voltage input rather than ground. For the resistors in the feedback loop circuit, the semiconductor element is connected to the voltage output of the operational amplifier. The insertion of this semiconductor element provides the ability to programmably connect the parasitic capacitance to somewhere other than ground. By connecting the parasitic capacitance to the voltage input or voltage output, the ground connection is eliminated, eliminating the pole introduced by the parasitic capacitance.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: June 14, 2005
    Assignee: Exar Corporation
    Inventors: Bahram Fotouhi, Roubik Gregorian
  • Patent number: 6903612
    Abstract: A tunable low noise amplifier matching circuit is provided. The matching circuit includes a ferroelectric tunable component. A control signal is applied to the tunable component, changing the component's impedance. This changes the impedance or the noise figure response, or both, of the matching circuit.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: June 7, 2005
    Assignee: Kyocera Wireless Corp.
    Inventors: Stanley S. Toncich, Tim Forrester
  • Patent number: 6895225
    Abstract: The invention relates to a system for matching an antenna (ANT) for a wireless communication device, the system comprising: detecting means (4, 5, 12) to detect the matching of the antenna (ANT) and to generate a matching signal on the basis of the detected matching, control means (7) to examine said matching signal, to determine the need for matching, and to generate a control signal on the basis of said matching signal, and antenna matching means (9) to adjust the matching of the antenna (ANT) on the basis of said control signal. The invention relates also to a wireless communication device and a method for matching the antenna of a wireless communication device.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: May 17, 2005
    Assignee: Nokia Mobile Phones, Ltd.
    Inventors: Olli Talvitie, Saku Lahti, Petri Kotilainen
  • Patent number: 6882222
    Abstract: Low pass filters at the output stage of a D-class amplifier, in which a high channel separation between adjacent signal amplifying channels, a small size, implementation at a high density can be attained. Induced electromotive forces by a leakage magnetic flux from the adjacent channels are set off by a plurality of pairs of inductors in one low pass filter. The low pass filter of each channel is formed by the same construction and the same circuit. The inductors are arranged in a manner that center axes of coils of the two corresponding pairs of inductors in the adjacent channels are located at vertexes of a rectangular parallelogram, and combinations of the winding directions of the coils of the corresponding inductors of the adjacent channels are set to the same direction and the opposite directions every other inductor.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: April 19, 2005
    Assignee: Pioneer Corporation
    Inventors: Jun Honda, Tsutomu Kawamoto
  • Patent number: 6859104
    Abstract: A power amplifier matching circuit is provided. The matching circuit includes a ferro-electric tunable component. A control signal is applied to the tunable component, changing the component's impedance. This changes the impedance of the matching circuit.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: February 22, 2005
    Assignee: Kyocera Wireless Corp.
    Inventors: Stanley S. Toncich, Tim Forrester
  • Patent number: 6847258
    Abstract: It is difficult that the impedance of the circuit part on the output side of an amplifying element at the frequency of a modulating wave is lower, and consequently, it is difficult to more effectively use the linearity of the amplifying element. The phase of a signal of the frequency of the modulating wave included in an amplified signal output from a FET is inverted by a difference frequency inverting circuit. The inverted signal of the frequency of the modulating wave and a signal of the frequency of a modulated wave included in an amplified signal output from a FET cancel each other out at the drain of the FET. At the drain end of the FET, the signal of the frequency of the modulating wave included in the amplified signal of the FET and a signal of the frequency of the modulating wave output from the FET cancel each other out.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: January 25, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaoru Ishida, Toshimitsu Matsuyoshi, Masayuki Miyaji
  • Patent number: 6831520
    Abstract: An amplifier circuit apparatus for driving a laser device, the apparatus comprising a multistage amplifier including an output stage, wherein at least one device for band limiting a signal is coupled to the multistage amplifier prior to the output stage.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: December 14, 2004
    Assignee: Agilent Technologies, Inc.
    Inventor: David Martin Gee
  • Patent number: 6812794
    Abstract: An inter-stage matching circuit 26 comprises a one-stage high pass filter type matching unit 28 and a one-stage low pass filter type matching unit 29 serially connected with each other.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: November 2, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazutomi Mori, Shintarou Shinjo, Fumimasa Kitabayashi, Yukio Ikeda
  • Patent number: 6806767
    Abstract: A power amplifier circuit includes a power amplifier responsive to a power mode signal, the power amplifier having a power amplifier output node, and a power amplifier load circuit also responsive to the power mode signal, the power amplifier load circuit having a load circuit input node connected to the power amplifier output node. The power amplifier load circuit has a first transmission line coupled between the load circuit input node and a first node, a harmonic filter coupled between the load circuit input node and a common node, a first capacitor coupled between the first node and the common node, and a first switch coupled between the common node and ground, where the first switch is responsive to the power mode signal.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: October 19, 2004
    Assignee: Anadigics, Inc.
    Inventor: Gee Samuel Dow