Abstract: A semiconductor integrated circuit is provided comprising a first amplifier circuit which receives a first potential and then supplies a current to an output terminal; a second amplifier circuit which receives a second potential and then absorbs a current from the output terminal; and a control circuit which controls the second amplifier circuit so as to allow the second amplifier circuit to be activated subsequently to a predetermined period of time that elapses after the first amplifier circuit is activated.

Abstract: A DC offset canceling circuit. The DC offset canceling circuit applied in a variable gain amplifier includes chopper circuits, a transconductance amplifier, and at least one internal capacitor. The transconductance amplifier and at least one capacitor function as a filter for canceling DC offset of the variable gain amplifier. A first chopper circuit is inserted between the output of the variable gain amplifier and the input of the transconductance amplifier. A second chopper circuit is inserted between the output of the transconductance amplifier and the capacitor. The DC offset and low frequency noise of the transconductance amplifier, the undesired signal, is translated up to a chopping frequency by chopper circuits. The chopping frequency is much higher than the desired signal bandwidth, and the amount of the undesired signal in the passband of the signal is thereby greatly reduced.

Abstract: The present invention provides for a method (30) and system (10) for isolating the input nodes (3, 4) and/or the output nodes (5, 8) of an analog device (12) and performing continuity testing thereof without using relays. The system includes an analog device having a pair of input and output terminals and a plurality of resistors (R1-R3 and R4-R6) arranged in parallel and connected thereto. The method for testing continuity of the analog device includes providing a voltage input via at least one of the resistors to either input node, and then measuring the voltage at the same node via a resistor. If a diode drop from ground is sensed there is continuity, and if the applied voltage is sensed at the node there is not continuity. As a result, the invention advantageously isolates the nodes and removes any unwanted capacitance and impedance loading thereon during testing thereof.

Abstract: An amplifier which is suitable for use as a radio frequency low noise amplifier comprises first, second and third transconductance stages. The amplifier input is connected to the inputs of the first and third stages, whose outputs are connected together in anti-phase so as to provide feedforward error correction. The second stage has inputs connected to the outputs of the first stage and outputs connected across a resistor to current feedback inputs of the first stage so as to provide negative feedback. The first and third stages provide feedforward distortion cancelling so as to improve the linearity of the amplifier. The negative feedback provided by the second stage further improves the linearity without substantially increasing the noise figure of the amplifier.

Abstract: Differential input fail safe circuitry is disclosed that detects missing or too low differential signals combined with a frequency lower than a frequency limit where a final safe condition is detected and signaled. The output signal form the fail safe circuitry is held in a given state that is an invalid representation of the differential input signal. A frequency detector, complementary offsetting auxiliary amplifiers with limit frequency roll offs are used to detect the fail safe condition. In addition a delay circuit is used that requires the fail safe condition to exist for some time before the fail safe circuit is active. Initialization circuitry ensures a proper power up conditions where the circuitry is enabled to detect the fail safe conditions and guarantees a reliable failsafing irrespective of the prvious state of the signal.

Abstract: To provide a mute circuit capable of reducing or eliminating noises generated in accordance with an offset voltage under a mute operation. The present invention comprises a summing amplifier, switch, and mute signal generating circuit.

Abstract: The invention provides a power amplifier system including a plurality of amplifiers, a plurality of primary transformer windings, a single secondary transformer winding. Each of the plurality of amplifiers includes a differential input that is commonly coupled to a system input port, and each the plurality of amplifiers also includes a differential output. Each of the plurality of primary transformer windings is coupled to the differential output of one of the plurality of amplifiers. The single secondary transformer winding is inductively coupled to all of the primary transformer windings and provides a system output port to which a load may be coupled.

Abstract: A Miller de-compensation technique and circuit is provided for a differential input, differential output (DIDO) amplifier that facilitates increased differential mode bandwidth while maintaining common-mode and differential mode stability. An exemplary differential input, differential output (DIDO) amplifier comprises a pair of op amps having a compensation capacitance circuit. The compensation capacitance circuit is configured to distinguish between differential mode signals and common mode signals, and to reduce the effects of compensation capacitance during differential mode operation, but allow the effects of compensation capacitance to remain present during common mode operation. As a result, the amount of compensation capacitance can be configured such that common mode stability can be maintained without reducing differential mode bandwidth. The DIDO amplifier can be configured as a programmable gain amplifier or a fixed gain amplifier.

Abstract: A circuit in accordance with the invention comprises a differential amplifier; and a direct current (DC) source coupled with the differential amplifier. The DC source generates a direct current that is communicated in substantially predetermined portions to multiple inverting input terminals of the differential amplifier. The direct current is applied so as to shift a common-mode voltage of electrical signals that are processed by the differential amplifier. The shift in the common-mode voltage is proportional to the direct current generated by the DC source.

Abstract: An apparatus and method for adding input voltage signals. First and second input voltage signals are respectively sampled onto first and second capacitors during a first clock phase. In response to a second clock phase, the first sampled input voltage that is held on the first capacitor is coupled to the negative input terminal of an amplifier, and the second sampled voltage held on the second capacitor is coupled to the positive terminal of the amplifier. A feedback voltage is provided from the amplifier output to the negative amplifier input via the first capacitor during the second clock phase. The first and second input voltage signals are added at the amplifier during the second clock phase to output the sum in response to the sampled input voltage signals and the output feedback, whereby the resulting transfer function is independent of capacitor mismatch and non-linearity.

Abstract: A system for measuring a free space electric field includes an ultrahigh impedance antenna positioned in the electric field to generate a signal from the electric field. An amplifier having an input port is provided to amplify the signal. The amplifier generates an input bias current which combines with the signal to create an input potential at the input port. An electrical circuit connects the input port to a ground connection and includes at least one circuit element for controlling the input potential to stabilize the signal at the input port.

Abstract: A transimpedance amplifier system includes a first gain stage to receive an input signal. A second gain stage is coupled to the first gain stage to provide a first output. A first passive feedback element is coupled in parallel with the second gain stage. A general feedback element is coupled in parallel with the first gain stage and the second gain stage. A replica biasing stage is included to provide a second output. A replica feedback element is coupled in parallel with the replica biasing stage.

Abstract: The signal amplifier of this invention includes a noise amplifier that amplifies a difference between a first ground potential and a second ground potential, and an adding amplifier that superposes an analog input signal on an output potential of the noise amplifier, and amplifies a difference between the first ground potential and a potential having the analog input signal and the output potential superposed. Thus, the adding amplifier superposes the noises amplified by the noise amplifier on the analog input signal, and thereafter amplifies the difference between the first ground potential and the potential thus superposed. Thereby, the signal amplifier is able to amplify only the analog input signal, without amplifying the noises of the first ground potential or the second ground potential.

Abstract: Differential charge amplifier for processing charge signals from a rotation rate sensor, with a test signal being applied to the differential charge amplifier so that during normal operation the output of the amplifier corresponds to the test signal as well as to the charge signals.

Abstract: An amplifier circuit is disclosed which receives signals that cause the amplifier to be configured in an asymmetrical mode or symmetrical mode, so that performance may be optimized in each mode.

Abstract: An operational amplifier arrangement is disclosed which comprises a non-linear amplifier and a linear amplifier, both having a pair of input terminals one of which is coupled to an arrangement input terminal, and both having an output terminal which is coupled to an arrangement output terminal, whereby the output terminal of said non-linear amplifier is further coupled to the output terminal of said linear amplifier via a series impedance, whereby the output terminal of said linear amplifier is coupled to the arrangement output terminal via a terminating impedance, and whereby the arrangement further includes an active back termination arrangement coupled between the arrangement output terminal and either one of said pair of input terminals of said linear amplifier. In a preferred embodiment said linear amplifier is operating between a power supply which exceeds the supply voltage of the power supply of said non-linear amplifier. Differential embodiments of this basic configuration are also described.

Abstract: The invention relates to an operational amplifier comprising a first transistor amplifier stage at an input of the operational amplifier, which first transistor amplifier stage comprises chopped transistors, a second transistor amplifier stage cascoded to the first transistor amplifier stage, which second transistor amplifier stage is connected between the chopped first transistor amplifier stage and a supply voltage source, wherein the gain at the output of the chopped first transistor amplifier stage is reduced to gm1,2/gm3,4, where gm1,2*Rc is the gain of the first transistor amplifier stage, gm3,42*Rc is the gain of the second transistor amplifier stage and Rc is the resistance of the resistor between an output of the operational amplifier and the supply voltage source.

Abstract: A signal processing circuit for a differential voltage as the signal to be processed, especially for use in a magnetoinductive flowmeter, incorporating a preamplifier and, connected to the output of the preamplifier, an A/D converter. By employing as the preamplifier a differentially operating preamplifier, the circuit obtains in relatively simple as well as cost-effective fashion at the same time a high level of common-mode signal rejection and a substantial suppression of the low-frequency components in the differential signal occurring below the measuring frequency.

Abstract: An electronic circuit stabilizes an ultrahigh input impedance amplifier by altering the amplifier's input potential. This input potential includes both the desired input signal and the amplifier's input bias current. With an amplifier having an input port and a guard, both the input port and the guard will have the same input potential. Accordingly, the stabilizing circuit of the present invention provides the input potential at the guard to an electronic device which separates the input signal from the input bias current. This creates a corrective signal. The corrective signal is then used through a feedback path to alter the input potential so that the desired input signal can be fed into the amplifier without adverse consequences from the input bias current.

Abstract: An amplifier includes an amplification path and multiple offset-compensation feedback paths. The amplification path has multiple amplifier stages, and the feedback paths are coupled to the amplification path. By including multiple feedback paths, such an amplifier can maintain its output DC-offset voltage at a desired level over a full range of amplitudes, i.e., power, of the input signal.

Abstract: A method for reducing delay variability in a differential receiver includes receiving a plurality of differential input signals, determining a first transition delay time of an output in response to the plurality of differential input signals, determining a second transition delay time of the output in response to the plurality of differential input signals, and modifying capacitance coupled to the output in response to the first transition delay time and to the second transition delay time.

Abstract: The present invention is directed towards a single stage switched capacitor programmable gain amplifier. The operation of the amplifier is described by a transfer function having two gain factors: (C1/C2) and (C2/C3). The transfer function is equal to the product of the two gain factors: (C1/C2)×(C2/C3) such that the transfer function is equal to (C1/C3). The combination of the two different gain factors provides a wider range and finer step programmability of the amplifier. The amplifier does not have an idle phase, which reduces power dissipation. Additionally, the amplifier requires less switching which results in reducing the thermal noise and the switching noise produced by the amplifier.

Abstract: An operational amplifier circuit with improved feedback factor is provided that includes an input impedance, an operational amplifier, and a current conveyor. The input impedance is operable to receive an input signal. The operational amplifier comprises an inverting input node, a non-inverting input node, and an output node. The operational amplifier is operable to generate an output signal at the output node based on the input signal. The current conveyor is coupled between the input impedance and the inverting input node of the operational amplifier. The current conveyor is operable to provide a low impedance to the input impedance and a high impedance to the operational amplifier.

Abstract: A nulling amplifier (52A) for an auto-zeroed amplifier includes a first differential stage including first (3) and second (16) input transistors and a second differential stage including first (18) and second (19) nulling transistors coupled to drains of the second and first input transistors and to a folded cascode circuit (48) coupled to an output stage (59). A gain boost circuit increases the output impedance of the nulling amplifier. The gm ratios of the first and second input transistors and the first and second nulling transistors have values which establish a predetermined low input-referred noise level in the nulling amplifier, and the gain boost circuit maintains a low offset voltage.

Abstract: A method for reducing offset voltage in an operational amplifier without the need for switched-capacitors, includes introducing a tapped resistor chain between the common connected terminals of the transistors of the input differential pair of the operational amplifier and connecting the tail current source/sink of the differential amplifier to a selected tap of the resistor chain. The invention further provides an improved operational amplifier in accordance with the above method.

Abstract: A transimpedance amplifier system includes a first gain stage to receive an input signal. A second gain stage is coupled to the first gain stage to provide a first output. A first passive feedback element is coupled in parallel with the second gain stage. A general feedback element is coupled in parallel with the first gain stage and the second gain stage. A replica biasing stage is included to provide a second output. A replica feedback element is coupled in parallel with the replica biasing stage.

Abstract: A circuit configuration for detecting a functional disturbance has a first and a second differential amplifier. The outputs of the differential amplifiers are connected to the inputs of a gate. One input of the differential amplifiers is in each case connected to a reference potential terminal. The respective other input of the first and second differential amplifiers is connected to a monitoring means, which responds in the event of a change in the supply voltage at a supply potential terminal of the circuit configuration.

Abstract: A DC offset compensation circuit, and method thereof are capable of reducing the settling time of an output signal through fast compensation of a DC offset of the output signal although a DC voltage of an input signal varies in a closed loop operational amplifier. The DC offset compensation circuit of a closed loop operational amplifier includes a first closed loop operational amplifier and a second closed loop operational amplifier. The first closed loop operational amplifier amplifies an input signal based on a compensation voltage. The second closed loop operational amplifier amplifies a signal output from the first closed loop operational amplifier based on a reference voltage to generate a final output signal.

Abstract: An improved circuit and technique are provided that facilitate residual offset correction during chopper stabilization of an amplifier circuit. A chopper stabilized amplifier can be configured with an additional gain stage configured between input and following stages of the amplifier. Instead of a second switching block being configured on the output of the input stage, the second switching block is coupled to the output of the additional gain stage. As a result, the offset voltage of the additional gain stage appears across the output of the input stage in the same polarity during chopper stabilization. Thus, the offset voltage that appears across the output of the input stage remains constant at the end of each of the chopping phases. Accordingly, any residual offset voltage, for example that due to changes in voltage across parasitic capacitances on the output of the input stage, can be eliminated.

Abstract: In a reference voltage generating circuit, in a first period, only a first switch is OFF and a maximum peak value Vmax of an input signal In is held at a node A of a first capacitor 1. Next, in a second period, a second and a third switches are opened, and a voltage difference between the maximum peak value Vmax and a minimum peak value Vmin is held at a node C of a capacitor string. At this time, the voltage held in a second capacitor of the capacitor string is added to the voltage held in the first capacitor, and the voltage at a node B is output as a reference voltage Vref. The input signal In is applied to one input terminal of a differential amplifying circuit, and the reference voltage Vref is applied to the other input terminal. When the voltages held at the nodes A and C have stabilized, the reference voltage Vref is generated.

Abstract: A programmable gain amplifier using metal-oxide-semiconductor (MOS) devices to approximate exponential gain characteristic with linear control signals is disclosed. According to one embodiment, the programmable gain amplifier (300a-300b) may include a capacitive switching circuit (304a-304b), a capacitive switching circuit (306a-306b), and an operational amplifier (302a-302b). Capacitive switching circuits (304a-304b and 306a-306b) may receive an analog input voltage through sample switches (308a-308b and 310a-310b). Capacitive switching circuit (304a-304b) receives an output from operational amplifier (302a-302b) through feedback switch (312a-312b). The programmable gain amplifier (300a-300b) may include a few additional unit capacitors which can allow larger gain ranges or more steps for a given range without a large increase in chip size.

Abstract: An amplifier which is suitable for use as a radio frequency low noise amplifier comprises first, second and third transconductance stages. The amplifier input is connected to the inputs of the first and third stages, whose outputs are connected together in anti-phase so as to provide feedforward error correction. The second stage has inputs connected to the outputs of the first stage and outputs connected across a resistor to current feedback inputs of the first stage so as to provide negative feedback. The first and third stages provide feedforward distortion cancelling so as to improve the linearity of the amplifier. The negative feedback provided by the second stage further improves the linearity without substantially increasing the noise figure of the amplifier.

Abstract: An amplification circuit for electric charge type sensor has a simple circuit configuration in which a common mode noise is adequately cancelled. In the acceleration sensor amplification circuit, the inversion input terminal of an operational amplifier is connected to one end of the acceleration sensor (G sensor). In addition, a feedback circuit including a feedback resistor and a feedback capacitor connected in parallel to each other is connected between the inversion input terminal and the output terminal of the operational amplifier. Furthermore, a cancellation circuit including a cancel resistor and a cancel capacitor connected in parallel to each other is connected between the non-inversion input terminal of the operational amplifier and a reference voltage.

Abstract: The invention relates to an amplifier circuit having a circuit input for a circuit input signal (Vin) to be amplified and an amplification zone for amplifying the circuit input signal (Vin). The invention provides that the amplification zone comprises two amplifiers (OPV1, OPV2), each of which is countercoupled, and which the circuit input signal (Vin) is fed in parallel, and the amplifier outputs of which are or can be connected with a circuit output to provide a circuit output signal (Vout), wherein the amplification input zone of one of the two amplifiers (OPV1) is connected with the amplification input zone of the other of the two amplifiers (OPV2) by means of a further amplifier (A), in such manner that signal distortions at the two amplifier outputs (Vout1, Vout2) essentially cancel each other out. The amplifier circuit according to the invention thus provides for particularly power-efficient amplification of the signal.

Abstract: A Miller de-compensation technique and circuit is provided for a differential input, differential output (DIDO) amplifier that facilitates increased differential mode bandwidth while maintaining common-mode and differential mode stability. An exemplary differential input, differential output (DIDO) amplifier comprises a pair of op amps having a compensation capacitance circuit. The compensation capacitance circuit is configured to distinguish between differential mode signals and common mode signals, and to reduce the effects of compensation capacitance during differential mode operation, but allow the effects of compensation capacitance to remain present during common mode operation. As a result, the amount of compensation capacitance can be configured such that common mode stability can be maintained without reducing differential mode bandwidth. The DIDO amplifier can be configured as a programmable gain amplifier or a fixed gain amplifier.

Abstract: A cross-differential amplifier is provided. The cross-differential amplifier includes an inductor connected to a direct current power source at a first terminal. A first and second switch, such as transistors, are connected to the inductor at a second terminal. A first and second amplifier are connected at their supply terminals to the first and second switch. The first and second switches are operated to commutate the inductor between the amplifiers so as to provide an amplified signal while limiting the ripple voltage on the inductor and thus limiting the maximum voltage imposed across the amplifiers and switches.

Abstract: A differential difference amplifier is provided for amplifying an input signal having a magnitude close to zero (or a negative supply voltage) and adding an offset voltage to the amplified input signal.

Abstract: A noise shaped differential amplifier having a reduced common mode signal in accordance with an embodiment of the invention is described. In the described embodiment, the noise shaped differential amplifier includes a noise shaper having a common mode signal controlled by an attenuation operational amplifier that is coupled to a voltage divider circuit and a sense resistor divider. In this arrangement, the attenuation operational amplifier controls a virtual ground applied to the sense resistor divider.

Abstract: Differential line driver circuit for driving a line signal output via a signal line.

Abstract: An input buffer amplifier has a symmetrical centroidal layout. The input buffer amplifier includes two half differential amplifiers that have substantially identical layouts. Each half amplifier receives the input signal in-parallel, and the outputs of the differential half amplifiers are wire-ored together. The input buffer amplifier is symmetrical about both horizontal and vertical lines of symmetry. Furthermore, FET devices forming the half amplifiers are interlaced to create the horizontal line of symmetry. The overall horizontal and vertical symmetry of the input buffer amplifier improves the device matching between differential signal paths. In other words, the devices in the half amplifiers that process the positive and negative components of the differential signal are more closely matched. This reduces differential offsets and common mode offsets that can occur when devices are not matched properly.

Abstract: An operational amplifier arrangement (OA) including an operational amplifier (A) and an input offset control circuit (IOCS) is characterized in that said operational amplifier arrangement further includes a current sensing and comparison device (CSCD) adapted to measure and to compare respective output currents on series output branches of an output stage (OS) of said operational amplifier, said current sensing and comparison device (CSCD) being coupled between said output stage (OS) of said operational amplifier and said input offset control circuit (IOCS).

Abstract: A circuit for widening the stereobase in the reproduction of stereophonic sound signals contains one amplifier (10, 34) each for the stereo signals assigned to the right-hand and left-hand channel. Each amplifier (10, 34) comprises a non-inverting input (16, 36) for the corresponding stereo signal and an inverting input (18, 42) for an output signal fed back via a first resistor (R1, R5) from the amplifier output (20, 40). An ON/OFF connection is provided between the inverting inputs (18, 42) of both amplifiers (10, 34). The connection between the inverting inputs (18, 42) of the two amplifiers (10, 34) is formed by two amplifiers (48, 50) circuited in antiparallel as voltage followers and a second resistor (R8, R9) connected in series with the output of each amplifier (48, 50).

Abstract: A transimpedance amplifier system includes a first gain stage to receive an input signal. A second gain stage is coupled to the first gain stage to provide a first output. A first passive feedback element is coupled in parallel with the second gain stage. A general feedback element is coupled in parallel with the first gain stage and the second gain stage. A replica biasing stage is included to provide a second output. A replica feedback element is coupled in parallel with the replica biasing stage.

Abstract: A technique is disclosed which facilitates the layout of op amp cells, for example, two-stage op amp cells or three-stage op amp cells, to provide larger operational amplifiers. In accordance with one aspect, the op amp cells can be suitably coupled in parallel to provide a larger operational amplifier. This paralleling aspect can be facilitated by connecting the respective negative and positive inputs of a predetermined number of input gm stages together, connecting the outputs of a predetermined number of output gm stages together, and connecting a predetermined number of intermediate internal nodes between the input gm stages and the output gm stages together, without the occurrence of saturation of the internal nodes. In addition, the input and output characteristics of operational amplifier can be suitably improved.

Abstract: A powered transducer preamplifier includes a preamplifier circuit that DC couples the preamplifier input with the preamplifier output. A biasing circuit is coupled to the preamplifier input to apply a bias voltage to power the transducer, and a DC level shifting circuit is DC coupled to the signal path of the preamplifier circuit between the input and the output to compensate for this bias voltage. The DC level shifting circuit avoids the use of reactive components, and thereby reduces phase distortion. A variety of DC level shifting circuits can be used, including a bridge circuit having four matched resistors and an inverter DC coupled between the nodes of the bridge.

Abstract: According to one aspect of the invention, an apparatus is provided which includes a first amplifier and a common mode feedback circuit. The first amplifier includes a first input, a second input, a first output, and a second output. The first input and the second input are coupled to receive a first input voltage and a second input voltage, respectively. The first and second outputs provide a first output voltage and a second output voltage, respectively. The common mode feedback circuit has first and second switched capacitors coupled to provide a common mode feedback signal based on the first and second output voltages to the first and second inputs of first amplifier.

Abstract: Methods and apparatus are described for generating or amplifying a differential signal. The output of a first op amp corresponds to one end of the differential signal. The output of a second op amp corresponds to the other end of the differential signal. The inverting input of the first op amp is coupled to the noninverting input of the second op amp.

Abstract: A line driver combining active impedance and filter in one stage for connection to a transmission line having a characteristic impedance. The line driver comprises an amplifier, a transformer with a primary to secondary winding ratio of 1:n, a reference impedance, an input impedance and two feedback impedances. The primary winding of the transformer has a first end connected to the output of the amplifier and the secondary winding is connectable to the transmission line. The reference resistor has an end connected to the second end of the first winding at a junction node and the feedback circuit is connected to the input and output of the amplifier and also to the junction node. The reference impedance has a value equal to n 2 K times the characteristic impedance of the transmission line.

Abstract: In a dual bridge amplifier (1) for processing two input signals (Iin1; Iin2) and providing two amplified output signals (VL1; VL2) into two separate loads, comprising two signal amplifiers (10; 20) and one common buffer amplifier (30), the channel separation is improved by utilizing a feedback coupling over the load.

Abstract: A circuit configuration for detecting a functional disturbance has a first and a second differential amplifier. The outputs of the differential amplifiers are connected to the inputs of a gate. One input of the differential amplifiers is in each case connected to a reference potential terminal. The respective other input of the first and second differential amplifiers is connected to a monitoring means, which responds in the event of a change in the supply voltage at a supply potential terminal of the circuit configuration.