Abstract: Disclosed herein is an oscillator circuit generating an oscillation signal in response to a resonant element in a first mode and to an external clock signal in a second mode. This oscillator circuit comprises a tri-state inverter circuit and a transfer circuit between the input and output nodes of the tri-state inverter circuit, and the output node of the tri-state inverter circuit is brought into a high impedance condition when an external clock signal is used and into an active state when the resonant element is employed.

Abstract: A programmable crystal oscillator that generates a wide range of possible frequencies with high stability is disclosed. The programmable crystal clock oscillator includes an industry standard oscillator package, a programmable storage, a crystal and a phase lock loop (PLL) circuit coupled to the crystal and the programmable storage. The industry standard package does not contain any dedicated programming connections. A programmable storage, contained within the package, stores parameters representing a desired output frequency for the crystal oscillator. The crystal is enclosed within the package and provides a source frequency. The PLL circuit, also enclosed in the package, receives the source frequency, and produces the desired output frequency, within the wide range of possible frequencies, based on the parameters.

Abstract: An integrated circuit has a self-contained voltage control oscillation circuit wherein the oscillating frequency is controlled according to a control voltage; The circuit includes a first oscillation circuit which forms a first oscillation loop including a first amplifier for generating a first output signal with an oscillating frequency which is controlled according to an operating current of the first amplifier and a second oscillation circuit which forms a second oscillation loop including a second amplifer for generating a second output signal with an oscillating frequency which is controlled according to an operating current of the second amplifer; A circuit for generating a control voltage controls the operating currents of the first and second amplifers and a current regulating circuit for generating an operating current regulating signal regulates the operating currents of the first and second amplifers.

Abstract: An oscillation circuit includes inversion circuits and delay circuits wherein at least one of the inversion circuits includes multiple inverters connected in series to one another and wherein the driving capability of a first stage inverter inserted immediately after the delay circuit at the input of the oscillation circuit is lower than that of a final stage inverter inserted immediately before the delay circuit at the output of the oscillation circuit.

Abstract: A composite semiconductor capacitor element, applicable to various kinds of circuits to reduce the influence of parasitic capacitance therein, includes two semiconductor capacitor elements connected in parallel by connecting terminals which have parasitic capacitances to terminals which do not have parasitic capacitances. Alternatively, two such semiconductor capacitor elements are connected in series by connecting terminals which have parasitic capacitances to each other. Hence, parasitic capacitances at the respective terminals are equal to each other. In addition, as compared with a conventional structure wherein a greater number of parasitic capacitances are connected to one terminal than to the other terminal, the parasitic capacitances are smaller at each terminal side.

Abstract: A voltage control oscillation circuit comprises an oscillation loop and a control current generating circuit. The oscillation loop comprises: a first charge-discharge circuit including a first transistor circuit for converting a reverse voltage signal as a first input voltage into a first charge-discharge current according to a first conversion ratio, and a first capacitor which is charged and discharged by the first charge-discharge current for generating a first charge-discharge voltage signal; a second charge-discharge circuit including a second transistor circuit for converting the first charge-discharge voltage signal as a second input voltage into a second charge-discharge current according to a second conversion ratio, and a second capacitor which is charged and discharged by the second charge-discharge current for generating a second charge-discharge voltage signal; and a reverse circuit for reversing the second charge-discharge voltage signal into the reverse voltage signal.

Abstract: A phase-locked loop circuit includes a voltage controlled oscillator. A phase comparator compares the phase of the output signal of the voltage control led oscillator with a reference signal. A loop filter to which the output signal of the comparator is applied provides a control signal to the voltage controlled oscillator. The voltage controlled oscillator is formed by interconnecting a plurality of oscillator components according to a desired wiring pattern. Each wiring pattern determines the basic oscillation frequency of the voltage controlled oscillator. A loop filter is formed by interconnecting a plurality of loop filter components according to another wiring pattern. Each wiring pattern determining the time constant of the loop filter. The oscillator components, the wiring pattern interconnectors, the comparator, the loop filter components and its wiring pattern interconnectors are disposed on a single substrate.

Abstract: A voltage controlled oscillator circuit is shown in integrated circuit chip design form. The frequency range of the circuit is extended by providing switch means for isolating the off-chip frequency determining capacitor and employing a minimum-value on-chip capacitor to control circuit maximum frequency operation. The circuit is based upon a regenerative latch operation which switches a controlled current to charge a capacitor first in one polarity and then in the other polarity. A control voltage determines the charging current and hence the frequency of operation.

Abstract: A voltage controlled surface acoustic wave oscillator includes an integrated circuit and a two port resonator connected as a feedback element around the integrated circuit. The integrated circuit includes a phase shifting network and an amplifier directly connected to the phase shifting network.

Abstract: A micro-miniature resonator-oscillator is disclosed. Due to the miniaturization of the resonator-oscillator, oscillation frequencies of one MHz and higher are utilized. A thickness-mode quartz resonator housed in a micro-machined silicon package and operated as a "telemetered sensor beacon" that is, a digital, self-powered, remote, parameter measuring-transmitter in the FM-band. The resonator design uses trapped energy principles and temperature dependence methodology through crystal orientation control, with operation in the 20-100 MHz range. High volume batch-processing manufacturing is utilized, with package and resonator assembly at the wafer level. Unique design features include squeeze-film damping for robust vibration and shock performance, capacitive coupling through micro-machined diaphragms allowing resonator excitation at the package exterior, circuit integration and extremely small (0.1 in. square) dimensioning.

Abstract: An array of unit oscillators interconnected with one another in that the transistors of the oscillators are connected to common lines. Separate lines in proximity provide coupling capacitance for feedback to sustain the oscillation of the unit oscillators. The separate lines also form a grid which results in an antenna for emanation of the oscillators, radiation The array can effectively function at extremely high frequencies (i.e., greater than 30 GHz). The array is specially designed to accommodate monolithic implementation.

Abstract: An embodiment of the present invention is a single-chip GPS receiver front-end comprising a radio frequency amplifier, a voltage-controlled oscillator operating at a first local oscillator frequency, a divide by seven and one-half counter for deriving a second local oscillator frequency from the first and a first and second mixer. The local oscillator frequency is mid-way between two carrier frequencies of interest that may be received by the radio frequency amplifier and the first mixer produces a first intermediate frequency. The second local oscillator frequency is then beat with the first intermediate frequency in the second mixer to produce a second intermediate frequency. A dual-conversion super heterodyne configuration is therefore employed in which the first and second local oscillator frequencies are derived from a single oscillator and the first local oscillator frequency is seven and one-half times the second local oscillator frequency.

Abstract: The oscillating apparatus according to this invention includes a pulse doped FET 1, and a series feedback capacitor 2 connected to the source of the pulse doped FET 1. The pulse doped FET is a FET formed on a pulse doped epitaxial layer including a channel layer 23 with a high carrier density, and a cap layer 24 with a low carrier density formed on the channel layer 23. The series feedback capacitor 2 is a variable capacitor whose capacitance value increases when a gate bias voltage of the pulse doped FET 1 is changed to increase a drain current of the pulse doped FET 1. Consequently it is possible to reduce phase noises by controlling only the gate bias with an oscillation frequency set at a required value. As a result, the merits of the MMIC can be sufficiently utilized without the necessity of externally adding a dielectric resonator.

Abstract: An oscillation inducing circuit includes a power-on circuit connected to a power supply of V.sub.DD, a plurality of transfer gates, and a capacitor. The power-on circuit (1) supplies a control signal having a first level to the transfer gates so that a capacitor is charged in a first polarity direction to an instantaneous level of the increasing power supply voltage, and (2) supplies a control signal having a second level so that the capacitor is charged in a second polarity direction, opposite to the first direction, to a voltage equal to an addition of the previously charged voltage and the present instantaneous power supply voltage. Together, these two charges produce a relatively high voltage for initializing the circuit and starting an oscillator.

Abstract: An embodiment of the present invention is a voltage controlled oscillator (VCO) comprised of a differential pair of transistors that have respective positive feedback paths with phase-lead networks cross-coupled. Each positive feedback path on each side has two different phase-lead branches. The two phase-lead branches have the same phase differences on each side of the differential pair, in order to maintain a symmetry that improves common-mode noise rejection on a voltage control differential input. Current-steering is used to control the mixture of currents that arrive at the bases of the differential transistor pair from the respective two different phase-lead branches, and thereby changing the frequency of the VCO.

Abstract: An integrated tunable resonator (100) includes a common semiconductor carrier (110). Formed on the common semiconductor carrier (110) is an integrated voltage variable capacitor (104). A bulk acoustic wave resonator is formed on the common semiconductor carrier (110) and coupled to the voltage variable capacitor (104). In one aspect of the present invention, a thin film resonator (106) is coupled to the voltage variable capacitor (104) both of which are formed on a common semiconductor substrate (110). The combination of these three elements provide for a tunable integrated resonator (100). In another aspect of the present invention, a surface acoustic wave resonator (522), formed on a common semiconductor carrier (514), is coupled to a voltage variable capacitor (520) in order to provide a tunable resonator (500).

Abstract: An integrable variable-frequency oscillator circuit with a feedback amplifier configuration includes first and second input terminals. A frequency-determining feedback element is connected between the input terminals. First and second amplifier stages have inputs connected to the first input terminal and outputs supplying output signals generated by the amplifier stages. The second amplifier stage has a variable gain. A first phase-shifting component is connected to the output of the second amplifier stage for receiving the output signal of the second amplifier stage. A third amplifier stage is connected downstream of the first phase-shifting component for generating an output signal. The output of the first amplifier stage is connected downstream of the phase-shifting component for adding the output signal of the first amplifier stage to the output signal of the second amplifier stage.

Abstract: A monolithically integrated microcomputer clocked at a processor clock rate includes a clock generator in the form of an RC oscillator being synchronizable by external signals for controlling at least one functional unit operating asynchronously with the processor clock rate. The RC oscillator has a frequency-determining resistor and a frequency-determining capacitor being monolithically integrated. The frequency-determining capacitor is formed of a plurality of switchable capacitors to be interconnected to make a total capacitor with a variable size. Registers are each connected to a respective one of the capacitors for defining a switching state of the switchable capacitors. A central processing unit is connected to the registers for adjusting the frequency of the clock generator by setting the registers.

Abstract: A cointegrated high frequency oscillator including a thin film resonator and active devices formed on the same semiconductor substrate and by a process which is compatible with formation of both the thin film resonator and the active devices. The processes utilized in formation of the thin film resonator are adapted to microelectronic processing techniques such that the steps of formation of the active devices and the thin film resonator can be intermixed to the degree necessary to allow, for example, the metallization layers to serve as elements both of the active devices and the thin film resonator.

Abstract: The disclosure concerns the fabrication of integrated circuits. To enable the making, in an integrated circuit, of an internal clock, the frequency of which is adjustable and does not depend on the general supply voltage Vcc of the circuit, a relaxation oscillator is used. This relaxation oscillator is built in the following way: weighted individual current sources may be selectively connected in parallel under the control of a register containing frequency adjusting data. These sources charge and discharge a capacitor. A threshold comparator determines a high threshold Vh and a low threshold Vb to trigger respectively the discharging and the charging of the capacitor. The difference Vh-Vb is made proportional to the currents of the elementary sources. Thus, even if the value of the currents varies as a function of the supply voltage, the thresholds vary at the same time and the period of the oscillator does not vary.

Abstract: An oscillator, such as a crystal oscillator, is presented for low jitter (low phase noise) applications, such as in frequency synthesizers or digital repeaters. The two terminals of a resonator are coupled to the input and output of an amplifier, the amplifier together with other components effecting a negative impedance. The inputs of a comparator are connected to the terminals of the resonator. The output of the comparator, preferably differential, is a signal having a frequency substantially determined by the resonator.

Abstract: A piezoelectric oscillator semiconductor circuit comprises a piezoelectric oscillator which is set to a designated oscillation frequency via electrical coupling to a separate semiconductor element comprising an oscillation circuit. The oscillation circuit in the semiconductor element has a gate lead and a drain lead connected to the piezoelectric oscillator to set the frequency of operation of the piezoelectric oscillator. Included in the semiconductor element are adjustment means comprising one or more frequency adjustment elements which may be selectively connected to one of the connection leads whereby the frequency of operation of the piezoelectric oscillator may be selectively changed without need for replacement or change of the semiconductor element. The frequency adjustment elements may be comprised of one or more fixed, separately formed capacitances provided as part of the semiconductor element but are electrically independent of the oscillation circuit, i.e.

Abstract: A method for powering up an integrated circuit and circuit for implementing the method. A first charging current is used to slowly charge a capacitor used in the integrated circuit upon connecting the power. A power-up signal is provided to initialize digital circuitry until the first charging current raises the voltage of the capacitor above a threshold value. Once a capacitor is charged to another predetermined threshold, a second charging current is activated. The two charging currents are thereafter used as the total charging current on the capacitor. If the capacitor is grounded, the initial power-up scheme is re-initiated.

Abstract: A single pin oscillator which consists of first and second transistors (17, 18) whose collectors are connected, via respective collector resistances (19, 20), to the positive pole of a DC source U.sub.V and whose emitters are connected to the negative pole thereof via respective emitter resistances (21, 22). The collector of each transistor is connected to the base of the other transistor. A quartz crystal (12) or a series resonant circuit is connected to the emitter of one transistor (17) and parallel to the corresponding emitter resistance (21). A driver circuit (23) is provided for an oscillator voltage which can be coupled out to an external low-ohmic, highly capacitive load connected to the emitter of the other transistor (18) and parallel to the corresponding emitter resistance (22).

Abstract: An oscillator for generating a master clock frequency and also dividing that frequency by two. The oscillator uses one flip-flop of a dual D package as the generator for the master clock frequency and the other flip-flop in that package to divide that frequency by two.

Abstract: In the voltage controlled oscillator disclosed herein, the charging and discharging of a timing capacitor is controlled by a differential input comparator which establishes precisely defined switching thresholds. The comparator input circuit is provided with an internally generated, temperature compensated input bias current which substantially relieves the timing components from providing bias current, thereby facilitating a wide range of operation.

Abstract: A CMOS/NMOS integrated circuit realizes individual logic circuits with a combination of CMOS and enhancement-mode NMOS devices. The parameters of the CMOS and NMOS devices are selected such that the supply voltage dependency of the CMOS devices is offset by the supply voltage dependency of the NMOS devices. Thus, the propagation delays in the CMOS and NMOS devices, individually a function of supply voltage, remain constant for variations in the supply voltage. The logic circuits include analog-to-digital converters, adders, multipliers, flip flops and ring oscillators. The ring oscillator includes two blocks of inverters. The first block comprises CMOS inverters connected in series; the second block comprises enhancement-mode NMOS inverters connected in series. The output of the first block is connected to the input of the second block, and the output of the second block is connected to the input of the first block, thus forming a "ring" of inverters.

Abstract: This high-precision oscillator stage, with reduced response times, includes only NPN transistors on the signal path and comprises a threshold detector circuit connected to a first and to a second threshold voltage and to the output of the stage so as to generate a differential voltage output signal which switches when each voltage threshold is reached, a control and memory circuit comprising a differential voltage detector connected to the output of the threshold detector and generating a charge and discharge signal depending on the state of the circuit, a memory element controlled by the differential voltage detector to maintain the charge and discharge states and an output driving circuit connected to the control and memory circuit so as to supply an external capacitor with constant currents so as to alternately and periodically charge and discharge the capacitor.

Abstract: An oscillator circuit comprising a feedback amplifier circuit having a power supply terminal, a resonant circuit comprising a crystal, and a differential amplifier which is coupled to a bias current source which is switchable stepwise by means of a level detector for the stepped excitation of the resonant circuit from a predetermined potential at the power supply terminal. When switching on the power supply voltage, the level detector insures that the resonance of the oscillator circuit is achieved in a defined and a reproducible way.

Abstract: A fully integrated, adjustable oscillator circuit for use with a crystal is disclosed in which a crystal oscillator, such as a Pierce oscillator, is arranged to utilize a tuning network that includes at least one integrated varactor (voltage-variable-capacitor) as a shunt element for providing at least one type of adjustment of the oscillating signal. More than one type of adjustment can be provided by including a bank of varactors for each of the shunt elements of the tuning network, in which various individual varactors are selected in binary (on-off) fashion to effect digital as well as analog adjustment of the crystal oscillator.

Abstract: A constant voltage circuit comprises a capacitor connected between one end of a MOS transistor controlled by an operation-stop control signal and an output terminal of an inverter for inverting the operation-stop control signal. When, in the circuit having this arrangement, the transistor for operation-stop control is turned off and the hold mode is ended, the potential at one end of the transistor is quickly lowered to the ground potential. The result is to quicken the start of operation of the constant voltage circuit and hence the rise of the constant voltage output.

Abstract: An integrated NMOS circuit includes an external connection terminal to be connected to an external component, a control voltage terminal, a supply voltage terminal, a reference voltage terminal, a circuit output terminal, a voltage controlled transistor network having an input connected to the control voltage terminal and an output connected to the external connection terminal, a control device supplied by a voltage source through the supply voltage terminal and the reference voltage terminal, the control device having an input connected to the voltage controlled transistor network and an output fed back to the transistor network and connected to the circuit output terminal, the transistor network including a switchable charging current source and a switchable controlled discharging current source, the switchable controlled discharging current source being controlled by a control voltage connected to the control voltage terminal, the switchable charging current source and the switchable controlled discharging

Abstract: An integrated voltage controllable oscillator having a transistor for oscillation is further provided with a resonance circuit externally connected to two electrodes of the transistor for oscillation and including a variable capacitance element adapted to vary a resonance frequency of the resonance circuit, and a high impedance element connected between the variable capacitance element and the ground in a circuit adapted to supply a control voltage to the variable capacitance element.

Abstract: A voltage controlled oscillator is formed of a plurality of cascaded inverter stages in a ring configuration. Each inverter stage is a grounded emitter circuit having an active pull-up stage in order to achieve a short stage delay. The frequency of the ring oscillator is determined by the number of inverter stages, and the gain is selectable by coupling an external control voltage to only certain of the inverters. The VCO may be fabricated on a single integrated circuit along with the other circuits necessary to form a phase locked loop or other frequency generation system.

Abstract: This relates to a programmable ring oscillator which comprises a plurality of series coupled gates the output of the last of which is fed back to the input of the first. Bypass means are coupled across the outputs of selected gates so as to in effect increase or decrease the length of the string. In one embodiment, laser trimmable fuses are employed in the bypass networks. In a second embodiment, a data selector under external control is employed.

Abstract: The gain margin of a junction FET oscillator is improved by the addition thereto of a bipolar transistor in parallel with the FET for boosting the closed loop circuit gain of the oscillator without degrading the phase noise performance of the FET. The oscillator circuit is formed by a grounded gate JFET with a feedback circuit including the internal impedance of the FET, a capacitor which couples source and drain of the FET, a capacitor which couples the FET source to ground, and a resonant circuit coupled between the drain of the FET and ground including a varactor diode for controlling the oscillating frequency and providing a circuit output. A bipolar transistor is coupled in parallel with the FET by coupling its collector to FET's drain and its emitter to the FET's source. The base of the transistor is coupled via a by-pass capacitor to circuit ground.

Abstract: A converter (300) for converting an a.c. voltage (SP) into a direct current (i.sub.3), characterized in that it comprises a first elementary converter (21) which, in response to the a.c. voltage (SP), provides a pulsed direct current (i.sub.1), the mean value (i.sub.1) of which is a steeply rising function of the amplitude A of the a.c. voltage (SP), and a second elementary converter (22) which, in response to the current i.sub.1 provides a current i.sub.3, the value of which is a steeply falling function of i.sub.1.Used for regulating the amplitude of the oscillation signal of an oscillator.

Abstract: A sawtooth wave oscillator is disclosed which includes a series connection consisting of a charging circuit and a first capacitor, a voltage dependent capacitor connected in parallel to the first capacitor, and a discharging circuit connected in parallel to the first capacitor, whereby a sawtooth wave which has good linearity can be generated with a simple circuit construction.

Abstract: A substrate bias-voltage generator is comprised of an oscillator, and a charge pumping circuit, driven by the oscillator via a coupling capacitor, which transfers accumulated electric charges, out of the semiconductor substrate. The oscillator frequency is varied in accordance with the variation of the voltage level of the semiconductor substrate, preferably by means of an RC circuit, fabricated by a MOSFET variable resistance (R) and a capacitor (C), within a ring oscillator or a multi-vibrator. The gate electrode of the MOSFET variable resistance is directly connected to the semiconductor substrate.

Abstract: A yelping alarm signal generator has a current controlled audio oscillator with a feedback loop around it that produces a control current that is a direct function of the oscillation frequency so that only one capacitor external to the integrated circuits is required.

Abstract: A horizontal oscillator for a television receiver includes an on chip nitride capacitor. The circuit includes a reference current amplifier which generates a low temperature coefficient reference current. By varying the gain of a current mirror circuit, the reference current is split to produce a small charge/discharge current. A resistive bias chain and first and second capacitors are employed to fix the upper and lower peak voltages of the oscillator output ramp signal.

Abstract: A tunable microwave oscillator including a transistor with a tuning diode which form an oscillating circuit particularly for use in television tuners and which does not require an inductor. A novel combination of an oscillator and mixer is also provided and the oscillator and mixer are designed to cover broad tuning ranges.

Abstract: In a voltage supply wherein a voltage multiplier produces an output voltage level in proportion to its driving frequency, the output voltage level is regulated by incorporating a voltage controlled oscillator to vary the driving frequency in accordance with the output voltage level of the voltage multiplier. To improve operating efficiency, current amplifiers are disposed between the output of the voltage control oscillator and the input of the voltage multiplier. Furthermore, a level shift means is incorporated in another embodiment for disabling the voltage controlled oscillator and for impressing a rail voltage level at the output terminal of the voltage multiplier.

Abstract: A field effect transistor (FET) is comprised of a plurality of unit transistors having a common gallium arsenide substrate with an N-type active region. Each unit transistor is comprised of a unit gate, a unit drain and a unit source. The FET is mounted in a flip-chip carrier that connects all of the unit sources together to form a first electrode of the FET. Additionally, the first electrode is connected to ground by the carrier. All of the unit drains are connected together on the substrate to form a second electrode of the FET. The FET is reverse biased to cause a current to flow from the first electrode to the second electrode, whereby the first and second electrodes are a drain and a source, respectively, of the FET.

Abstract: A tunable microwave oscillator including a transistor with a tuning diode which form an oscillating circuit particularly for use in television tuners and which does not require an inductor. A novel combination of an oscillator and mixer is also provided and the oscillator and mixer are designed to cover broad tuning ranges.

Abstract: An electronic timepiece wherein the timekeeping circuitry utilizes semiconductor-insulating substrate integrated circuitry for effecting high frequency operation is provided. The timepiece includes an oscillator circuit adapted to produce a high frequency time standard signal and is comprised of at least one inverter stage coupled to a high frequency time standard. A divider circuit formed of a plurality of series-connected divider stages produces a low frequency timekeeping signal in response to the high frequency time standard signal being applied thereto. A display is provided for displaying time in response to the timekeeping signal being applied thereto. The oscillator circuit, divider circuit and display include integrated circuit elements and at least the inverter stage of the oscillator circuit includes at least one complementary coupled pair of P-channel and N-channel conductive field-effect transistors having a semiconductor-insulating substrate construction.

Abstract: The alarms circuit provides a first signal indicative of a fire alarm and a second signal indicative of another intrusion such as a burglary. The circuit includes a high frequency RC oscillator which undesireably possesses a duty cycle different from fifty percent. The oscillator output is divided by a bistable multivibrator to produce at an output, a divided signal having a fifty percent duty cycle for application to a loud speaker to energize the same efficiently due to the proper duty cycle. In a burglary mode, the oscillator frequency is modulated by a sawtooth developed by a second bistable multivibrator to provide a wailing tone signal indicative of a burglary. This signal is also divided to produce a proper duty cycle signal for application to the loud speaker.

Abstract: A current controlled ring oscillator is utilized in a phase locked loop system. The ring itself is comprised of lateral pnp current sources and Schottky clamped npn transistors to provide a frequency range of 4 megahertz at 50 microamp drive to 43 megahertz at 1 milliamp drive. The frequency of the ring oscillator is varied by varying the current injected into the ring.

Abstract: A voltage controlled oscillator whose frequency is a function of an input voltage having a first and a second pair of switching devices coupled respectively to first and second terminals of a capacitor. The oscillator has a first leg coupled from the first capacitor terminal through first inverter means, a first NOR device and third inverter means back to the first pair of switching devices and the first capacitor terminal. The second leg is coupled from the second capacitor terminal through second inverter means, a second NOR device, fourth inverter means back to the second pair of switching devices and the second capacitor terminal. The first and second NOR devices are directly cross-connected. The first and second legs each have the same number of propagation delays and during state transition, both terminals of the capacitor are coupled to the reference potential for a brief instant of time.

Abstract: A novel I.sup.2 L ring oscillator circuit includes means by which the repetition rate is adjustable. A plurality of cascaded logic gate stages are coupled in a ring configuration to achieve a plurality of astable states. Frequency adjustments are made by varying the amount of injection current applied to the logic gates which comprise the ring oscillator. Lowering injection current increases delay time from one astable state to the next resulting in a lower frequency repetition rate. The ring oscillator may be fabricated on a single substrate along with other I.sup.2 L circuitry and be utilized as the clock source therefore. In one embodiment of the circuit, a plurality of discrete frequency adjustments are provided; by selection of a particular lead pattern during fabrication of the oscillator, the appropriate injection current to the oscillator logic gates is provided.