Abstract: An oscillator circuit includes a plurality of transistors that can withstand relatively low gate-to-source and gate-to-drain voltages. The oscillator circuit interfaces with an oscillator that oscillates at a relatively high voltage. The oscillator circuit includes a first set of transistors coupled to an input voltage and an output voltage of the oscillator, the input voltage oscillating in a range exceeding a tolerance voltage level of each transistor of the first set of transistors. The oscillator circuit also includes a second set of transistors to limit a voltage level in the first set of transistors. The oscillator circuit further includes a third set of transistors to provide a constant current path for the second set of transistors, independent of a switching state of each transistor of the first set of transistors.

Abstract: Provided is an oscillation circuit capable of obtaining a plurality of oscillation frequencies using a single oscillation resonator. The oscillation circuit includes the oscillation resonator, an oscillation inverter, a dumping resister connected between an output of the oscillation inverter and an output terminal, a feedback resistor connected with input and output of the oscillation inverter, and a feedback resistor switch for varying a feedback resistance value or an oscillation inverter switch for varying a mutual conductance value of the oscillation inverter. When the feedback resistance value or the mutual conductance value of the oscillation inverter is varied by the feedback resistor switch or the oscillation inverter switch, a frequency band of the oscillation circuit is adjusted to select a harmonic component of the oscillation resonator. Therefore, an oscillation frequency can be switched, so it is possible to obtain a plurality of oscillation frequencies using a single oscillation resonator.

Abstract: When a power supply is turned on, an NPN transistor is disconnected, a first transmission gate is conducted, a second transmission gate is disconnected, and a power-supply voltage is applied to a control input terminal of a voltage controlled oscillation circuit via the first transmission gate. After oscillation of a quartz resonator is stabilized, the NPN transistor is switched to the conducted state by a control signal applied to a general purpose terminal so that the first transmission gate is switched to the disconnected state, and the second transmission gate is switched to the conducted state. Then, a voltage of the voltage control terminal is applied to the control input terminal of the voltage controlled oscillation circuit via the second transmission gate.

Abstract: An oscillator amplifier circuit is provided. The amplifier circuit can be used with a resonator to amplify and form a resonating oscillator. The amplifier circuit comprises an active circuit which includes an inverter and a current-controlled biasing circuit. One transistor of the inverter receives a voltage produced from the biasing circuit in order to place a gate terminal of that transistor at approximately a threshold voltage. The other transistor can be biased using a passive circuit element, such as a resistor. Therefore, both transistors are biased independent of each other within the optimal gain region. Large shunt capacitors are not required and the total current consumption is controlled through a variable resistor coupled to the source terminal of either the first transistor, second transistor, or possibly both transistors of the inverter to adjust the amplitude of the oscillating output.

Abstract: A frequency source having a fast start-up time and low noise in steady state is presented. The frequency source includes an oscillator and a hybrid automatic gain control (AGC) loop that switches between an analog AGC loop at oscillator start up and a digital AGC loop at steady state operation. The analog AGC loop includes a peak detector connected to the oscillator and an error integrator integrating the difference between the peak detector output and a reference voltage. The digital AGC loop includes a comparator comparing the peak detector output and high/low reference voltages, an oscillator counter providing a timer signal, a digital-to-analog converter (DAC) supplied with a digital word, and a low pass filter between the DAC and the oscillator. The timer signal causes a multiplexer to select either the analog AGC loop or the digital AGC loop.

Abstract: A semiconductor integrated circuit includes a reference-voltage circuit configured to produce a predetermined reference voltage at an output node thereof, a comparator, coupled to a node to which an oscillating signal is supplied and to the output node of the reference-voltage circuit, to produce a result of comparison at an output node thereof, the result of comparison being made by comparing a voltage of the oscillating signal with the predetermined reference voltage, and a detection circuit coupled to the output node of the comparator to produce, in response to the result of comparison, a stable-state-detection signal indicating that the oscillating signal has an amplitude larger than the reference voltage.

Abstract: It is an object of the invention to obtain a stable operation with a low phase noise. Moreover, it is another object to obtain an oscillating output which does not cause the delay of a starting time. According to the invention, it is possible to implement a crystal oscillating circuit capable of superposing a signal obtained by feeding back the oscillating output of a crystal oscillating member (10) by a feedback circuit (5) on a control signal for selecting the load capacity of a load capacity selecting portion (3), and influencing an MOS transistor (50) by the voltage noise of the control signal with difficulty, thereby reducing a phase noise, and furthermore, limiting a control signal to be input to the load capacity selecting portion (3) for a certain time in starting and carrying out the starting in a short time.

Abstract: An oscillator circuit configured by a feedback resistance 1, an amplifier 2 and a quartz vibrator 3 has a load resistance. MOS transistors 5, 6 short-circuited at source and drain terminals has a capacitance, as a variable capacitance, occurring at between the source-drain terminal and gate terminal. A series connection of DC-cut capacitance 8, 9 and variable capacitance (MOS transistor 5, 6) is configured between one and the other terminals of the quartz vibrator 3 and an AC ground terminal. For example, a threshold voltage control signal for MOS transistor 5, 6 is inputted to the source-drain terminal through a high-frequency removing circuit 10, 11. Meanwhile, a signal that a temperature compensation control signal and an external voltage frequency control signal are superimposed together is inputted to the gate terminal. This makes it possible to desirably determine an output bias to a temperature compensation control circuit and an external voltage frequency control circuit.

Abstract: An oscillation circuit includes a constant current source, a current mirror circuit configured to receive a constant input current from the constant current source and to output a current proportional to the constant input current, a first inverter configured to be driven with a quartz resonator to oscillate, an operational amplifier configured to supply power to the first inverter with a voltage equal to an input voltage of the operational amplifier and a second inverter having a power supply terminal connected to the current mirror circuit and to the operational amplifier and configure to generate the input voltage for the operational amplifier.

Abstract: A real time clock that operates an oscillator within a predetermined range by employing a constant current source. The remaining real time clock logic can be operated at a voltage that is relative to the constant current. Power consumption of the oscillator can be controlled by limiting the current from the constant current source. The outputs of the oscillator can be input into a signal detector. A clocking signal can be produced by the signal detector based on the oscillator signals. The current provided by the first current source is limited to provide low power operation of the oscillator. Optionally, the signal detector can employ a differential amplifier. The differential amplifier receives the oscillator outputs, and provides a clocking signal based on the oscillator outputs.

Abstract: Circuits and methods for controlling the amplitude of oscillation of a crystal. In one example, a circuit may include a peak detector; a first voltage-to-current converter; a first current-to-voltage converter coupled with the first voltage-to-current converter; a second voltage-to-current converter; a second current-to-voltage converter coupled with the second voltage-to-current converter; and a differential amplifier; wherein a ratio between a size of first voltage-to-current converter and a size of the second voltage-to-current converter is used to control the gain of the circuit.

Abstract: A quartz-crystal oscillator circuit substantially reduces the start-up time of the crystal oscillator circuit by utilizing a start-up time reduction circuit that adds additional gain to the crystal oscillator circuit during the start-up period, and removes the additional gain as the oscillator circuit nears steady state operation. Furthermore, the start-up time reduction circuit dynamically monitors the oscillation amplitude. If the build up of oscillation is interrupted, the additional gain will be re-applied.

Abstract: The invention provides a temperature compensated crystal oscillator that can obtain a large variable range and that can obtain high temperature stability. This temperature compensation system employs a configuration comprising a oscillation circuit 12 including a crystal vibrator 11 having a piezoelectric element excited in a given frequency and an oscillation amplifier that excites the piezoelectric element by flowing a current to the piezoelectric element, a vibrator current control circuit 13 that controls the current of the crystal vibrator, a temperature compensation voltage generation circuit 15 that compensates for temperature characteristics of the crystal vibrator 11, and an external variable capacitance diode 17 that changes the oscillation frequency of the oscillation circuit 12 using an external variable voltage controller 16. The vibrator current control circuit 13 comprises a variable capacitance diode 14 that controls the vibrator current, and capacitors 1 to 3.

Abstract: A voltage/current converting circuit has a differential circuit. The differential circuit has a first input terminal coupled to receive an input voltage signal, a second input terminal coupled to receive a reference voltage signal and an output terminal for outputting an electrical current in response to a comparison of the input voltage signal and the reference voltage signal. The differential circuit includes first and second transistors. The first transistor has a control terminal connected to the first input terminal and has a first dimension. The second transistor has a control terminal connected to the second input terminal and has a second dimension that is different from the first dimension.

Abstract: A structure and associated method to allow an oscillator circuit to operate with a plurality of different crystals. The oscillator circuit comprises a semiconductor device and a crystal. The semiconductor device comprises a primary inverting amplifier and a crystal substitution damping resistor. The crystal is electrically coupled to the primary inverting amplifier. A resistance value of the crystal substitution resistor is adapted to vary in order to control an amount of current flow from the primary inverting amplifier to the crystal. The amount of the current flow to the crystal is dependent upon an electrical property of the crystal.

Abstract: A system and method of varying frequency is disclosed. A first oscillator in a phase-locked loop (PLL) maintains a first frequency as part of the PLL lock. A second oscillator having a control coupled to the PLL can be modified to generate a frequency different than that of the PLL. This is accomplished while maintaining lock of the PLL.

Abstract: A system and method of varying frequency is disclosed. A first oscillator in a phase-locked loop (PLL) maintains a first frequency as part of the PLL lock. A second oscillator having a control coupled to the PLL can be modified to generate a frequency different than that of the PLL. This is accomplished while maintaining lock of the PLL.

Abstract: A phase locked loop (PLL) circuit adjusts a voltage controlled differential oscillator to generate an output frequency signal that is a selected multiple of an input reference signal. An oscillator control circuit increases and decreases the output frequency signal. A frequency detector detects a phase shift between the reference signal and the PLL output signal and produces an error signal. In response to the error signal, a fast lock circuit detects when the output frequency signal passes the selected multiple of the reference signal.

Abstract: A charge pump includes a charge circuit switch, a pump circuit switch, and a controller for generating a first control signal for switching the charge circuit switch and a second control signal for switching the pump circuit. In order to reduce the effects of self-jitter and improve signal quality, the controller generates the first and second control signals so that they have a same amplitude and slew rate. This results in improving steady-state phase error (DC skew). To further improve performance, current sources of the charge pump are controlled to operate continuously. This advantageously minimizes parastic switching currents. The charge pump may be incorporated within a phase-locked loop for purposes of generating frequency signals. The phase-locked loop may be self-biased. A processing system having, for example, a microprocessor-based computing architecture may advantageously include the phase-locked loop for performing any one of a variety of applications.

Abstract: A system and method for controlling a phase-locked loop detects a deadlock condition and then adjusts an output frequency of an oscillator until the deadlock condition is corrected. The deadlock condition may be detected based on a value of a charge pump signal which controls the oscillator frequency. In accordance with one embodiment, deadlock is detected if the value of the charge pump signal approaches one of two supply rail voltages. The deadlock condition is overcome by manipulating current signals output from the charge pump. This is accomplished by turning off the current from one charge-pump current source and increasing current from a second-charge pump current source. The increased current may be provided by a third current source located within or external to the charge pump. By adding current from the third current source, the output frequency of the phase-locked loop will be driven lower until a value is reached which effectively pulls the PLL out of the deadlock condition.

Abstract: A highly stable single chip resonator controlled oscillator with automatic gain control designed for manufacture in monolithic integrated circuit technologies. An automatic gain controller monitors the output of a crystal controlled oscillator amplifier and produces a feedback signal to ensure oscillation is induced at startup and that the amplitude of oscillation is continuously controlled during operation to reach low phase noise and reduce power consumption of the circuit.

Abstract: A circuit and method are disclosed herein for a crystal oscillator, wherein the Q of the resonant network is not reduced through the loading effects of the oscillator's resistive bias network. The oscillator is configured as an operational transconductance amplifier (OTA) coupled to the resonant network. The OTA creates a negative resistance, which compensates for energy lost to resistance within the resonant network, thereby sustaining oscillation at the resonant frequency. Instead of using bias resistors to set and maintain the operating point of the oscillator, another OTA (with a high output impedance) injects a current into the resonant network to bias the oscillator. Advantageously, this technique avoids the reduction in Q that occurs when bias resistors are connected across the high effective parallel resistance of the resonant crystal. The higher Q benefits frequency stability and phase jitter characteristics of the oscillator.

Abstract: A crystal oscillator apparatus is described that has a wide dynamic frequency range and that is capable of supporting a broad range of crystal types. The present invention reduces the unwanted side effects that are associated with the prior art crystal oscillator designs, such as the clipping of signals, the introduction of signal distortion and unwanted signal harmonics. The present invention reduces the total wasted loop gain of the oscillator while also reducing the amount of integrated circuit real estate required to implement the crystal oscillator. The crystal oscillator apparatus of the present invention preferably comprises a crystal resonator circuit, an inverting amplifier, a bias circuit, a reference circuit, and a peak detector circuit. The present invention takes advantage of Automatic Gain Control (AGC) design techniques. The gain of the present crystal oscillator is automatically regulated using a closed loop circuit design.

Abstract: A low power clock oscillator circuit for driving microprocessors and other digital circuits is provided. The clock oscillator includes a resonant network for providing a sinusoidal waveform at a predetermined frequency. A first amplifier for amplifying the sinusoidal input waveform provides an output to a second amplifier. The second amplifier converts the amplified sinusoidal waveform to a continuous pulse output having a level-shifted voltage level greater than the amplitude of the sinusoidal waveform. The first amplifier is powered from a power source having a voltage level that is less than the power source that powers the second amplifier. Additionally, the second amplifier includes an enable input for disabling the continuous pulse output to permit decreased power operation with fast restart capability.

Abstract: A crystal oscillation circuit includes a main oscillation circuit, an auxiliary oscillation circuit, and a control circuit. The main oscillation circuit has a crystal resonator. The auxiliary oscillation circuit increases an exciting current of the crystal resonator to assist the start of oscillation of the main oscillation circuit. The control circuit connects the auxiliary oscillation circuit parallel to the main oscillation circuit at the start of oscillation to increase an exciting current of the crystal resonator.

Abstract: A crystal oscillator drive circuit controls the maximum amplitude of the drive signal to a crystal by limiting the bias current of a gm cell which senses the oscillation amplitude of the crystal. The bias current is commutated by the gm cell responsive to the crystal oscillation. The commuted current is converted to a single-ended current by a current mirror. An output stage converts the current to an output voltage having a voltage swing that is determined by the resistance of a load resistor. The output voltage is then fed back to drive the crystal through a positive feedback path. The output voltage swing and the drive signal to the crystal are limited by the bias current of the gm cell. A fully complementary implementation of the drive circuit includes two complementary gm cells, two current mirrors, and an output stage having two load resistors.

Abstract: A power management system is disclosed. The system includes an oscillator interface for use in a power management system, a power recycle circuit for use in a power management system, a pad clock and self test for use in a power management system, a clock enable circuit for use in a power management system, a power level detect circuit for use in a power management system, an internal source clock generation circuit for use in a power management system, and a power-save mode change detection circuit for use in a power management system. The oscillator interface includes an interface circuit for interfacing with an external oscillator used as a source of oscillations. A clock stabilization filter masks out spurious crystal frequencies in the oscillations during start-up of the power management system following an enabling of a feedback loop. The clock stabilization filter has circuitry which provides that the oscillations will start with a rising transition after filtering.

Abstract: A low power, fast starting oscillator (10) of the Colpitts type includes an amplifier (12) that provides voltage gain and feeds a source follower circuit (14) that provides a desirable output impedance. A crystal (16) is coupled from an output of the source follower circuit (14) back to the amplifier's input (32). The voltage gain of the amplifier (12) and the output impedance of the source follower circuit (14) are independently selectable to provide an optimum transconductance for the oscillator (10) to start quickly. When oscillations reach a threshold value, the transconductance may be reduced to save power.

Abstract: An oscillation circuit employs a piezo-electric crystal connected in parallel with an amplifier having a gain equal to or less than that needed to maintain a steady-state operation of the amplifier when operated at the maximum output. One or more controllable amplifiers are connected in parallel with the amplifier and controlled according to the level of the oscillation signal, to rapidly amplify an initial oscillation to steady-state operation level and to keep it there without exceeding the output level of the crystal while minimizing the energy supplied to the entire oscillation circuit.

Abstract: The aging and radiation induced frequency shifts of quartz crystal oscillrs are minimized by using oscillator circuits in which the DC voltage applied to the quartz crystal is about zero. This results in reduced movement of impurity ions which generally cause such shifts.

Abstract: A low-power crystal oscillator circuit is disclosed that includes an amplifier section having a switchable compensation network. In one embodiment, the oscillator circuit incorporates inverter amplifiers to generate a square-wave output signal that can be used, for example, as a clock signal to drive microprocessors and other digital circuitry. The invention takes advantage of the observation that, if the uncompensated bandwidth is not too excessive, compensation is only needed at start-up to ensure oscillation at the desired crystal frequency. Once the desired oscillation is attained, most of the oscillation cycle occurs during the non-linear regions of the amplifier. These non-linear regions are characterized by low gain, thus suppressing any spurious oscillation. The compensation network is removed after start-up to reduce power consumption.

Abstract: An oscillation circuit having a clocked inverter operating during a predetermined period of time after the start of the oscillation. A feedback circuit is formed by the clocked inverter and another inverter at the start time of the oscillation. The oscillation circuit is therefore driven by a large amount of current and thus the oscillation start time can be shortened and the oscillation start voltage can be lowered. On the other hand, the oscillation circuit is driven only by the other inverter after starting the oscillation. Since a constant current source is inserted serially in the path of the power source of the other inverter. A constant operating current always flows through the other inverter without being affected by the variations of the threshold voltage of the transistors and the variations of the power source voltages. As a result, a low consumption current characteristic of the oscillation circuit can be obtained under low power source voltage.

Abstract: On an integrated circuit, a power limiting circuit is added to a crystal oscillator for limiting power dissipation in the crystal to a prescribed safe power dissipation range. The power limiting circuit includes a Pierce design crystal-controlled oscillator coupled to a self-stabilizing circuit. The self-stabilizing circuit detects the oscillation amplitudes of the crystal controlled oscillator. The self-stabilizing circuit prevents the oscillations from exceeding a predetermined maximum power dissipation level for the crystal. The self-stabilizing circuit includes a means for detecting oscillation amplitudes and means for limiting the gain of the crystal controlled oscillator circuit. Therefore, independent of manufacturing tolerances from integrated circuit to integrated circuit, the self-stabilizing circuit assures that the maximum power dissipation level of the crystal is not exceeded.

Abstract: An oscillator having a multiplicity of resonant structures parallel coupled to form a fault tolerant resonator in the feedback circuit of the oscillator. This fault tolerant resonator permits the oscillator to operate in a near fault free manner after the failure of one or more of the resonant structures.

Abstract: A CMOS data clock oscillator circuit is disclosed which provides a simple, inexpensive, high-specification oscillator with an accurate duty cycle. The data clock oscillator 100 includes an oscillator stage 121 providing an AC output signal having an average DC value determined by an applied bias voltage, a limiting stage 124 having MOSFETs 102 and 103 configured to form a back-to-back limiter network to limit the amplitude of the AC output signal, a CMOS biasing stage 122 including complementary MOSFETs 104 and 105 configured to form an active resistor voltage divider network providing the bias voltage for the oscillator stage, and a CMOS buffer stage 123 including complementary MOSFETs 106 and 107 configured to form an inverting amplifier network having a predefined input switching threshold. Buffer stage MOSFETs 106 and 107 have conduction types, geometries, and device parameters matched to those of bias stage MOSFETs 104 and 105, respectively.

Abstract: A CMOS crystal controlled oscillator includes a CMOS inverter composed of series connected MOS FETs and a crystal connected between signal input an output nodes of the inverter. First and second capacitors are respectively connected between the signal input and output nodes of the inverter and a feedback resistor is connected between the signal input and output nodes of the inverter. A first current limiting circuit is connected between a MOS FET of the inverter and a power source potential and a second limiting circuit is connected between another MOS FET of the inverter and a ground potential. A control register is provided for controlling the first and second current limiting circuits based on data contained within an internal data bus.

Abstract: A reference pulse generator comprises a quartz crystal oscillator, a frequency divider connected to the oscillator for frequency dividing the oscillator output, and a constant current generator connected in series both with the oscillator and the frequency divider to control the current applied to the oscillator from a power source. The constant current generator comprises a current limiting element, such as a MOSFET, which is controlled by a reference voltage produced by a reference voltage generator.

Abstract: An electronic drive circuit for driving an actuator mass for a sensor apparatus is disclosed. The driver requires no compensation or bridge elements. The actuator mass is directly driven by a square wave drive signal such that all of the capacitors loading errors associated with the driven actuator means are concentrated in time to that time interval in which the drive signal traverses between its two stable states. A sensor circuit connected to monitor the sensor output response signal is blanked out during the drive signal transition time interval, which effectively eliminates the transition drive noise energy from the sensed output signal.

Abstract: The high frequency oscillator includes a piezo-electric crystal (1) which is connected to at least two exciter electrodes (3, 4) and means which make it possible to apply on the one hand to the electrodes (3, 4) electric excitation power for the crystal according to a useful vibratory mode which is selected to determine a frequency reference, and on the other hand additional electric power for exciting the crystal according to an overtone vibratory mode which is distinct from the useful vibrational mode. Means (46, 47) are also provided to regulate the electric excitation power of the crystal according to the useful vibratory mode in a predetermined and constant proportion in relation to the additional electric power. The invention makes it possible to compensate, using the isochronism deficiency stemming from the additional vibration on the useful mode, the indirect amplitude-frequency effect stemming from the additional vibration, and vice versa.

Abstract: Oscillator circuit comprising an amplifier arrangement being connected to a reference level an output and an input thereof being coupled via a single signal-carrying terminal to a resonant network which is connected to the same reference level as the amplifier arrangement, the resonant network comprising a crystal resonator. A stable oscillation at a higher order crystal resonant frequency is provided by means of an LC-network which selects said higher order crystal resonant frequency and a resistor connected in parallel across the crystal resonator, which prevents parasitic oscillations at the resonant frequency determined by the components of the LC-network and the case or holder capacitance of the crystal resonator.

Abstract: The aging rate of an oscillator is minimized by applying a high drive current to the resonator early in the oscillators life until the aging rate decreases to a low value and then applying a low drive current to the resonator for the rest of the oscillators life at a constant temperature.

Abstract: A field effect transistor is used in the bias circuit of an oscillation transistor of a piezo-electric oscillator, and a diode is connected between the gate electrode of the field effect transistor and the base electrode of the oscillation transistor with a polarity to pass current from the gate electrode to the base electrode. The source electrode of the field effect transistor is connected to the base electrode of the oscillation transistor and the drain electrode of the field effect transistor is connected to a power source.

Abstract: In an oscillator-exciting system for a ultrasonic liquid nebulizer, a piezo-oscillator element for nebulizing the liquid is electrically connected to a self-exciting oscillating circuit as a constituent element thereof and the circuit is oscillated at that frequency at which the electric impedance of the piezo-oscillator element is inductive. A protective transistor may be connected to a current-bias resistance of the oscillating circuit, which protective transistor may be cut off by a reed switch sensing the exhaustion of the liquid being nebulized and/or by an overcurrent sensing circuit, for ceasing the oscillation in case of liquid exhaustion and/or overcurrent.