Abstract: A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. During fine tuning adjustment, the PLL may include an analog control loop in which a phase detector circuit and sample and hold circuit are utilized. The output of the sample and hold circuit may be provided to the PLL VCO as VCO input control signals.

Abstract: An oscillator circuit having a first programmable divider for obtaining a reference signal by dividing the frequency of an oscillation signal of a piezoelectric resonator by a frequency dividing number M. A PLL circuit using the reference signal as input thereto to obtain a multiplied signal, the multiplied signal being formed by multiplying the input signal by a second frequency dividing number N for a second programmable divider provided in a feedback circuit. A third programmable divider capable of dividing the frequency of the multiplied signal by a third frequency dividing number X and outputting the frequency-divided signal. The frequency dividing numbers M, N, and X can be set to values independent of each other. Therefore, innumerable combinations of the frequency dividing numbers M, N, and X can be used and the number of frequencies producible by one oscillator can be largely increased by enabling selection of any suitable one of such combinations.

Abstract: The synthesis of high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. During fine tuning adjustment, the PLL may be controlled by a plurality of analog control signals. The analog control signals may be derived by first generating a plurality of phase shifted signals from a divided version of the VCO output clock by using a shift register.

Abstract: A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, a phase-locked loop (PLL) frequency synthesizer is disclosed having a voltage controlled oscillator (VCO) with a variable capacitance that includes a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance, and the continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance. In a further detail, a digital control signal is disclosed to control the overall capacitance for the discretely variable capacitance circuit, and a variable control signal is disclosed to control an overall capacitance for the continuously variable capacitance circuit.

Abstract: Briefly, in accordance with one embodiment of the invention, a circuit includes: a voltage tunable inductive-capacitive (LC) oscillator, a charge pump, and a phase detector. The oscillator, detector, and charge pump are coupled together to form a PLL.

Abstract: A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, a phase-locked loop (PLL) frequency synthesizer is disclosed having a voltage controlled oscillator (VCO) with a variable capacitance that includes a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance, and the continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance. In a more general terms, a frequency synthesizer is disclosed having a first variable and a second capacitance circuits and frequency control circuitry to coarsely tune the output frequency by adjusting the first control signal and to finely tune the output frequency by adjusting the second control signal.

Abstract: The present invention includes a Voltage Controlled Oscillator (VCO) having a resonant circuit capable of being quickly switched between two resonant frequencies in order to generate two different LO frequencies. In a preferred embodiment, the present invention includes a VCO having a dual-frequency resonant circuit attached to the VCO's resonant circuit input leads. The dual-frequency resonant circuit is constructed in a differential architecture in order to create a number "virtual ground" points within the circuit that nearly eliminate any ground currents, and thus minimize the time required to switch the resonant circuit between the two LO frequencies. The switching between two resonant frequencies is achieved by creating a short circuit across certain components within the circuit to eliminate them from the resonant circuit.

Abstract: Phase noise in an RF oscillator is significantly reduced by loosely couping another quieter RF oscillator having noise patterns uncorrelated to the first RF oscillator so that it frequency locks with the first RF oscillator. The coupling is increased until a significant reduction in phase noise occurs at high coupling levels where the first RF oscillator displays phase noise similar to the the second RF oscillator.

Abstract: This invention relates to the field of electrical technology, and relates particularly to a method for the continuous transformation of electrical energy with its subsequent transmission from an initial source (transformer) to a consuming device, and also to an apparatus for the implementation of this method of transformation and the supplying of power to electrical devices through a transmission line which does not form a closed circuit, ie consists of a single conducting wire.

Abstract: An oscillator having an adjustable output frequency comprises a resonator, an inverting amplifier coupled to the resonator, a variable capacitance coupled to the resonator and to the amplifier, and a shift register coupled to the variable capacitance. The variable capacitance comprises a first bank of switchable capacitors coupled to an input of the oscillator and a second bank of switchable capacitors coupled to an output of the oscillator. The shift register includes a plurality of bits and is configured such that the logic state of each bit determines the switching state of a corresponding capacitor from each bank of switchable capacitors. By shifting the bits in the shift register, the variable capacitance is varied, causing an adjustment in the output frequency of the oscillator.

Abstract: An oscillator comprises an active device with a phase shift of less than 180 degrees. A first delay line has first and second ends. The first end of the first delay line is coupled to an active port of the active device. A ring mode trap filter is coupled to the second end of the first delay line. A second delay line has first and second ends. The first end of the second delay line is coupled to the ring mode trap filter. The second end of the second delay line is coupled to a resonance means. The total delay of the first and second delay lines allows the resonance means to oscillate at its natural frequency in spite of the less-than-180-degree phase shift of the active device.

Abstract: A multi-band phase lock loop (PLL) device for use in a communication system. The PLL comprises a frequency reference oscillator, a reference frequency divider, a phase and frequency detector, a filter and compensation circuit, a microcontroller, a multi-band voltage controlled oscillator (VCO), and a feedback divider. A fast feedback signal is provided to the VCO for phase locking operation. A slow feedback signal is used by the microcontroller to generate a frequency adjust signal for frequency band centering for the VCO. The microcontroller also controls the VCO to change the frequency band of operation. The PLL device may be used in a communication system that operate in both the cellular frequency band and the PCS frequency band.

Abstract: A PLL circuit of which pull-in time is reduced. The PLL circuit comprises a voltage controlled oscillator; a frequency divider which divides the frequency of the output signal from the voltage controlled oscillator; a phase detector which compares the phase of a standard signal and the frequency-divided signal and outputs an advanced phase signal and a delayed phase signal; a charge pump which charges and discharges a capacitor in a low pass filter, depending upon the advanced/delayed phase signals; a voltage supplier which supplies the control terminal of the voltage controlled oscillator with a voltage which corresponds to the desired voltage decided by the different output frequencies of the voltage controlled oscillator, when the output of the low pass filter is not virtually connected with the control terminal of the voltage controlled oscillator.

Abstract: A PLL (phase locked loop) oscillator suitable as a clock signal source for use in a computer system or the like includes a piezoelectric resonator, an oscillating circuit for generating an oscillating signal in cooperation with the piezoelectric resonator, and a PLL circuit which operates using the oscillating signal generated by the oscillating circuit as a reference signal, all these elements being housed in a package, the frequency of the output signal of the PLL oscillator being determined by the oscillation frequency of the oscillating circuit and the frequency dividing ratio of a programmable frequency divider in the PLL circuit, wherein the frequency dividing ratio of the programmable frequency divider is set by writing the data representing the frequency dividing ratio into a programmable read only memory thereby setting the output frequency to a desired value.

Abstract: A voltage control oscillator capable of obtaining the desired output voltage by lowering the higher order harmonic level, is provided. Further, in the voltage control oscillator, a resonance circuit achieves the resonance by switching two different resonance frequencies. Moreover, inductors of a matching circuit are selectively used to change the inductance by turning on/turning off a diode of an impedance regulation circuit according to the respectively switched frequencies. Furthermore, the synthesized impedance with a matching capacitor is changed to achieve the matching with each of two frequencies.

Abstract: A controllable reactance implemented within an integrated circuit includes a first sub-circuit (20) comprising a reactive element, for example a capacitor 12, coupled in series with a transistor (14). A controllable current source (16) injects a controllable bias current through the transistor (14) to vary the effective resistance of the transistor (14) and hence the effective complex impedance of the capacitor combination. A second transistor (18) amplifies the current to increase the effective capacitance. Preferably, a second sub-circuit (24) includes corresponding components (26, 28, 30) to mirror the real component of the current flowing in the first sub-circuit (20), and transistors (32 and 34) to reflect an inverse current to the coupling node line (22) to cancel the real component of the current at the node, to thus simulate a purely capacitive circuit. An oscillator embodying this circuit is also disclosed.

Abstract: A digitally-controlled oscillator (DCO) (60), such as may be used in clock generator or clock recovery circuitry in an integrated circuit, is disclosed. The disclosed DCO (60) is a single-stage oscillator including a variable load implemented as a binary-weighted array of switched capacitors (40). Each of capacitors (40) has a plate connected to a common node (X), and a plate that receives a signal corresponding to one bit of a digital control word (DCOCW). The common capacitor node (X) is also connected to the input of a Schmitt trigger (42) that produces the output clock signal (OUTCLK) and a feedback signal that is applied to logic (38, 39) that inverts the common node of the capacitors (40). The switching time at the input of Schmitt trigger (42) depends upon the variable load presented by the array of switched capacitors (40), which is controlled by the digital control word (DCOCW). As a result, the clock signal (OUTCLK) is digitally synthesized by a single stage of the DCO (60).

Abstract: A microprocessor includes an on-chip low phase noise CMOS LC capacitance oscillator. The LC oscillator is relatively insensitive to power supply fluctuations. In addition, the LC oscillator is operable over a range of frequencies sufficient to support both normal full power operation, and reduced power operation of the microprocessor. The LC oscillator minimizes clock jitter problems and so permits extension of the microprocessor operating frequency to even higher levels than heretofore were possible. An output signal from a phase-frequency detector is a frequency control signal on a frequency control input line of a level converter and filter circuit of the LC oscillator. The output signal from level converter and filter circuit is a filtered frequency control signal on a control voltage input line to a continuously modifiable gigahertz frequency voltage controlled oscillator (VCO) circuit.

Abstract: A Colpitts-type voltage-controlled oscillator includes a transistor having a collector which is connected to a power terminal through a stripline. A capacitor is connected between the collector and the emitter thereof. A diode is connected to the capacitor and an inductor is connected to a point between the capacitor and diode. Another capacitor is connected between the base and the emitter of the transistor. An inductive reactance is formed by a stripline which is connected between the base of the transistor and the ground, two capacitors for DC blocking, and a variable-capacitance diode. Bypass capacitors are connected between the collector of the transistor and the ground. A resistor is connected between the emitter of the transistor and the ground. Two other resistors are provided for dividing a power voltage at the power terminal and for supplying a base voltage to the transistor. Turning the diode on and off allows the oscillating frequency of the voltage-controlled oscillator to vary by a large amount.

Abstract: A digital temperature compensation oscillator by which its AFC operation to a receive signal cannot be disturbed by temperature compensation operation. A digital temperature compensation oscillator comprises a temperature sensor, an address creating section, a ROM, latching means, and a voltage-controlled crystal oscillator. The temperature sensor produces an output signal varied according to ambient temperatures. The address creating section converts an output from the temperature sensor into a signal and then creating it as a ROM (read-only memory) address. The ROM stores a control voltage to compensate a frequency variation due to ambient temperatures of a voltage-controlled crystal oscillator. The latching means holds or passes data output from the ROM according to an external control signal. The D/A converter produces a control voltage for the voltage-controlled crystal oscillator according to the latching means.

Abstract: A voltage controlled oscillator for wide tuning range of frequency with less phase noise has a bipolar transistor provided with a positive feedback circuit between a base and an emitter of the transistor, an impedance matching circuit coupled with a collector of the transistor and an output terminal, a resistor coupled between the base of the transistor and a control source which provides control voltage for adjusting oscillation frequency of the oscillator. The base of the transistor shows capacitive negative impedance, and an inductive element is coupled with the base of the transistor for oscillation. The emitter of the transistor is grounded for D.C. voltage through an inductor or a transmission line, or coupled with a control voltage.

Abstract: A canceler loop is used to provide negative feedback to a crystal oscillator to reduce the effects of shock and vibration on the spectral purity of the crystal oscillator. The canceler loop demodulates the output of the crystal oscillator and supplied a stabilizing voltage representative of the demodulated output to cancel frequency modulation induced by shock and vibration. The stabilizing voltage is used to cancel the noise sidebands of the frequency spectrum of the crystal oscillator output without tuning the center frequency.

Abstract: The object of this invention is an oscillation circuit that increases the Q of the parallel resonance circuit and increases the C/N (carrier-to-noise) ratio. The oscillation circuit contains two feedback capacitors connected between the base and emitter and between the emitter and collector of a transistor. Two inductors are also connected in series between the base and the collector of the transistor. One end of a resistor is connected to the emitter of the transistor and the other end is connected between the two inductors. The feedback capacitors and inductors constitute a parallel resonance circuit that may be tuned to create an equipotential across the ends of the resistor so that no current flows through it thus increasing both Q and the C/N ratio.

Abstract: An oscillation circuit comprises a surface acoustic wave resonance device of the single port type, an active circuit portion with which the surface acoustic wave resonance device is connected so that a signal feedback from the active circuit portion to the surface acoustic wave resonance device is carried out, an inductive element connected substantially in parallel with the surface acoustic wave resonance device, and a damping portion connected with one or both of the inductive element and the surface acoustic wave resonance device for suppressing parasitic oscillations caused by coaction between the inductive element and stray capacitance accompanying the surface acoustic wave resonance device.

Abstract: A voltage controlled oscillator (10) operable on two widely separated frequency bands of 800 MHz and 1.9 GHz, for example. The two operable frequency modes are controlled by changing base bias voltages on at least two transistors with commonly connected emitters. A base circuit of each transistor is connected to an independent resonator and tuning element and shares a common feedback reactance. By increasing a base bias voltage of first transistor relative the a second transistor, an associated first base circuit is turned on and allowed to oscillate at a first frequency while a second base circuit is turned off preventing oscillation at a second frequency. Correspondingly, by decreasing the base bias voltage the first base circuit is turned off and the second base circuit is turned on. The transistors share a common collector connection and output providing either one of the two frequencies.

Abstract: A frequency locked loop (FLL) having an oscillator whose output frequency controls the amount of charge provided by a switched feedback capacitor to a charge integrator whose output voltage controls the frequency of the oscillator. A switched reference capacitor provides a charge to the charge integrator which is a function of a reference frequency, so that the oscillator output frequency is a function of a product of the reference frequency times a ratio of the capacitance of the reference capacitor to the capacitance of the feedback capacitor. Plural reference capacitors, each responsive to a respective reference frequency may be provided so that the oscillator output frequency can be related to the sums or differences of the reference frequencies, the ratios of capacitors, the ratio of the reference voltages or a fixed multiplication factor.

Abstract: A voltage controlled oscillator has an active circuit, a resonant circuit coupled to the input node of the active circuit and an adjustable impedance circuit coupled to an output node of the active circuit. The impedance of the adjustable impedance circuit may be altered to tune the oscillation frequency of the oscillator. In one embodiment, the adjustable impedance circuit includes a varactor diode in series with a capacitor and means for varying the voltage across the varactor diode. An isolation circuit is coupled to an output node of the active circuit. In one embodiment, the isolation circuit is connected to a different output node than the adjustable impedance circuit is connected to.

Abstract: This single voltage controlled oscillator for a PLL circuit has two control loops: a low noise ration is maintained by a main loop; while a wide frequency capture range is ensured by a sub-loop controlled by a one-chip microcomputer. The main control loop is a low gain loop with a narrow capture range that compares the phase of the output of the PLL circuit with the phase of a horizontal synchronous video signal supplied to a LCD display. The sub-loop is a high gain loop with a broad frequency range that includes a processor that monitors the lock on the main loop. When the lock is broken, the processor increments or decrements the voltage supplied to this sub-loop in one or more steps until the lock is reestablished, and the PLL circuit is again operating within the narrow capture range of the low gain loop.

Abstract: The system includes various circuit units each having a capacitor and a charging circuit for defining a quantity depending upon the ratio (I/C) between the charging current and the capacitance of the capacitors. In order to compensate automatically for deviations of the actual capacitances from the nominal capacitances due to fluctuations in the parameters of the integrated-circuit manufacturing process, the system has a phase-locked loop which uses one of the circuit units as an adjustable oscillator, and current transducer means which regulates the charging currents of the capacitors of the circuit units in dependence on the regulated charging current of the capacitor of the oscillator, or the error current of the PLL loop.

Abstract: The invention relates to a digitally adjustable crystal oscillator having a quartz crystal and a monolithic integrated oscillator circuit including a series combination of a first frequency-adjusting capacitor C1 and a second frequency-adjusting capacitor C2 connected in parallel with the quartz crystal and comprising parallel-connected first capacitance stages and parallel-connected second capacitance stages, respectively, and an inverter circuit connected in parallel with the quartz crystal and comprising a feedback resistor R.sub.K, the output of the innverter circuit being connected to a load resistor. The inverter circuit comprises parallel-connected inverter stages, and switching elements are provided within the inverter stages and cqapacitor stages in such a way that a respective one of the inverter stages as well as a first capacitance stage C.sub.1i and a second capacitance stage C.sub.2i are switchable into or out of circuit by means of a control signal I.sub.i.

Abstract: Device of the phase-locked loop type for demodulating a frequency-modulated signal. Device for frequency demodulation, using a phase-locked loop. According to the invention, for linearizing the variation of the frequency of a local oscillator (11) as a function of its control signal (Vb), a variable capacitance (Cv) is formed by an electronic module (20) which supplies the equivalent of a capacitance whose variation as a function of the control voltage (Vb) has a linearity deviation which is established for compensating the linearity deviation of the frequency of the oscillator as a function of the value of the capacitance (Cv).

Abstract: The present invention provides for a voltage-controlled crystal oscillator (VCXO) which, other than the crystal itself, is full integrated. The VCXO has a pre-amplifier block, a gain stage, a first MOS transistor, a first capacitor, a second MOS transistor, and a one second capacitor. The pre-amplifier block receives an input tuning voltage and the gain stage is connected across the terminals of the oscillating crystal. The first MOS transistor and first capacitor are connected between one of the terminals of the oscillating crystal and a reference voltage. The second MOS transistor and the second capacitor are connected between the second crystal terminal and the reference voltage. The gates of both MOS transistors are connected to the output node of the pre-amplifier block. The first and second MOS transistors connect the first and second capacitors to the first and second terminals of the gain stage for a portion of the time responsive to the input tuning voltage.

Abstract: A variable-frequency oscillator configuration, in particular for tuners, includes a feedback network for an oscillator amplifier. The feedback network contains a series circuit formed by two resonant circuit inductors and a resonant circuit capacitor, connected in parallel with a series circuit formed by a further resonant circuit capacitor and a variable capacitor. A switching device is connected to a coupling node between the two inductors, for short circuiting the first resonant circuit capacitor and the resonant circuit inductor connected thereto under the control of a switching signal. The feedback network can consequently be switched over between two frequency bands and is symmetrical with regard to the high-frequency effect.

Abstract: An oscillation circuit using a quartz oscillator. When the output level of the oscillation circuit falls, this output level change is detected and the reactance of the quartz oscillator is changed such that the circuit oscillates at a frequency which reduces the resistance of the oscillator. Hence, the oscillation of the circuit does not fall in level or stop regardless of temperature and other ambient conditions.

Abstract: Voltage controlled oscillator (VCO) circuits include a VCO and voltage regulator provided on an integrated VCO module, balanced control input for the VCO, buffering of the VCO and frequency multiplication of the VCO output signal. Such improved VCO circuits are especially useful in phase-locked loop (PLL) circuits. Improved PLL circuits are also provided, including a PLL circuit with separate analog and digital grounds.

Abstract: A system and method for establishing the frequency of a voltage controlled oscillator ("VCO") within narrowly defined frequency bands. The resonant circuit of the VCO uses selectable elements, such as varactor diodes, to establish the operating frequency band. The control voltage of the VCO is varied within a voltage range to adjust the VCO output frequency. A phase detector compares the VCO output to a reference signal. If the phase detector determines that there is an imbalance between the VCO output and the reference signal, then it produces a signal which indicates whether the VCO frequency should be increased or decreased to match the reference signal frequency. If the control voltage is outside of the voltage range, then the system allows the operating frequency band to be changed by varying the number of selectable elements in response to the phase detector signal.

Abstract: The correction circuit comprises a first quadrature phase comparator intended to receive as input two signals which are desired to be in quadrature and to have equal amplitudes. Phase adjustment means are firstly intended to correct the phase of at least one of the signal to re-establish a phase difference of 90.degree. therebetween. The correction circuit further comprises means to effectuate the sum and the difference of the signals which it receives as input and to supply the sum and the difference to a second quadrature phase comparator intended to supply as output a second error signal representative of the difference of the effective phase shift of these calculated signals and 90.degree.. The second error signal is finally supplied to amplitude adjustment means intended to correct the amplitude of at least one of said signals.

Abstract: A VCO circuit has a voltage variable capacitance CVD2 connected in series with or in parallel to a condenser C3 connected in series with an inductance L1, which constitutes a resonator of the VCO circuit. An adjustment voltage VD2 is applied to a cathode of the voltage variable capacitance CVD2, such that the relation between a control voltage VD1 and an oscillation frequency f0 of the VCO circuit is electrically adjusted to improve the fabrication yield.

Abstract: A pullable overtone crystal oscillator (201) includes an impedance buffer (217) for buffering an input impedance (109) to an amplifier stage (203). This structure enables construction of an overtone oscillator with increased pullability because a drive level of a crystal (221) can be set independent of the input impedance (109) of the amplifier stage (203).

Abstract: A first oscillator includes: a ring resonator; an oscillation circuit having a negative resistance active circuit coupled to a first point on the ring resonator for oscillating at an oscillation frequency and resonating the resonator; an output terminal, coupled to a second point on the ring resonator where a voltage is substantially zero with respect to the predetermined frequency when the ring resonator resonates, for outputting a resonant frequency signal, wherein even order harmonic components are outputted with the fundamental component suppressed. A second oscillator includes a ring resonator having points A to D equidistantly dividing the ring resonator, first and second oscillation circuits coupled to the points A and B respectively, first and second grounding capacitors having capacitance equivalent to those of the first and second oscillation circuits. Thus, two independent oscillators which do not affect each other are provided with a single resonator.

Abstract: The object of the invention is a voltage controlled oscillator with improved tuning linearity, which comprises an oscillating transistor (T, 1), a resonator circuit (C11, C12, 11, 12, 19, 20) formed by a capacitance diode (D, 20) and an inductance (L1, 19), whereby the resonator circuit is connected to one of the transistor's (T, 1) electrodes and defines together with the transistor's internal capacitance and external capacitances the oscillator output frequency provided by the transistor. The output frequency can be changed with an external control voltage (V.sub.cntrl) supplied to the cathode of the capacitance diode (D, 20), the control voltage having minimum and maximum values, whereby the oscillator output frequency (f.sub.vco) is arranged to change within a certain frequency band in accordance with the control voltage (V.sub.cntrl). The resonance circuit (RES) is arranged at the current draining electrode (collector) of the transistor to have an effect on the linearity between the control voltage (V.

Abstract: A differential delay stage for a ring oscillator utilizes a resonant circuit formed by an inductor and a capacitor consisting of two varactor diodes connected back-to-back. A common cathode connection is connected to a variable voltage source to vary the capacitance of the diodes. Other forms of capacitors may replace the varactor diodes. Varying the capacitance value varies the resulting oscillation frequency of the ring oscillator. When several delay stages, each incorporating the resonant circuit, are connected together in a ring, the net effect is to allow only a signal at the resonant frequency of the resonant circuits to propagate around the ring. Other oscillator circuits employing a resonant circuit are disclosed.

Abstract: A voltage control oscillator which has an oscillator circuit comprising at least an inductive resonator, active element, and variable capacitance diode and externally applies a direct current control voltage to the variable capacitance diode through a bias circuit to change an oscillation frequency by altering a capacitance value of the variable capacitance diode with variations of the direct current voltage, comprising bias circuit is a low-pass filter comprising a resistor and a capacitor and the oscillation frequency is set higher than a cut-off frequency of the low-pass filter.

Abstract: In accordance with a loop open/close control signal, an analog switch closes or opens a loop including a voltage controlled oscillator, a variable frequency divider, a phase comparator, and a first loop filter, the analog switch, and a second loop filter. In order to reduce the change of frequency caused when the open loop state is set immediately after the output frequency is changed, the second loop filter uses a capacitor which shows properties of a small change of capacitance in response to an applied voltage and a small hysteresis. In another embodiment, the voltage controlled oscillator includes a second diode, one terminal of which is grounded, connected in reverses parallel to a first diode switch which switches the output oscillation frequency ranges of the voltage controlled oscillator.

Abstract: A transceiver (10) includes a dual port phase and magnitude balanced synthesizer modulator (60). The modulator (60) couples a modulation input to a voltage controlled oscillator (40) and to a reference oscillator (42) that are coupled together in a phase locked loop (44). The modulator 60 includes a magnitude balancing circuit (64) that divides a modulation input representing data or the like into a first modulation input signal applied to the reference oscillator (42) and a second modulation input signal for the voltage controlled oscillator (40). A phase balancing circuit (68) induces a negative phase shift in the second modulation input signal that is coupled to the voltage controlled oscillator (40) in order to compensate for the phase lag of the reference oscillator loop (44).

Abstract: A digital control system such as a digital temperature compensated crystal oscillator (DTCXO) system is arranged to offer superior oscillating performance with reduced size and cost. For example, to reduce the memory capacity, a memory 31 receives upper 6 bits of temperature data, and a decoder 32 calculates temperature compensation data from lower 4 bits and output data from the memory (FIGS. 1-11). For a one-chip configuration and low power consumption, a MOS type Colpitts oscillator (FIG. 16) is provided with a circuit for adjusting the source resistance of the MOS. For size reduction and fine frequency adjustment, a DTCXO is provided with sections such as an adder 341, an up-down counter 342 and an auxiliary frequency control section (AFC) 332 (FIGS. 20, 21, 24 and 25). An adding section 415 is provided between a D/A converting section 414 and a capacitance varying section 416 to obtain superior linearity with respect to a control voltage and quality of offset.

Abstract: An impedance adjustment capacitor connected in parallel to a choke coil formed by a conductive pattern formed on a substrate adjusts the impedance of a control voltage applying circuit. A control voltage is applied via the choke coil to a variable capacitance diode included in a resonance circuit. This control voltage determines a resonance frequency.

Abstract: Oscillation is easily and reliably initiated in an oscillator by increasing the gain of the circuit at startup time. For example, the gain of an oscillator circuit may be increased at startup by reducing the value of a user controlled impedance until oscillation commences. Alternatively, or in combination, the input impedance of an amplifier used in the oscillator may be reduced at startup to facilitate the initiation of oscillation.

Abstract: An oscillator arranged to operate at an oscillation frequency includes a resonant structure 137, preferably a coaxial resonator, selected to resonate at a frequency, and an impedance 210, preferably a transistor 101 based common collector circuit, parallel coupled to said resonant structure 137, having a negative real part with a real magnitude and an imaginary part with an imaginary magnitude, said real magnitude being a function of said imaginary magnitude, said imaginary magnitude selected such that said real magnitude falls within 50% of a maximum at the oscillation frequency.

Abstract: A modulator for digital modulation is described to produce a modulated output from a voltage controlled oscillator in a phase locked loop during transmission of a random modulating input. The input voltage is applied to a coupling capacitor and when transmission ceases, the state of charge on the capacitor will not change because of a biasing circuit which comprises two resistors fed by a tri-state buffer which holds the input terminal of the capacitor at the average level between logic zero and logic one when no modulation is applied.