Selectively Connected To Common Output Or Oscillator Substitution Patents (Class 331/49)
  • Patent number: 9557358
    Abstract: Embodiments of this invention include a test and measurement instrument and associated methods for acquiring and stitching wide overlapped non-uniform frequency bands so that a user specified band can be efficiently displayed and analyzed. The test and measurement instrument includes a user interface to receive the user specified frequency span. Acquisition circuitry acquires one or more predefined frequency bands having non-uniform overlapping frequency ranges. A frequency band processing section can decimate the acquired frequency bands, mask the acquired frequency bands, and stitch the masked frequency bands together. A display section displays the user specified frequency span using the stitched frequency bands. Due to the overlap configuration of the wide non-uniform bands, any user specified span between 50 kHz and 6 GHz, or thereabout, can be covered by two bands.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: January 31, 2017
    Assignee: TEKTRONIX, INC.
    Inventor: Benjamin A. Ward
  • Patent number: 9461623
    Abstract: A method and a circuit for generating a clock signal from a clock integrated circuit are introduced herein. A compensation voltage is generated according to a temperature coefficient of a resistor and a clock period of a clock circuit, where the compensation voltage is resistor-corner independent. The clock period of the clock circuit is determined by the resistor and at least one capacitor of the clock circuit. The temperature dependence of the clock period of the clock circuit is reduced according to the compensation voltage.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: October 4, 2016
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Hsien-Hung Wu, Yi-Ching Liu, Shin-Jang Shen
  • Patent number: 9407202
    Abstract: The present invention provides a spin-transfer torque type injection locking oscillator which improves both power and noise performance by using pair of spin-transfer torque devices. One is optimized for high power and the other is optimized for low noise characteristics. The output signal of the low noise spin-transfer torque device is injected into the high output power spin-transfer torque for phase locking. The present invention has several advantages such as the miniaturization, the high quality and low cost, and the mass production of integrated chips by the nanoscale.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: August 2, 2016
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: ChulSoon Park, SeongJun Cho
  • Patent number: 9343793
    Abstract: A millimeter wave bands semiconductor package includes a metal base body, a circuit board, and a metal cover body. The base body has a first penetration hole and a second penetration hole. The circuit board is disposed on the base body and has an input signal line and an output signal line on a front side surface thereof. The cover body is disposed on the circuit board and has a first non-penetration hole and a second non-penetration hole. The cover body is disposed such that the first non-penetration hole is disposed directly above the first penetration hole of the base body and the second non-penetration hole is disposed directly above the second penetration hole of the base body. Further, the first non-penetration hole and the first penetration hole constitute a first waveguide and the second non-penetration hole and the second penetration hole constitute a second waveguide.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: May 17, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazutaka Takagi
  • Patent number: 9109936
    Abstract: A measuring device electronics comprises a processor and two clock signal generators. One clock signal generator serves for producing a working clock signal, and also for producing a reference clock signal which is dependant on the working clock signal. The other clock signal generator, serves for producing a second reference clock signal, which is independent of the working clock signal. Based on the two independent reference clock signals, a frequency difference, can, to the extent that such is present, be ascertained during operation of the measuring device electronics or of the measuring device formed therewith. The frequency difference, represents a difference between the instantaneous clocking frequency of the first reference clock signal and the instantaneous clocking frequency of the second reference clock signal, and, in this respect, represents a measure for a deviation of an instantaneous clocking frequency, from the nominally predetermined clocking frequency, of the working clock signal.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: August 18, 2015
    Assignee: ENDRESS + HAUSER FLOWTEC AG
    Inventors: Wolfgang Drahm, Gernot Engstler, Hans Pohl, Christian Matt, Robert Lalla, Matthias Brudermann
  • Patent number: 9048783
    Abstract: In accordance with an embodiment of the disclosure, circuits and methods are provided for using a reconfigurable voltage controlled oscillator to support multi-mode applications. A voltage control oscillator circuit comprises a resonant circuit, a first oscillator circuitry coupled to the resonant circuit, and a second oscillator circuitry coupled to the resonant circuit. The voltage control oscillator circuit further comprises switching circuitry configured to select, based on an operating metric, one of the first oscillator circuitry and the second oscillator circuitry for providing an output voltage.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: June 2, 2015
    Assignee: Marvell World Trade Ltd.
    Inventors: Antonio Liscidini, Luca Fanori, Rinaldo Castello, Alessandro Venca
  • Patent number: 9041475
    Abstract: A method of controlling an integrated circuit chip including first and second clock sources, the first clock source being more thermally stable and having a higher power consumption, the integrated circuit chip being operable in a first mode in which the first clock source is inactive and the second clock source active and in a second mode in which the first and second clock sources are active, the method including operating the integrated circuit chip in the first mode; taking a measurement indicative of temperature; if the measurement indicates that the temperature is outside of a temperature band: activating the first clock source so as to operate the integrated circuit chip in the second mode; recalibrating the second clock source against the first clock source; and following the recalibration, deactivating the first clock source so as to return the integrated circuit chip to the first mode.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: May 26, 2015
    Assignee: Cambridge Silicon Radio Limited
    Inventor: Peter Andrew Rees Williams
  • Patent number: 9000849
    Abstract: A phase-modification circuit is described. This phase-modification circuit reduces jitter by injecting a divided reference clock in a phase-locked loop from an auxiliary oscillator and by effectively gradually and completely transferring its phase to a master oscillator. The phase-correction strength in the phase-modification circuit is increased by successively coupling an edge in the divided reference clock over many cycles of a clock in the master oscillator. By increasing the correction strength, the phase error is effectively nulled out, thereby reducing the total absolute peak jitter. Moreover, because the correction is gradual and successive, the phase-modification circuit also significantly reduces the cycle-to-cycle jitter and half-cycle or edge jitter.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: April 7, 2015
    Assignee: Oracle International Corporation
    Inventors: Suwen Yang, Frankie Y. Liu
  • Patent number: 8975972
    Abstract: An oscillator system includes a first oscillator, a second oscillator, and a changeover component. The first oscillator is configured to generate a first signal at a selected frequency. The second oscillator is configured to generate a second signal at about the selected frequency. The changeover component is configured to generate a changeover output signal according to the first signal and the second signal.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: March 10, 2015
    Assignee: Infineon Technologies AG
    Inventors: Michael Aichner, Mattias Welponer Bachmayer, Martin Flatscher
  • Patent number: 8933757
    Abstract: A voltage controlled oscillator (VCO) with low phase noise and a sharp output spectrum is desirable. The present disclosure provides embodiments of LC tank VCOs that generate output signals with less phase noise compared with conventional LC tank VCOs, while at the same time limiting additional cost, size, and/or power. The embodiments of the present disclosure can be used, for example, in wired or wireless communication systems that require low-phase noise oscillator signals for performing up-conversion and/or down-conversion.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: January 13, 2015
    Assignee: Broadcom Corporation
    Inventors: Farid Shirinfar, Tirdad Sowlati, Maryam Rofougaran, Ahmadreza Rofougaran
  • Publication number: 20140312982
    Abstract: A phase-modification circuit is described. This phase-modification circuit reduces jitter by injecting a divided reference clock in a phase-locked loop from an auxiliary oscillator and by effectively gradually and completely transferring its phase to a master oscillator. The phase-correction strength in the phase-modification circuit is increased by successively coupling an edge in the divided reference clock over many cycles of a clock in the master oscillator. By increasing the correction strength, the phase error is effectively nulled out, thereby reducing the total absolute peak jitter. Moreover, because the correction is gradual and successive, the phase-modification circuit also significantly reduces the cycle-to-cycle jitter and half-cycle or edge jitter.
    Type: Application
    Filed: August 27, 2013
    Publication date: October 23, 2014
    Applicant: Oracle International Corporation
    Inventors: Suwen Yang, Frankie Y. Liu
  • Patent number: 8766731
    Abstract: The present invention is directed to an oscillator circuit comprising an oscillator input for providing an input signal, a first integrator circuit comprising a first integrator capacitor and a first integrator output, a comparator, a discharge circuit for discharging said first integrator capacitor once per cycle of said oscillator circuit, and an oscillator output for providing an output signal, wherein said oscillator circuit further comprises a second integrator circuit comprising a second integrator capacitor and a second integrator output, and wherein said oscillator circuit is arranged for allowing said input signal to be subsequently integrated by said first and second integrator circuit in an alternating manner, and for providing said integrated output signal of said first and second integrator circuit subsequently to said comparator in said alternating manner.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: July 1, 2014
    Assignee: Anagear B.V.
    Inventors: Petrus Johannes Maria Kamp, Hermanus Johannes Nijrolder
  • Patent number: 8766730
    Abstract: A frequency tunable signal source (100) with first (105) and a second (115, 315) oscillators, each of which outputs a signal at a fundamental frequency (f1, f2) and at least one signal at a harmonic frequency (f1?, f2?) and a mixer (120) with first (121) and second (122) input ports and an output port (124), and a control unit (110) which controls switches (S1, S2, S3, S4), by means of which two of said signals (f1, f2, f1?, f2?) are switchably connected to the first input port. The other two signals are switchably to the other input port, with one switch (S1, S2, S3, S4) for each signal (f1, f2, f1?, f2?). There is also comprised a third oscillator (125), with an output signal connected to a third input port (123) of the mixer (120). At least one of the oscillators (105, 115, 315, 125) is a VCO, a Voltage Controlled Oscillator.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: July 1, 2014
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Mingquan Bao, Herbert Zirath
  • Patent number: 8698565
    Abstract: A method and apparatus is disclosed for voltage-controlled oscillator selection in a multi-mode system having multiple voltage-controlled oscillators. Part of oscillator selection is a calibration operation that utilizes maximum and minimum capacitance limits for a voltage-controlled oscillator, which translates to a frequency range, to calculate overlap regions. Overlap regions comprise frequency ranges that overlap such that the overlap region may be generated by two voltage-controlled oscillators with adjacent frequency ranges. One voltage-controlled oscillator selection routine comprises a real time voltage-controlled oscillator calibration and selection routine that executes every time the system requests a new frequency. Another selection routine comprises a start-up routine that executes only at power up or periodically.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: April 15, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventors: Thomas Obkircher, Bipul Agarwal, Georgi Taskov
  • Patent number: 8686805
    Abstract: The disclosure relates to an oscillator for use in generating frequencies in a frequency synthesizer, comprising: a first inductor element forming a metal trace loop with at least one turn, and a first capacitive circuit arranged to form a first resonance circuit with the first inductor element and being connected to the first inductor element through at least one first connection terminal, wherein the first capacitive circuit comprises at least one capacitive element and an electrical components arrangement arranged to establish and maintain an oscillation.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: April 1, 2014
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventor: Tomas Nylén
  • Patent number: 8669824
    Abstract: An oscillation circuit includes a plurality of MEMS vibrators each having a first terminal and a second terminal, and having respective resonant frequencies different from each other, an amplifier circuit (an inverting amplifier circuit) having an input terminal and an output terminal, and a connection circuit adapted to connect the first terminal of one of the MEMS vibrators and the input terminal to each other, and the second terminal of the MEMS vibrator and the output terminal to each other to thereby connect the one of the MEMS vibrators and the amplifier circuit (the inverting amplifier circuit) to each other.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: March 11, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Aritsugu Yajima
  • Patent number: 8648663
    Abstract: An oscillator includes: a plurality of MEMS vibrators each having a first terminal and a second terminal, and having respective resonant frequencies different from each other; an amplifier circuit having an input terminal and an output terminal; a connection circuit adapted to connect the first terminal of one of the MEMS vibrators and the input terminal to each other, and the second terminal of the one of the MEMS vibrators and the output terminal to each other; a signal reception terminal adapted to receive a switching signal used to switch a state of the connection circuit; and a switching circuit adapted to make the connection circuit switch the MEMS vibrator to be connected to the amplifier circuit based on the switching signal, wherein the MEMS vibrators are housed in an inside of a cavity, and the signal reception terminal is disposed outside the cavity.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: February 11, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Aritsugu Yajima
  • Publication number: 20140009234
    Abstract: An oscillator system includes a first oscillator, a second oscillator, and a changeover component. The first oscillator is configured to generate a first signal at a selected frequency. The second oscillator is configured to generate a second signal at about the selected frequency. The changeover component is configured to generate a changeover output signal according to the first signal and the second signal.
    Type: Application
    Filed: July 5, 2012
    Publication date: January 9, 2014
    Applicant: Infineon Technologies AG
    Inventors: Michael Aichner, Mattias Welponer Bachmayer, Martin Flatscher
  • Patent number: 8610511
    Abstract: The high-frequency digitally controlled oscillator includes fully digital cells capable of being ported to any CMOS fabrication process. The oscillator has a basic modular architecture comprising a digitally controlled digital ring oscillator (DRO) having a plurality of delay stages, a counter divider and a selection multiplexer. The DRO generates the basic (intrinsic) high frequency range and the counter provides the remaining ranges through division by multiples of two. The multiplexer provides a selection mechanism for the required range of frequencies. Load capacitances to the delay stages are added/removed to control delay via utilization of a unique capacitive cell driven synchronously by two ring oscillators such that the capacitance could be added or removed utilizing the Miller effect. Moreover, multiple capacitive load cells can be added to the same stage.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: December 17, 2013
    Assignees: King Fahd University of Petroleum and Minerals, King Abdulaziz City for Science and Technology
    Inventor: Muhammad E. S. Elrabaa
  • Patent number: 8598956
    Abstract: A device is provided having a local oscillator (LO) configured to generate a first signal comprising at least one of timing information, frequency information, phase information and combinations thereof. The device also has a LO error corrector comprising an input, the input configured to receive a second signal comprising at least one of timing information, frequency information, phase information and combinations thereof. The second signal is used for disciplining the LO. The LO error corrector is capable of disciplining the LO using a source that is less accurate than a preferred second signal, if the preferred second signal is unavailable to discipline the LO.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: December 3, 2013
    Assignee: Apple Inc.
    Inventor: Russell Smiley
  • Patent number: 8547178
    Abstract: A ring oscillator is disclosed. The ring oscillator includes a first tri-path inverter, a second tri-path inverter and a third tri-path inverter. The second tri-path inverter is connected to the first tri-path inverter. The third tri-path inverter is connected to the first and second tri-path inverters to provide feedback for oscillations.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: October 1, 2013
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Neil E. Wood, Patrick Fleming, Andrew T. Kelly, Bin Li, Daniel M. Pirkl
  • Publication number: 20130222070
    Abstract: In accordance with an embodiment of the disclosure, circuits and methods are provided for using a reconfigurable voltage controlled oscillator to support multi-mode applications. A voltage control oscillator circuit comprises a resonant circuit, a first oscillator circuitry coupled to the resonant circuit, and a second oscillator circuitry coupled to the resonant circuit. The voltage control oscillator circuit further comprises switching circuitry configured to select, based on an operating metric, one of the first oscillator circuitry and the second oscillator circuitry for providing an output voltage.
    Type: Application
    Filed: February 26, 2013
    Publication date: August 29, 2013
    Applicant: MARVELL WORLD TRADE LTD.
    Inventor: MARVELL WORLD TRADE LTD.
  • Patent number: 8508308
    Abstract: Described embodiments provide a method of calibrating, by a calibration engine, a phase-locked loop (PLL) having one or more adjustable oscillators. The method includes entering a calibration mode of the PLL. The PLL is set to an initial state, thereby selecting one of the adjustable oscillators for calibration, an initial threshold window, and an initial tuning band of the selected adjustable oscillator. If the control signal of the selected adjustable oscillator is not within the initial threshold window, the calibration engine iteratively adjusts at least one of: (i) the selected tuning band of the selected adjustable oscillator, (ii) the selected adjustable oscillator, and (iii) the selected threshold window until the control signal of the selected adjustable oscillator is within the adjusted threshold window. If the control signal is within the threshold window, the one or more calibration settings of the PLL are stored and used to set the PLL operation.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: August 13, 2013
    Assignee: LSI Corporation
    Inventors: Yikui Jen Dong, Freeman Y. Zhong, Tai Jing, Chaitanya Palusa
  • Patent number: 8466752
    Abstract: In accordance with some embodiments of the present disclosure, an oscillator circuit comprises, a first pad associated with a first terminal of an oscillator and a second pad associated with a second terminal of the oscillator. The oscillator is configured to generate an oscillating signal and communicate the oscillating signal from the second terminal to a clock distributor coupled to the second pad. The oscillator circuit further comprises an oscillator gain element comprising an output node coupled to the first pad and an input node coupled to the second pad. The oscillator circuit also comprises a digital-to-analog converter (DAC) coupled to the first pad. The oscillator circuit additionally comprises a switching circuit coupled to the gain element. The switching circuit is configured to enable the gain element when the oscillator comprises a resonator and disable the gain element when the oscillator comprises a voltage controlled oscillating module.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: June 18, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Kristopher Kevin Kaufman, John Wayne Simmons
  • Publication number: 20130033331
    Abstract: An injection-locked oscillator circuit includes a master oscillator, a slave oscillator, and an injection lock control circuit. The slave oscillator is decoupled from the master oscillator (for example, due to an unlock condition). When the slave is free running, its oscillating frequency is adjusted (for example, as a function of a supply voltage). After an amount of time, the slave is to be relocked to the master (for example, due the unlock condition no longer being present). The slave oscillating frequency is made to be slightly lower than the master oscillating frequency. The slave is then only recoupled to the master upon detection of an opposite-phase condition between the master oscillator output signal and the slave oscillator output signal. By only recoupling the slave to the master during opposite-phase conditions, frequency overshoots in the slave oscillating frequency are avoided that may otherwise occur were the recoupling done during in-phase conditions.
    Type: Application
    Filed: August 5, 2011
    Publication date: February 7, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Ashwin RAGHUNATHAN, Marzio Pedrali-Noy, Sameer Wadhwa
  • Patent number: 8362809
    Abstract: The invention provides a dual-mode voltage-controlled oscillator (DMVCO), a frequency synthesizer and a wireless receiving device, and pertains to the technical field of integrated circuit of radio frequency wireless receiver. The DMVCO and the frequency synthesizer can operate in a wideband mode and a quadrature mode. When operating in the quadrature mode, a quadrature signal is provided for a Single Sideband Mixer of the frequency synthesizer by a quadrature coupling of a first voltage-controlled oscillator unit and a second voltage-controlled oscillator unit in the DMVCO in the overlapped frequency band so that the frequency synthesizer can cover a higher output frequency band. Therefore, the tuning range of the DMVCO of the invention is wide, and the frequency synthesizer using the DMVCO is low in power consumption, simple in structure and has good frequency spur performance.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: January 29, 2013
    Assignee: Fudan University
    Inventors: Wei Li, Jin Zhou
  • Patent number: 8319564
    Abstract: Integrated circuits with phase-locked loops are provided. Phase-locked loops may include an oscillator, a phase-frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a programmable divider. The voltage-controlled oscillator may include multiple inductors, an oscillator circuit, and a buffer circuit. A selected one of the multiple inductors may be actively connected to the oscillator circuit. The voltage-controlled oscillators may have multiple oscillator circuits. Each oscillator circuit may be connected to a respective inductor, may include a varactor, and may be powered by a respective voltage regulator. Each oscillator circuit may be coupled to a respective input transistor pair in the buffer circuit through associated coupling capacitors. A selected one of the oscillator circuits may be turned on during normal operation by supplying a high voltage to the selected one of the oscillator circuit and by supply a ground voltage to the remaining oscillator circuits.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: November 27, 2012
    Assignee: Altera Corporation
    Inventors: Weiqi Ding, Sergey Shumarayev, Wilson Wong, Ali Atesoglu, Sharat Babu Ippili
  • Patent number: 8237513
    Abstract: A voltage controlled oscillator (VCO) for a phase locked loop (PLL) includes a startup oscillator, the startup oscillator comprising a first plurality of inverters; a primary oscillator, the primary oscillator comprising a second plurality of inverters, wherein a number of the second plurality of inverters is fewer than the number of the first plurality of inverters; and a control module connected to the startup oscillator and the primary oscillator. A method of operating a voltage controlled oscillator (VCO) in a phase locked loop (PLL), the VCO comprising a startup oscillator and a primary oscillator includes sending an enable signal to the startup oscillator; waiting a predetermined number of startup oscillator clock cycles; and when the predetermined number of startup oscillator clock cycles has elapsed, sending a disable signal to the startup oscillator, and sending an enable signal to the primary oscillator.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: August 7, 2012
    Assignee: International Business Machines Corporation
    Inventors: Paul D. Muench, Mangal Prasad, George E. Smith, III, Michael A. Sperling
  • Patent number: 8143955
    Abstract: Oscillator circuit for radio frequency transceivers. An oscillator circuit includes a first oscillator that generates a signal having a first frequency and a second oscillator that generates a signal having a second frequency. The oscillator circuit includes a mixer that is responsive to the signal having the first frequency and the signal having the second frequency to provide a signal having a third frequency and one or more frequency components. The oscillator circuit includes a filter that is responsive to the signal from the mixer to attenuate the one or more frequency components and provide a signal having a desired frequency. The oscillator circuit includes a correction circuit to correct a drift in at least one of the first frequency and the second frequency by controlling the second frequency, thereby correcting the drift in the third frequency and the desired frequency.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: March 27, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Gireesh Rajendran, Debapriya Sahu, Alok Prakash Joshi, Ashish Lachhwani
  • Patent number: 8143960
    Abstract: According to one exemplary embodiment, a voltage controlled oscillator configured to operate in low and high band modes includes a low band section and a high band section. The voltage controlled oscillator further includes a multi-tap inductor having a high inductance portion coupled to the low band section and a low inductance portion coupled to the high band section. The low band section is configured to provide a low frequency band oscillator output in the low band mode and the high band section is configure to provide a high frequency band oscillator output in the high band mode. The low band section is disabled in the high band mode and the high band section is disabled in the low band mode. A center tap of the multi-tap inductor is coupled to a supply voltage.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: March 27, 2012
    Assignee: Broadcom Corporation
    Inventor: Qiang Li
  • Patent number: 8135357
    Abstract: A switchable inductor-capacitor-inductor (L-C-L) network, which includes an integrated T/R switch, can advantageously bridge a PA and an LNA of a wireless device. The first inductor can function as an RF choke that provides power to the PA. In one embodiment, the first inductor can be advantageously implemented using the bond wires already attached to the PA, thereby requiring no additional inductors to provide the integrated T/R switch and minimizing use of valuable silicon area. The second inductor can function as a source inductor for and cancel an input parasitic capacitance of the LNA. A set of capacitors can act as blocking capacitors to provide DC isolation between the LNA and the PA, thereby protecting the LNA from high voltages. The L-C-L network can also advantageously function as an impedance matching network for at least one of the PA and the LNA.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: March 13, 2012
    Assignee: Qualcomm Atheros, Inc.
    Inventors: Richard T. Chang, David Weber
  • Patent number: 8130044
    Abstract: Configurable phase-locked loop circuitry is provided. The phase-locked loop circuitry may include a buffer having a buffer output and a multiplexer having inputs and an output. The phase-locked loop circuitry may include multiple voltage-controlled oscillators. The phase-locked loop circuitry may be configured to switch a desired one of the voltage-controlled oscillators into use. Each voltage-controlled oscillator may be controlled by control signals applied to a control input for that voltage-controlled oscillator. The control input of each voltage-controlled oscillator may be connected to the buffer output. The output of each voltage-controlled oscillator may be connected to a respective one of the multiplexer inputs. Power-down transistors may be used to disable unused voltage-controlled oscillators to conserve power. The power-down transistors and the multiplexer may be controlled by signals from programmable elements.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: March 6, 2012
    Assignee: Altera Corporation
    Inventors: William W. Bereza, Rakesh H. Patel
  • Patent number: 8081037
    Abstract: An apparatus including a ring oscillator and related methods are disclosed. The ring oscillator includes at least two ring loops. A first ring loop includes a plurality of series coupled delay cells. At least one additional ring loop includes a plurality of series coupled delay cells. The at least one additional ring loop is coupled to the first ring loop by one or more common delay cells shared between the first ring loop and the at least one additional ring loops.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: December 20, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: Jonghae Kim, Lew G. Chua-Eoan, Matthew Nowak
  • Patent number: 8055931
    Abstract: A method is provided for switching between two oscillator signals within an alignment element. In accordance with the method, one of the two oscillator signals one is selected as a first master signal in order to provide an output stepping signal at an output of the alignment element. The method comprises introducing a virtual stepping signal when a switch between the two oscillator signals occurs or when a failure in the first master signal is detected. The method further comprises sending the virtual stepping signal to the output of the alignment element in the event of a switch until an alignment with a new master signal is completed.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Ralf Ludewig, Thuyen Le, Tilman Gloekler, Willm Hinrichs
  • Patent number: 8054138
    Abstract: This invention makes it possible to reduce a power consumption of an electronic circuit (microcomputer, for example) while preventing malfunctioning of an oscillator by appropriately setting a power supply impedance of a low frequency oscillator corresponding to an operation mode. A high frequency oscillator, a medium frequency oscillator and a low frequency oscillator are provided as sources of system clocks. In addition, there is provided a quartz oscillator to generate a clock for a timepiece. When the high frequency oscillator is in operation, a power supply impedance of the quartz oscillator is reduced to improve a noise tolerance. In a waiting period during which the high frequency oscillator, the medium frequency oscillator and the low frequency oscillator are halted, on the other hand, the power supply impedance of the quartz oscillator is increased to suppress the power consumption.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Hideo Kondo
  • Patent number: 8049570
    Abstract: An electrical/magnetic current sensing system includes a first collection mechanism configured to convert an electric field into surface charge, a second collection mechanism comprising a magnetic reactive material, and a sensor coupled to the first and second collection mechanisms. The sensor comprises an odd number, greater than or equal to three, of unidirectionally-coupled non-linear over-damped bi-stable elements. Each element comprises a resistive load, an operational transconductance amplifier (OTA) with a bipolar junction transistor differential pair, a cross-coupled OTA, and a non-linear OTA. Each element may comprise fully differential inputs and outputs. The sensor may be contained in a microchip or on a printed circuit board. A resident time difference readout device may be connected to the sensor, and may be configured to perform a power spectral density calculation. The sensor may include a resistance to voltage circuit connected between the second collection mechanism and the elements.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: November 1, 2011
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Visarath In, Patrick Longhini, Yong (Andy) An Kho, Joseph D. Neff, Antonio Palacios, Norman Liu
  • Patent number: 8031010
    Abstract: The present invention is a Chip Scale Atomic Clock (CSAC)-enabled Time and Frequency Standard (CTFS) architecture. The CTFS architecture includes a microcontroller, a Time Compensated Crystal Oscillator (TCCO) circuit which is connected to the microcontroller, and a Chip Scale Atomic Clock (CSAC) which is connected to the microcontroller. The microcontroller is configured for selectively causing the CTFS to provide a TCCO circuit-based output frequency when the CTFS has not locked to a predetermined atomic resonance, and is further configured for causing the CTFS to provide a CSAC-based output frequency when the CTFS has locked to a predetermined atomic resonance.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: October 4, 2011
    Assignee: Rockwell Collins, Inc.
    Inventors: Roy W. Berquist, Robert A. Newgard, Joseph M. Bohl
  • Patent number: 8013681
    Abstract: A communications device (100) includes a frequency divider circuit (106) having a plurality of frequency division ratios. The device also includes at least one phase-lock loop (PLL) circuit (101, 102, 103, 104, 110, 112) coupled to at least a signal input of the frequency divider circuit. The PLL circuit includes a local oscillator (LO) circuit (104) including a plurality of voltage controlled oscillators (VCOs) having different frequency tuning ranges. The device further includes at least one control input (105) coupled to at least the frequency divider circuit and the PLL circuit for specifying one of the plurality of VCOs and one of the plurality of frequency division ratios of the frequency divider circuit.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: September 6, 2011
    Assignee: Harris Corporation
    Inventor: Kenneth Beghini
  • Patent number: 7940139
    Abstract: In a voltage-controlled oscillator capable of broadening a variable frequency range while suppressing increase of conversion gain, a converter (12) converts an input voltage to a first physical quantity, a variable converter (13) supplies a second physical quantity that accords with the status of each switch of a switch group (13a). another variable converter (14), when the input voltage is contained within a prescribed voltage range, supplies a third physical quantity that accords with the input voltage and the status of each switch of another switch group (14a), and a variable-frequency oscillator (15) supplies a signal of a frequency that accords with the first physical quantity, the second physical quantity, and the third physical quantity.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: May 10, 2011
    Assignee: NEC Corporation
    Inventor: Hiroshi Kodama
  • Patent number: 7940140
    Abstract: The present invention is a self-calibrating, dual-band, wide range LC tank Voltage Controlled Oscillator (VCO) system. The system may include a first Voltage-Controlled Oscillator (VCO) and a second Voltage-Controlled Oscillator (VCO). The system may further include a calibration engine. The calibration engine may be configured for being connectable to at least one of the first VCO or the second VCO. The calibration engine may further be configured for automatically establishing/providing a VCO fix capacitor band code setting and a gear control setting for selectively activating or inactivating the first VCO and/or the second VCO. The calibration engine may be further configured for automatically comparing a VCO control voltage of the system to an allowable control voltage range for the system and may be further configured for automatically adjusting the VCO fix capacitor band code setting and/or the gear control setting when the VCO control voltage falls outside of the allowable control voltage range.
    Type: Grant
    Filed: June 3, 2008
    Date of Patent: May 10, 2011
    Assignee: LSI Corporation
    Inventors: Yi Zeng, Freeman Zhong
  • Publication number: 20110074513
    Abstract: In a dual-band capable voltage-controlled oscillator (VCO) device at least two voltage-controlled oscillator units (VCO1, VCO2) are coupled via a reactive component (A) and each said at least one voltage-controlled oscillator unit (VCO1, VCO2) further being connected to at least a respective external switching device (B1, B2) adapted to control an operating frequency of the A (VCO) device.
    Type: Application
    Filed: May 30, 2008
    Publication date: March 31, 2011
    Applicant: Telefonaktiebolaget L M Ericsson (publ)
    Inventor: Mingquan Bao
  • Patent number: 7898345
    Abstract: A digital frequency synthesizer can be implemented with single source design, a multiplexer design, a fractional divider design, or a frequency multiplier and frequency divider design. Implementations can utilize a controller dithering circuit or a delta-sigma modulator. The frequency synthesizer can be implemented in a CMOS structure and can utilize a clean up phase locked loop (PLL).
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: March 1, 2011
    Assignee: Orca Systems, Inc.
    Inventor: Kartik M. Sridharan
  • Patent number: 7868705
    Abstract: In a high-frequency oscillator, a first resonance circuit and a second resonance circuit are respectively connected to a first amplifier circuit and a second amplifier circuit. A selection circuit includes a first switch circuit and a second switch circuit which selectively operate one of the first amplifier circuit and the second amplifier circuit. A grounded capacitor is connected to output sides of the first amplifier circuit and the second amplifier circuit. The grounded capacitor is commonly used by both the first amplifier circuit and the second amplifier circuit. An auxiliary grounded capacitor is connected between the first switch circuit and the first amplifier circuit. Accordingly, the grounded capacitor and the auxiliary grounded capacitor are connected to each other in parallel only when the first amplifier circuit is activated.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: January 11, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tomohide Aramata
  • Patent number: 7859931
    Abstract: A refresh period signal generator with a digital temperature information generation function includes a temperature information generating part configured to generate temperature information by using a first period signal and a second period signal, a refresh period signal generating part configured to output a refresh period signal by selecting one signal having a shorter period between the first period signal and the second period signal, and an operation timing control part operating the temperature information generating part and the refresh period signal generating part at a predetermined timing.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: December 28, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Yun-Seok Hong, Ho-Uk Song
  • Patent number: 7840190
    Abstract: A system and method for ensuring proper synchronization of a plurality of frequency sources used in reception diversity-based radio reception. The frequency sources are concatenated in a synchronization loop, through which one frequency source having a high performance oscillator is configured as a master source. Through its oscillator, the master provides an internal synchronization signal that synchronizes all other sources, which have lower performance oscillators and are configured as slaves. Upon a failure in the master oscillator or in the synchronization loop, a slave source takes over as an alternative master source and provides its internal oscillator signal as an alternative synchronization signal to all other frequency sources.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: November 23, 2010
    Assignee: Mobile Access Networks Ltd.
    Inventors: Ofer Saban, Isaac Shapira, Rami Reuveni, Yair Shapira
  • Patent number: 7834705
    Abstract: There is provided a frequency synthesizer including a multi-band voltage controlled oscillator having a plurality of voltage controlled oscillating cores outputting oscillation frequencies having different bands according to an input control voltage. Each of the voltage controlled oscillating cores outputs a frequency band divided into a plurality of bands, and the voltage controlled oscillating core operates by each of the divided bands, and one of the voltage controlled oscillating cores operates in one of the bands according to the control voltage. The frequency synthesizer further includes a comparator unit and an oscillation band-determining unit. The comparator unit compares the control voltage with a pre-set reference voltage range. The oscillation band-determining unit changes the band where the voltage controlled oscillating core operates into another one of the bands when the control voltage is out of the pre-set reference voltage range.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: November 16, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Won Seo, Seung Min Oh, Byeong Hak Jo
  • Patent number: 7821343
    Abstract: A transmitter that includes a first phase locked loop (PLL) and a second PLL coupled to the first PLL is described. In one implementation, the first PLL is an inductance-capacitance (LC) type PLL and the second PLL is a ring type PLL. Also, in one embodiment, the transmitter further includes a PLL selection multiplexer coupled to the first and second PLLs, where the PLL selection multiplexer receives an output of the first PLL and an output of the second PLL and outputs either the output of the first PLL or the output of the second PLL. In one implementation, a control signal for controlling selection by the PLL selection multiplexer is programmable at runtime. In one implementation, the transmitter of the present invention further includes a clock generation block coupled to the PLL selection multiplexer, a serializer block coupled to the clock generation block and a transmit driver block coupled to the serializer block.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: October 26, 2010
    Assignee: Altera Corporation
    Inventors: Wilson Wong, Sergey Shumarayev, Allen Chan, Weiqi Ding
  • Patent number: 7812679
    Abstract: A frequency generation unit (FGU) 100 includes a plurality of selectable voltage controlled oscillators (110) whose output frequencies are chosen in relationship with a predetermined intermediate frequency (IF) and frequency divider value (M) to provide multi-band frequency generation capability in a single communication device. A programmable reference divider (104), phase detector (174) and programmable charge pump (106) take an incoming reference frequency (120) and generate a charge pump output (124) to optimize the in-band phase noise in the FGU 100. A fixed loop filter (108) filters the charge pump output (124) to generate a control voltage (126) for the selectable VCOs (110). The desired frequency band is selected and enabled using control logic (128).
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: October 12, 2010
    Assignee: Motorola, Inc.
    Inventor: Armando J. Gonzalez
  • Patent number: 7791423
    Abstract: The present invention relates to a two-frequency switchover type crystal oscillator in which first and second IC chips and first and second crystal resonators are connected to wiring patterns of a circuit substrate to form first and second oscillation circuits, and the first and second oscillation circuits are selectively operated in accordance with a selection mechanism; a two-frequency switchover type crystal oscillator in which surfaces opposite to circuit function surfaces of the first and second IC chips are connected to form a two-stage structure; IC terminals of the circuit function surface of the first IC chip are directly connected both electrically and mechanically to the wiring patterns; and IC terminals of the circuit function surface of the second IC chip are connected electrically by wire bonding to the wiring patterns; wherein those wiring patterns of the wiring patterns that are connected to power source, output, and ground terminals of the first and second IC chips are connected in common wit
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: September 7, 2010
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Makoto Watanabe
  • Patent number: 7777586
    Abstract: A multi-band electronic apparatus and method thereof is provided. The method comprises outputting a first output signal in the first band by a first voltage controlled oscillator according to a switch control signal and a control voltage, outputting a second output signal in the second band by a second voltage controlled oscillator according to the switch control signal and the control voltage, the second band being not completely overlapped by the first band, performing frequency division selectively on the first output signal or the second frequency divided signal according to the switch control signal, and outputting a first frequency divided signal, determining a phase difference between the first frequency divided signal and a reference signal to output a phase difference signal, outputting the control voltage according to the phase difference signal, and selectively driving the first or the second voltage controlled oscillators by the control voltage according to the switch control signal.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: August 17, 2010
    Assignee: Richwave Technology Corp.
    Inventors: Yi-Fong Wang, Wei-Kung Deng