With Impedance Matching Patents (Class 333/124)
  • Patent number: 12009566
    Abstract: Disclosed is a 5G or pre-5G communication system for supporting a data transmission rate higher than that of a 4G communication system such as LTE. The present invention relates to a technique for implementing, in a compact form, a four-way power divider and combiner for a phased array system. More particularly, according to one embodiment of the present invention, a power divider including one input port and four output ports comprises an input terminal inductor having one end connected to the input port and the other end connected to the ground, an inductor group including four output terminal inductors, and four connection units for connecting the input port and the inductor group, wherein four secondary inductors are respectively connected to the four connection units so that four nodes are formed between the four connection units and the inductor group, and the output ports are respectively disposed on the four connection units between the input port and the inductor group.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: June 11, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Youngchang Yoon, Kyuhwan An, Bohee Suh, Sangho Lee
  • Patent number: 11901611
    Abstract: An antenna device includes a first radiating element, a second radiating element having lower radiation efficiency than the first radiating element, a coupling element including first and second coils that are electromagnetically coupled to each other, and first and second phase adjusting elements. The first and second phase adjusting elements induce, at a resonant frequency of the second radiating element, a predetermined proportion of current flowing through the second radiating element to the first radiating element.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: February 13, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takafumi Nasu, Kenichi Ishizuka
  • Patent number: 11843360
    Abstract: A power combiner/divider circuit can be structured having a base structure with the addition of an odd-mode capacitor and a low pass network at an end of the base structure or structured having a base structure with the addition of an inductor and a high pass network at an end of the base structure. The power combiner/divider circuit can be implemented as a port coupled to multiple ports with low pass networks or high pass networks arranged at the ends of paths to the multiple ports. In embodiments using low pass base structures or low pass networks coupled to the base structures, inductors in such low pass sections can be positively coupled on a pair-wise basis.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: December 12, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Song Lin, Xudong Wang, Kefei Wu, Christopher Eugene Hay
  • Patent number: 11496101
    Abstract: A power amplifier system front end measures both forward and reverse power associated with an RF transmit signal. A processor is configured to use measurements derived from the measured forward and reverse power output to adjust the RF transmit signal in order to compensate for one or more memory effects of the power amplifier system.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: November 8, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Ziv Alon, Maxwell L. Thomas
  • Patent number: 11128024
    Abstract: A combiner-divider includes a first impedance converter disposed between the first port and the second port, a second impedance converter disposed between the first port and the third port, and an isolation unit disposed between the second port and the third port. The isolation unit includes a balun formed of a first semi-rigid cable and a second semi-rigid cable, and terminating resistors. Each line length of the first impedance converter, the second impedance converter, and the third impedance converter corresponds to ¼ wavelength at a center frequency. A relationship of each impedance Ri of the second port and the third port, an impedance Ro of the first port, and each impedance W of the first impedance converter and the second impedance converters is expressed by W=(2×Ri×Ro)1/2.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: September 21, 2021
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yusaburo Goto, Keiichi Sakamaki, Yu Wakabayashi
  • Patent number: 11108236
    Abstract: An electrical energy storage module is provided. The storage module includes a reversible electrical energy conversion device intended to be connected to an electrical energy source and an electrical energy storage device. The storage device includes a first branch including two filter capacitors in series, and a second branch including two identical electrical energy storage means connected in series. A node common to the two capacitors and a node common to the two energy storage means are coupled by an impedance. A first end of the first and second branches is connected to the electrical energy conversion device, and a second end of the first and second branches is connected to the electrical energy conversion device.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: August 31, 2021
    Inventors: Samir Soua, Alfred Permuy
  • Patent number: 11101775
    Abstract: The disclosure relates to a wideband, tunable hybrid-based combiner for a Doherty power amplifier architecture. The architecture includes two parallel power amplifiers: a carrier amplifier and a peaking amplifier. The peaking amplifier modulates the load seen by the carrier amplifier, allowing the carrier amplifier to remain in high-efficiency, saturated operation even at back-off. This load modulation can be achieved using impedance matching networks having an impedance matched to a specific frequency. Typically, a multi-mode/multi-band power amplifier module that does not include a tunable impedance circuit as disclosed herein, several Doherty power amplifier modules (each of which uses two amplifiers) would be used to cover several bands, which may make implementation costly and/or impractical. Thus, the architectures described herein provide wideband amplification using a Doherty amplifier configuration.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: August 24, 2021
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Kunal Datta, Reza Kasnavi, Aleksey A. Lyalin
  • Patent number: 11070188
    Abstract: Disclosed is an impedance matcher for use in a communication system, operable to match a transmitter or receiver, respectively, to an associated antenna, comprising a stub matching circuit and a phase shifter, whereby, in use, energy flows from a source to the phase shifter, to the stub matching circuit and to a load.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: July 20, 2021
    Assignee: BAE SYSTEMS PLC
    Inventor: Roy Threadgall Miller
  • Patent number: 11038483
    Abstract: A matching module includes an input terminal connected to an input node, a variable load capacitor, and a plurality of RF signal delivery branches. The input terminal is connected to receive RF signals from one or more RF generators. The load capacitor is connected between the input node and a reference ground potential. Each of the plurality of RF signal delivery branches has a respective ingress terminal connected to the input node and a respective egress terminal connected to a respective one of a plurality of output terminals. Each of the plurality of output terminals of the matching module is connected to deliver RF signals to a different one of a plurality of plasma processing stations/chambers. Each of the plurality of RF signal delivery branches includes a corresponding inductor and a corresponding variable tuning capacitor electrically connected in a serial manner between its ingress terminal and its egress terminal.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: June 15, 2021
    Assignee: Lam Research Corporation
    Inventors: Karl Leeser, Sunil Kapoor, Bradford J. Lyndaker
  • Patent number: 11018754
    Abstract: An RF communications (COMM) system includes a COMM antenna connected to a signal processing unit including a multi-channel analog navigation/communications (NAV/COMM) transceiver and an analog COMM transmitter. The system is configured for switching between the transceiver and the transmitter, based on preprogrammed parameters including prioritizing signals based on keywords, system location and other parameters. An aircraft application is disclosed. A global navigation satellite subsystem (GNSS) subsystem can be connected to the signal processing unit for locating the telecommunications system. A method includes the steps of providing an RF communications system for aircraft and other applications.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: May 25, 2021
    Assignee: Appareo Systems, LLC
    Inventors: Greg M. Middlestead, Robert M. Allen, Nicholas L. Butts, Jordan M. Dahl, Joshua N. Gelinske, John Michael Zietz
  • Patent number: 10998606
    Abstract: In embodiments, a power splitter/combiner includes a first electrically conductive trace included in a first layer; second and third electrically conductive traces included in a second layer; a first via electrically coupled to the first and second electrically conductive traces; and a second via electrically coupled to the first and third electrically conductive traces. A first portion of the first electrically conductive trace comprises a first port of the power splitter/combiner. A second portion of the first electrically conductive trace, the first via, and the second electrically conductive trace comprises a second port of the power splitter/combiner. A third portion of the first electrically conductive trace, the second via, and the third electrically conductive trace comprises a third port of the power splitter/combiner.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: May 4, 2021
    Assignee: Space Exploration Technologies Corp.
    Inventors: Souren Shamsinejad, Javier Rodriguez De Luis, Nil Apaydin, Alireza Mahanfar
  • Patent number: 10930995
    Abstract: Provided is a power divider/combiner capable of improving reflection characteristics and isolation characteristics. The power divider/combiner is formed by a multilayer board, and a strip conductor is arranged in an inner layer of the multilayer board and a chip resistor is arranged on an outer surface of the multilayer board. The power divider/combiner includes vias, which connect the strip conductor and the chip resistor, and includes stubs mounted between input/output terminals and the vias. With this configuration, it is possible to adjust induction mainly during an odd mode of an even/odd mode operation and to consequently improve reflection characteristics of the input/output terminals and isolation characteristics between the input/output terminals.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: February 23, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hideharu Yoshioka, Akimichi Hirota, Naofumi Yoneda, Hidenori Ishibashi
  • Patent number: 10812051
    Abstract: Aspects of methods and systems for a matching circuit for a broadband bus in automotive applications are provided and may include a twisted pair wiring bus comprising a main line for coupling two end nodes and one or more stub lines, with each stub line coupling a stub node to the main line via a junction impedance on each wire in the stub line. Electrical signals may be communicated between devices coupled to the end nodes and the stub nodes. A subset of the stub nodes may be coupled to the main line in a star configuration. The junction impedance may comprise a resistor on each wire in the stub line where the resistor may have a resistance that is two to three times a nominal impedance of the main line. The junction impedance may comprise a resistor in parallel with an inductor on each wire in the stub line.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: October 20, 2020
    Assignee: MaxLinear, Inc.
    Inventor: Antonio Jimenez de Parga Bernal
  • Patent number: 10812129
    Abstract: Embodiments provides a radio network entity and the method thereof for improving filtering performance in a time division duplexing radio communication system, the radio network entity comprises: a first filter, which is configured to perform a first type of filtering for a signal to be transmitted to, or received from a device in the radio communication system through a radio interface, with a common filtering requirement for transmitting and receiving fulfilled, a second filter, which is configured to perform a second type of filtering for the signal to be transmitted to the device, with additional filtering requirement for transmitting besides the common filtering requirement fulfilled; and a third filter, which is configured to perform a third type of filtering for the signal received from the device, with additional filtering requirement for receiving besides the common filtering requirement fulfilled.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: October 20, 2020
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Youping Su, Ming Li
  • Patent number: 10707827
    Abstract: Certain aspects of the present disclosure provide a circuit for dividing or combining power. The circuit generally includes a Wilkinson power divider, a first capacitive element, and a first resistive element coupled in parallel with the first capacitive element, wherein the first capacitive element and the first resistive element are coupled between a first port of the circuit and a first port of the Wilkinson power divider.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: July 7, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Wolfgang Frank, Qizhi Gong, Scott Walter, Sanat Kapoor
  • Patent number: 10659068
    Abstract: A DA converter to reduce second-order harmonic distortion more precisely with convenient configurations. A DA converter including: a DA converting unit to input reference voltage and a digital value and output an analog signal according to the digital value based on the reference voltage; and a superimposing unit to superimpose, on the reference voltage, a superimposing signal based on the analog signal that is output from the DA converting unit, and a DA converting method are provided. The DA converter may further include a setting input unit to input setting regarding at least one of a superimposing amount and a sign of an analog signal to be included in the superimposing signal. Also, an adjusting apparatus and an adjusting method to adjust the DA converter are provided.
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: May 19, 2020
    Assignee: Asahi Kasei Microdevices Corporation
    Inventor: Ryuzo Yamamoto
  • Patent number: 10594279
    Abstract: A system having a set of power amplifiers each having a primary inductive structure configured to provide an output signal. A secondary inductive structure is configured to inductively couple to each of the primary inductive structures. A transmission line is provided with a signal trace and a ground trace. The signal trace of the transmission line is connected to a first end of the secondary inductive structure. A return path from a second end of the secondary inductive structure is coupled via a resonant network to the ground trace of the transmission line, in which the return path is spaced away from the secondary inductive structure to minimize inductive coupling to the primary structures.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: March 17, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Krishnanshu Dandu, Brian Paul Ginsburg
  • Patent number: 10277287
    Abstract: An antenna system includes an antenna, a first frequency dividing circuit, a second frequency dividing circuit, and a plurality of matching circuits. The first frequency dividing circuit is coupled to the antenna. The matching circuits are coupled to the first frequency dividing circuit. The second frequency dividing circuit is coupled to the matching circuits. The matching circuits are configured to process different frequency signals, respectively.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: April 30, 2019
    Assignee: MEDIATEK INC.
    Inventors: Ting-Wei Kang, Shih-Huang Yeh
  • Patent number: 10263594
    Abstract: Impedance matching circuit for radio-frequency amplifier. In some embodiments, an impedance matching circuit can include a primary metal trace having a first end configured to be capable of being coupled to a voltage source for the power amplifier, and a second end configured to be capable of being coupled to an output of the power amplifier. The impedance matching circuit can further include a secondary metal trace having first end coupled to the second end of the primary metal trace, and a second end configured to be capable of being coupled to an output node. The impedance matching circuit can further include a capacitance implemented between the first and second ends of the secondary metal trace, and be configured to trap a harmonic associated with an amplified signal at the output of the power amplifier.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: April 16, 2019
    Assignee: Skyworks Solutions, Inc.
    Inventors: Aleksey A. Lyalin, Weimin Sun, Nicholas Quinn Muhlmeyer, Russ Alan Reisner
  • Patent number: 10116281
    Abstract: Disclosed is a power divider circuit providing a mutual inductance and including a first primary inducing element having a first terminal connected with a first output port and a second terminal connected with a second primary inducing element having a first terminal connected with a second output port and a second terminal connected with the first primary inducing element and magnetically and mutually coupled with the first primary inducing element, a sub inducing element having a first terminal connected with an input port and a second terminal connected with the second terminal of the first primary inducing element and the second terminal of the second primary inducing element, and an isolation network connected between the first output port and the second output port. The sub inducing element is magnetically and mutually coupled with each of the first primary inducing element and the second primary inducing element.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: October 30, 2018
    Assignees: Samsung Electronics Co., Ltd, Foundation of Research & Business, Chungnam National University
    Inventors: Jeong-Ho Lee, Choul-Young Kim, Hyun-Myung Oh, Chul-Woo Byeon, Ju-Ho Son
  • Patent number: 10110190
    Abstract: A method of manufacture for an acoustic resonator or filter device. In an example, the present method can include forming metal electrodes with different geometric areas and profile shapes coupled to a piezoelectric layer overlying a substrate. These metal electrodes can also be formed within cavities of the piezoelectric layer or the substrate with varying geometric areas. Combined with specific dimensional ratios and ion implantations, such techniques can increase device performance metrics. In an example, the present method can include forming various types of perimeter structures surrounding the metal electrodes, which can be on top or bottom of the piezoelectric layer. These perimeter structures can use various combinations of modifications to shape, material, and continuity. These perimeter structures can also be combined with sandbar structures, piezoelectric layer cavities, the geometric variations previously discussed to improve device performance metrics.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: October 23, 2018
    Assignee: AKOUSTIS, INC.
    Inventors: Ramakrishna Vetury, Alexander Y. Feldman, Michael D. Hodge, Art Geiss, Shawn R. Gibb, Mark D. Boomgarden, Michael P. Lewis, Pinal Patel, Jeffrey B. Shealy
  • Patent number: 10110399
    Abstract: A circuit with galvanic isolation includes a series of n cascaded transformers including a first transformer and a last transformer in the series. A transmitter is coupled to the primary winding of the first transformer in the series of cascaded transformers, the transmitter being configured for supplying to the primary winding a transmission signal as a function of an input signal. A receiver is coupled to the secondary winding of the last transformer of the series of cascaded transformers and is configured for receiving at the secondary winding a reception signal transmitted over the series of cascaded transformers. A predistortion module is configured for applying to the transmission signal a predistortion including an (n?1)-fold integration, where n is the number of cascaded transformers, of a transmission signal that would be supplied to the input of a sole transformer present in a single-transformer solution.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: October 23, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Nizza, Roberto Aletti, Francesco Pulvirenti, Giuseppe Cantone
  • Patent number: 10079591
    Abstract: The present invention discloses a resistance calibration circuit.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: September 18, 2018
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kai-Yin Liu, Hui-Min Huang
  • Patent number: 10038414
    Abstract: An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: July 31, 2018
    Assignee: pSemi Corporation
    Inventors: Tero Tapio Ranta, Chih-Chieh Cheng, Kevin Roberts
  • Patent number: 9979132
    Abstract: Coaxial connectors with a grounding tube for altering a ground path with a conductor of the coaxial connector are disclosed. The coaxial connector comprises a grounding tube mounted within the connector housing and around at least a portion of a first conductor to initially establish and subsequently disconnect a grounding path between the first conductor and a housing of the coaxial connector. After contacting the mating connector, the first conductor moves, along with a first conductor housing, which moves a plurality of fingers of the grounding tube from the closed position to the open position. This disconnects the grounding path between the first conductor and the connector housing and establishes an electrical path between the first conductor and the mating connector. Thus, the coaxial connector is grounded before establishing an electrical connection between the coaxial connector and a mating connector.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: May 22, 2018
    Assignee: Corning Optical Communications RF LLC
    Inventor: Thomas Edmond Flaherty, IV
  • Patent number: 9960747
    Abstract: Integrated filter and electromagnetic coupler assemblies. In certain examples, an integrated filter and electromagnetic coupler assembly includes a filter having a capacitance and a series inductance, the series inductance being connected between an input port and an output port of the integrated filter and electromagnetic coupler assembly, and combination of the capacitance and the series inductance being selected to provide the filter with a passband and a stopband. The integrated filter and electromagnetic coupler assembly further includes a coupling element positioned physically proximate the series inductance and extending between a coupled port and an isolation port of the integrated filter and electromagnetic coupler assembly, the integrated filter and electromagnetic coupler assembly being configured to provide at the coupled port a coupled signal via inductive coupling between the series inductance and the coupling element responsive to receiving an input signal at the input port.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: May 1, 2018
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: David Scott Whitefield, Sriram Srinivasan, Zhiyang Liu, Nuttapong Srirattana
  • Patent number: 9947984
    Abstract: A power circuit suitable for combining or splitting broadband signals. The circuit includes a stepped impedance section, a core section and a first, second and third port. The stepped impedance section and the core section are interconnected at an interconnection. The stepped impedance section includes a first transmission line running from the first port to the interconnection. The core section includes a second and a third transmission line running from the interconnection to the second and third ports, respectively. The second and third transmission lines each have at least a first and a second core subsection. The number of core subsections of the second transmission line and the number of core subsections of the third transmission line is equal, to the number of stepped impedance subsections of the stepped impedance section.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: April 17, 2018
    Assignee: SAAB AB
    Inventor: Hans-Olof Vickes
  • Patent number: 9712437
    Abstract: Apparatus has at least one processor and at least one memory having computer-readable code stored therein which when executed controls the at least one processor to perform a method comprising: causing each of first and second transmitter interfaces to transmit data over a respective communications path including one or more logical connections; and causing each of first and second transmission parameter calculating modules, associated respectively with the first and second transmitter interfaces, to perform: monitoring the transmission of data over its respective communications path, using results of monitoring the transmission of data over its respective communications path to calculate a path speed value for transmitting data over its respective communications path, and causing the path speed value to be used in the transmission of data over its respective communications path.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: July 18, 2017
    Assignee: Bridgeworks Limited
    Inventors: Paul Burgess, David Trossell
  • Patent number: 9685975
    Abstract: Provided are, among other things, systems, apparatuses methods and techniques for providing a complete output signal from a set of partial signals, which in turn have been generated by parallel processing paths in the time-interleaved and/or frequency-interleaved conversion of discrete signals to linear signals (i.e., discrete-to-linear conversion). One such apparatus includes a distributed network comprising a plurality of ladder networks through which input signals propagate before being combined to form an output signal.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: June 20, 2017
    Assignee: Syntropy Systems, LLC
    Inventor: Christopher Pagnanelli
  • Patent number: 9667227
    Abstract: A method and apparatus for use in a digitally tuning a capacitor in an integrated circuit device is described. A Digitally Tuned Capacitor DTC is described which facilitates digitally controlling capacitance applied between a first and second terminal. In some embodiments, the first terminal comprises an RF+ terminal and the second terminal comprises an RF? terminal. In accordance with some embodiments, the DTCs comprise a plurality of sub-circuits ordered in significance from least significant bit (LSB) to most significant bit (MSB) sub-circuits, wherein the plurality of significant bit sub-circuits are coupled together in parallel, and wherein each sub-circuit has a first node coupled to the first RF terminal, and a second node coupled to the second RF terminal. The DTCs further include an input means for receiving a digital control word, wherein the digital control word comprises bits that are similarly ordered in significance from an LSB to an MSB.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: May 30, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Tero Tapio Ranta
  • Patent number: 9660606
    Abstract: Disclosed are devices and methods related to autotransformer-based impedance matching for radio-frequency (RF) applications. In some embodiments, an impedance matching device can include a primary metal trace and a secondary metal trace, each having a respective number of turns. Such metal traces can be interconnected to form an autotransformer with the primary metal trace and the secondary metal trace being in respective planes separated by a selected distance. Such an autotransformer can be utilized to, for example, facilitate impedance matching of an amplified RF signal from a power amplifier (PA). In some embodiments, the impedance matching device can be implemented as an integrated passive device (IPD) mountable on a packaging substrate. Such an IPD can be configured to allow stacking of another component on the IPD to yield a number of desirable features in products such as RF modules.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: May 23, 2017
    Assignee: Skyworks Solutions, Inc.
    Inventors: Aleksey A. Lyalin, Weimin Sun, Nicholas Quinn Muhlmeyer, Russ Alan Reisner
  • Patent number: 9595933
    Abstract: A multi-mode multi-band power amplifier and its circuits are provided. The power amplifier comprises a controller, a wide-band amplifier channel, and a fundamental impedance transformer. The controller receives an external signal and outputs a control signal according to the external signal. The wide-band amplifier channel receives a single-band or a multi-band RF signals through the input terminal, performs power amplification on the RF signals and outputs the RF signals through the output terminal. The fundamental impedance transformer comprises a first segment shared by RF signals in all bands, second segments respectively specific to RF signals in all bands, and a switching circuit controlled by the controller to separate a RF signal which is subject to power amplification to the second segment in a switchable manner for multiplexed outputs. A power amplifier output power control circuit, a gain switching circuit, and a gain attenuation circuit are also provided.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: March 14, 2017
    Assignee: LANSUS TECHNOLOGIES INC.
    Inventors: Qian Zhao, Liyang Zhang, Hua Long, Zhenjuan Cheng, Dongjie Tang
  • Patent number: 9531339
    Abstract: An integrated circuit, comprising a single-ended pin for transmitting and/or receiving an RF signal. A first matching network is configured to match an impedance of the RF signal. A second matching network is configured to match an impedance of an on-chip differential circuit. A third matching network is configured to match an impedance of an on-chip single-ended circuit, wherein the third matching network is connectable to the first matching network. A transformer is connected or connectable to the second matching network and to the first matching network. Switches control an operating mode of the integrated circuit The second matching network is connected with the first matching network via the transformer, or the third matching network is connected with the first matching network.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: December 27, 2016
    Assignee: Dialog Semiconductor B.V.
    Inventors: Michail Papamichail, Wilhelmus Aart Johannes Aartsen, Johannes Gerardus Willms
  • Patent number: 9490208
    Abstract: A semiconductor device includes a semiconductor chip, a dielectric substrate, and bonding wires. The dielectric substrate includes wiring patterns formed on a surface and a ground metal layer formed on a back side. The semiconductor chip includes an active element and a drain pad that is connected to an output end of the active element. Wiring pattern is formed at a position closer to the drain pad than wiring pattern, wiring pattern and the ground metal layer constitute a first capacitative element, and wiring pattern and the ground metal layer constitute a second capacitative element. The drain pad is connected to wiring pattern through bonding wire, and connected to wiring pattern through bonding wire. Bonding wire and the first capacitative element constitute a high-pass matching circuit.
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: November 8, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Masaaki Nishijima
  • Patent number: 9456489
    Abstract: A memory system is provided with a motherboard, and a memory controller and a plurality memory devices mounted on the motherboard. The motherboard comprises a unicursal-shape main wiring, and branch wirings branched from the main wiring to the respective memory devices. Further, the motherboard comprises an open stub wiring branched from a connecting point between a start end and a branch point of the main wiring. Thus, a ringing of a waveform of a signal received by a receiving circuit can be suppressed irrespective of a wiring length of the branch wiring.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: September 27, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Masanori Kikuchi
  • Patent number: 9450560
    Abstract: The present invention is related to a wireless transceiver with function of adjustment for frequency-band matching and the adjusting method therefor, mainly comprising a plurality of transmitting circuits, a plurality of receiving circuits, a frequency-band matching adjustment circuit, and a radio-frequency signal transceiving end. In this connection, the transmitting circuits and/or the receiving circuits are connected to the radio-frequency signal transceiving end via the frequency-band matching adjustment circuit. Impedance in the frequency-band matching adjustment circuit may be adjusted on the basis of the frequency-band of a RF signal, when (before) the RF signal is transmitted or received, such that high impedance or low impedance is presented in the frequency-band matching adjustment circuit with respect to the frequency-band of the received or transmitted RF signal. Thereby, loss of RF signal in reception or transmission is reduced.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: September 20, 2016
    Assignee: Airoha Technology Corp.
    Inventors: Bing-Jye Kuo, Tao-Yi Lee
  • Patent number: 9350060
    Abstract: The present disclosure relates to microwave cavity filters used in cellular communication systems. More specifically, in one aspect, the present disclosure relates to the integration of combline cavity filters directly with antenna elements without galvanic connections. In another aspect, the present disclosure relates methods for loading combline filters without contact.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: May 24, 2016
    Assignee: Intel Corporation
    Inventors: Purna C. Subedi, Khurram Parviz Sheikh
  • Patent number: 9231558
    Abstract: A high frequency power amplifier includes an amplification element amplifying a high frequency signal; a duplexer to which an output signal of the amplification element is inputted, the duplexer allowing a signal of a certain frequency band to pass and attenuating signals of other frequency bands; a matching circuit connected between the amplification element and the duplexer; an external terminal connected to the matching circuit; and a passive element connected between the external terminal and a grounding point. The amplification element, the matching circuit, and the duplexer are integrally mounted on a single substrate. The passive element is located outside the substrate.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: January 5, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Tomoyuki Asada
  • Patent number: 9049664
    Abstract: A wireless communications circuit includes: a transceiver; a power amplifier module including a plurality of power amplifiers coupled to the transceiver; a filter module, including a plurality of filters coupled to the power amplifier module; an antenna switching module coupled between the filter module and an antenna; a tunable matching network coupled between the antenna and the antenna switching module; and a baseband circuit coupled to the tunable matching network. The baseband circuit is used for generating a control signal to the tunable matching network to adjust an impedance of the tunable matching network, wherein the impedance of the tunable matching network is adjusted to be different values under different operating conditions of the wireless communications circuit.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: June 2, 2015
    Assignee: MEDIATEK INC.
    Inventors: Wei-Cheng Liu, Chun-Jen Tsai, Ting-Wei Kang
  • Patent number: 9042844
    Abstract: A transceiver includes: a power amplifying circuit arranged to generate differential output signals during a transmitting mode of the transceiver; a balance-unbalance circuit arranged to convert the differential output signals into a single-ended output signal; a switchable matching circuit arranged to receive the single-ended output signal on a signal port of the transceiver during the transmitting mode, and to convert a single-ended receiving signal on the signal port into a single-ended input signal during a receiving mode of the transceiver; and a low-noise amplifying circuit arranged to convert the single-ended input signal into a low-noise input signal during the receiving mode. The power amplifying circuit, the Balun, the switchable matching circuit, and the low-noise amplifying circuit are configured as a single chip.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: May 26, 2015
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Ti-Ku Yu, Sang Won Son, Chia-Hsin Wu, Tsung-Ming Chen, Wei-Chia Chan
  • Patent number: 9007142
    Abstract: An output matching circuit for electronic amplifiers in the form of an integrated circuit is disclosed. The integrated circuit includes a first circuit, a second circuit, and a power sampling coupler. The first circuit is coupled to output of a first amplifier. The first circuit comprises a first matching section and an impedance inverter. The second circuit is coupled to output of a second amplifier, wherein the second circuit comprises a second matching section. The power sampling coupler is coupled to the first circuit and the second circuit, wherein the first circuit, the second circuit, and the power sampling coupler are fabricated as a single integrated circuit.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: April 14, 2015
    Assignee: Anadigics, Inc.
    Inventor: Kenneth Sean Ozard
  • Patent number: 8995912
    Abstract: Communication between chips is provided using a transmission line. Any one of the chips may tap into the transmission line, and communicate with another chip tapped into the transmission line by transmitting a radio frequency (RF) signal to the other chip via the transmission line or receiving an RF signal from the other chip via the transmission line. The transmission line may include a microstrip transmission line, a waveguide, a stripline transmission line, or another type of transmission line. The chips may use the transmission line to communicate data, control and/or clock signals with one another.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: March 31, 2015
    Assignee: Broadcom Corporation
    Inventor: Ahmadreza Rofougaran
  • Publication number: 20150048899
    Abstract: Lumped-element based class-E Chireix combiners are disclosed that are equivalents of a quarter-wave transmission line combiner. The proposed class-E equivalent power amplifier circuits that are used can be derived from a parallel tuned class-E implementation. The proposed low-pass equivalents can behave similarly in terms of class-E performance, but absorb the 90 degree to transmission line.
    Type: Application
    Filed: July 28, 2014
    Publication date: February 19, 2015
    Inventor: Mark Pieter van der Heijden
  • Publication number: 20150048898
    Abstract: A tunable impedance matching network comprising shunt (e.g. parallel) tunable capacitors and other fixed reactive elements is presented. The tunable impedance matching network can be used as one component of an SPTM (scalable periphery tunable matching) amplifier.
    Type: Application
    Filed: August 15, 2013
    Publication date: February 19, 2015
    Applicant: Peregrne Semiconductor Corporation
    Inventor: Michael P. Gaynor
  • Publication number: 20150048992
    Abstract: An antenna system including a signal source, at least one antenna coupled to the signal source, a matching circuit connected to the signal source at a first port and to the at least one antenna at a second port and operative to match the at least one antenna to the signal source, the matching circuit having a characteristic impedance with respect to the first port and the second port, real and imaginary parts of the characteristic impedance not being defined by the Hilbert transform.
    Type: Application
    Filed: March 19, 2013
    Publication date: February 19, 2015
    Inventor: Matti Martiskainen
  • Publication number: 20150028962
    Abstract: This application relates to systems and methods for splitting a current signal into at least two signals that are out of phase with each other. The power splitter may include a conductive element that may generate standing magnetic field that alternates at specified frequency. An inductor placed near or in the magnetic field may induce an alternating current at the specified frequency. Each end of the inductor may be coupled to a connector that may be coupled to an antenna that may be incorporated into a plasma processing chamber.
    Type: Application
    Filed: July 23, 2013
    Publication date: January 29, 2015
    Inventor: Barton Lane
  • Patent number: 8938021
    Abstract: Disclosed is a method and apparatus for reducing outbound interference in a broadband powerline communication system. Data is modulated on first and second carrier frequencies and is transmitted via respective first and second lines of the powerline system. A characteristic of at least one of the carrier signals (e.g., phase or amplitude) is adjusted in order to improve the electrical balance of the lines of the transmission system. This improvement in electrical balance reduces the radiated interference of the powerline system. Also disclosed is the use of a line balancing element on or more lines of the powerline system for altering the characteristics of at least one of the power lines in order to compensate for a known imbalance of the transmission system.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: January 20, 2015
    Inventor: Paul Shala Henry
  • Patent number: 8896393
    Abstract: A coupling interface couples a transceiver to one or more capacitive voltage dividers of a power transmission system. The coupling interface includes a first signal path including an adjustable inductance configured to form a resonance circuit with a capacitance associated with the one or more capacitive voltage dividers. The coupling interface may include a second signal path including an adjustable inductance configured to form a resonance circuit with the capacitance associated with the one or more capacitive voltage dividers.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: November 25, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Riccardo Fiorelli, Antonio Cataliotti, Dario Di Cara, Giovanni Tine
  • Publication number: 20140327494
    Abstract: A transmission circuit includes a first path that connects a first terminal for inputting or outputting signals, and one of a pair of second terminals for outputting or inputting the signals; a second path that connects the first terminal and another one of the pair of second terminals; a first circuit including a first capacitor that is serially inserted in the first path, which is configured to perform single-differential conversion on signals transmitted through the first path, to perform impedance matching, and to supply a bias voltage; a second circuit including a first inductor that is serially inserted in the second path, which is configured to perform single-differential conversion on signals transmitted through the second path, to perform impedance matching, and to supply a bias voltage; and a switch that is connected between the two terminals of the pair of second terminals.
    Type: Application
    Filed: April 29, 2014
    Publication date: November 6, 2014
    Applicants: FUJITSU LIMITED, FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Hiroyuki Sato, Yoshihiko Matsuo
  • Patent number: 8872599
    Abstract: A power synthesis circuit for a radio frequency (RF) power amplifier comprises a first matching network and a second matching network, which are connected with two-band signal output ports of the RF power amplifier respectively, and signal coupling circuits which are connected with two-band signal receiving ports respectively. The first matching network and the second matching network are connected with an antenna circuit via a duplexer, and are grounded via an inductor and a switch element which is connected in parallel to the inductor respectively. The leakage of signal among different channels is prevented. The transmission quality of the RF signal is improved. The cost of the power amplifier is reduced and the structure of the power amplifier is simplified.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: October 28, 2014
    Assignee: ZYW Microelectronics, Inc
    Inventors: Fengxiong Peng, Xuguang Zhang