Abstract: A CTD transversal filter is disclosed which comprises a CTD arrangement with parallel inputs and evaluation circuits. The evaluation coefficients are set up in digital fashion by means of comparator-controlled input sequences of signal-dependent quantities of charge. High value coefficients may be established without the need to reduce a lower frequency transmission limit. With the invention, the transfer electrodes of the CTD are not supplied with the normal clock voltages but with the output voltages of a shift register in which circulates an item of logic information which forwards the input charges individually and consecutively by one electrode spacing. The application of this "electrode-per-bit" operation results in a considerable increase in the times for the individual input sequences. The invention is useful in programmable frequency filters.

Abstract: The charge-coupled device comprises at least one transfer electrode connected to a control line for transmitting a transfer signal. The circuit for measuring the charge stored in the device comprises a resistor inserted in the control line and a circuit for integrating the voltage appearing at the terminals of the resistor during application of the transfer signal.

Abstract: An input signal X(j) is fed directly to the positive port of a summing function and is simultaneously fed through a parallel channel in which it is delayed, and passed through an adaptive linear transversal filter, the output being then subtracted from the instantaneous input signal X(j). The difference, X(j)-Y(j), between these two signals is the error signal .epsilon.(j). .epsilon.(j) is multiplied by a gain .mu. and fed back to the adaptive filter to readjust the weights of the filter. The weights of the filter are readjusted until .epsilon.(j) is minimized according to the recursive algorithm: ##EQU1## where the arrow above a term indicates that the term is a signal vector. Thus, when the means square error is minimized, W.sub.(j+1) =W.sub.(j), and the filter is stabilized.

Abstract: A transversal filter utilizes a charge transfer device (CTD) shift register having parallel inputs and evaluation circuits assigned to those inputs. The evaluation circuits which form evaluation coefficients by reading-in signal-dependent amounts of charges. The charges are summed in the shift register and the charges successively reaching the output level are read out in series in order to form the filtered output signal. An electric coefficient setting is provided which guarantees a large relative adjustment range having a small requirement for semiconductor surface. The evaluation circuits have separately actuated source zones or additional source zones which are arranged in pairs on opposite sides of the CTD transfer channel, or which are provided with gate oxide and field oxide areas arranged beneath a transfer gate between the evaluation circuits and the shift register. A transversal filter constructed according to the invention is suitable for use as an electrically programmable frequency filter.

Abstract: A charge coupled device (CCD) transversal filter (TVF) having an improved electrode configuration and connecting arrangement which minimizes the noise that is added to the signal to provide a relatively high amplitude output signal and a relatively high output signal-to-noise ratio. The CCD transversal filter operates with the weighting coefficients determined by the one sided width of the electrodes and with one end of the split electrodes coupled to the output and the other ends of the split electrodes coupled to a reference voltage source. When some of the weighting coefficients of the desired impulse response are negative the output ends of the weighting electrodes are selectively connected to either the inverting or noninverting common connections of a differential amplifier in turn providing the transversal filter output signals. For a single polarity impulse response, all of the electrodes are coupled to an output arrangement without requiring an inversion.

Abstract: A transversal filter is disclosed in which the stages of an analog charge transfer device shift register, integrated on a doped semiconductor substrate, are provided with parallel inputs and evaluation circuits preconnected to the parallel inputs. The evaluation circuits respectively exhibit an area doped opposite to the substrate, a first input gate and a second input gate and a transfer gate, whereby the transfer gate is arranged immediately next to the transfer channel of the charge transfer device shift register. The one input gate is connected to an input signal, the other input gate is connected to a constant direct voltage, the oppositely doped area is connected to a first clock pulse voltage and the transfer gate is connected with a second clock pulse voltage. The output signal can be tapped at an output of the charge transfer device shift register. Comparators are provided having first inputs connected with a counter which is loaded with clock pulses and second inputs connected with digital memories.

Abstract: Methods and apparatus for compensating for charge transfer inefficiency in imaging and other variable length charge transfer devices are disclosed. In accordance with the method a recursive filter is used to compensate for the transfer inefficiency of the device with the coefficients of the recursive filter being dependent upon the pixel position and the inefficiency per transfer, or more particularly upon the inefficiency per transfer and the number of transfers required to transfer from the pixel position to the output of the charge transfer device. In addition, a variable gain control is used to restore the amplitude of the output signal dependent upon the pixel position and inefficiency per transfer. Substantial compensation is achieved utilizing recursive filter coefficients linearly increasing with the number of transfers required, with an automatic gain control amplifier also linearly increasing in gain proportional to the number of transfers required to restore signal amplitude.

Abstract: A variable delay system in which multistage delay lines are "shared" between different elements (e.g. different transducer elements or segments). A plurality of delay lines are provided, the delay lines having respectively different numbers of stages. The signals from the first and last segments of a segmented transducer are applied to opposing ends of the delay line having the largest number of stages. The signals from the second and next-to-last segments of the transducer are applied to opposing ends of the delay line having the next-to-largest number of stages, and so on. A plurality of coupling circuits are respectively associated with the plurality of delay lines and are operative to sample, as a function of time, the signals at different delay stages of their respective delay lines. The outputs of the coupling circuits are combined to form an image-representative signal.

Abstract: A charge transfer device having a source diffusion region, an isolation gate region, a reference voltage gate region and an input signal gate region disposed contiguously along such device, the isolation gate region being adapted for coupling to a pulse voltage source, the duration of such pulse being related to a predetermined sampling interval (and therefore related to the bandwidth of an input signal being sampled), the reference voltage gate region being adapted for coupling to a reference voltage source and the input signal gate region being adapted for coupling to the input signal. During each clock interval prior to the sampling interval the source diffusion region is pulsed, thereby enabling charge to pass from such region into the reference voltage gate region and the input gate region.

Abstract: A one bit by N correlation digitally programmable filter comprising a multi-phase charge-transfer shift register whose phase are selectively clocked to achieve the programming. One phase is coupled to an integrator circuit that generates an output voltage proportional to the sum of the charged packets transferred. The clocking cycle is repeated sequentially to generate other selected summations. A plurality of correlators are utilized in parallel to perform an M bit by N correlation.

Abstract: A bandpass filter is disclosed which includes a low-pass filter and an analog delay circuit in which the delay time is set by a clock signal. THe analog delay circuit samples the voltage of the low-pass filter capacitor and delays the sampled voltage according to the clock signal. The output of the analog delay circuit is then used to equalize within a certain period of time the voltage of the low-pass filter capacitor. The analog delay circuit may consist of an integrated circuit BBD (Bucket Brigade Device) or CCD (Charge Coupled Device).

Abstract: In the illustrated embodiments, the space required for a transversal filter with a given number of evaluation factors is reduced by providing valuator circuits embodying such factors as inputs to each successive capacitor element of a charge shifting device. In one mode of operation the signal to be filtered is sampled via the valuator circuits on each charge shift cycle while readout from the series output occurs on alternate cycles. Since the readout scanning frequency is a submultiple of the input sampling frequency, the filter is well suited as a low-pass filter.

Abstract: An analog signal is processed through a lowpass filter and then regularly mpled at different sample times by a plurality of charge coupled devices. The outputs of the charge coupled devices are then summed and applied to a second lowpass filter which acts to produce a reconstructed and delayed version of the original analog signal. With this arrangement the time delay associated with each charge cell of the charge coupled devices is a whole number multiple of the effective sampling period of the system, and significant decreases in charge transfer distortion are achieved.

Abstract: A transversal filter has at least one analog shift register which includes a number of parallel inputs and one series output. A further number of individual, predeterminable evaluator circuits are provided, each evaluator circuit having at least one signal input for the input of the signal to be filtered and at least one output, and each evaluator circuit comprises a pair of capacitors arranged on a surface of a substrate. The substrate has at least one substrate terminal and comprises doped semiconductor material which carries a first insulating layer or blocking layer capacitor which contacts an oppositely doped zone located on the surface of the substrate and which is provided with a terminal contact. A second insulating layer or blocking layer capacitor is arranged beside the first capacitor, the second capacitor connectible, via a switching element, to an associated parallel input.

Abstract: By combining a number of integrators with periodically switching means, which are sensing an input signal during circularly successive time intervals, sampled values are available for some of the latest time intervals sampled with a sampling frequency. By switching these values in a successive manner to an analog arithmetic circuit, it is possible to obtain an output signal with useful band-pass and band-reject properties depending on the sampling period and the arithmetic operation. According to one preferred embodiment, the output signal is the mean over the latest time intervals, giving an averaging system which, contrary to RC circuits, has a strictly limited memory. According to another preferred embodiment, the output signal is the different between the outputs of two integrators.

Abstract: A CTD (charge transfer device) transversal filter that utilizes displacement current charge substraction techniques to create positive displacement current charge summation for some electrodes and negative displacement current charge summation for other electrodes into and out of a common electrode node. The operation is accomplished by shifting by one half bit all signal charges within the negative tap structure with respect to the signal charges within the positive tap structure. Thus, only a single summing capacitance node is utilized with all taps, plus and minus, being connected together, eliminating the differential amplifier requirement of other CTD transversal filters. An arrangement of either zero tap weights with an extra one bit delay or a separate high-frequency pulse eliminating a one bit delay are utilized to provide or not provide, as desired, zero weighting between the tap sections.

Abstract: A filter comprising a charge-coupled device having a first group of cells weighted according to a recurring filter law and having a second group of cells weighted according to a non recurring filter law. The cells of the first and second groups are interposed alternately and the displacement of the charges under these cells is carried at frequency twice that of the sampling rate of the input signal. Thus the effects of transfer inefficiency are suppressed without added hardware.

Abstract: A transversal filter with a charge shift device is disclosed for realizing a given filter function. The charge shift device includes a substrate of doped semiconductor material having arranged on one surface thereof a series of shift elements, each shift element having a plurality of capacitor elements in correspondence to the number of shift pulse sequence lines employed with the charge shift device. A serial input is provided for the filter to which an input signal is connected. Capacitor elements connected to one of the shift pulse sequence lines have non-reactive amplifying output units connected thereto. At least one of the capacitor elements connected to at least one of the other shift pulse sequence lines has an additional non-reactive amplifying unit connected thereto. All of the non-reactive amplifying units also connect with an output of the filter.

Abstract: In an illustrated embodiment, at least one analog shift register has a number of parallel inputs and one series output. A number of individual evaluating circuits receive the signal to be filtered and supply respective output quantities of charge equal to the product of the difference between the relevant signal value and a predetermined minimum or maximum value, and a respective individual evaluation factor. The output of each evaluating circuit can be connected via a switching element to an associated parallel input. According to the present teaching, a considerably lesser space requirement is realized by operating the filter so that for every consecutive scanned value of the signal each evaluating circuit is read in twice consecutively with a charge shift between such read-in processes, no charge shift being effected between the second read-in process and the first read-in process for the next scanned signal value. Read-in of the held signal may be effected more than twice.

Abstract: Apparatus for chorus effect in an electronic musical instrument in which a passing circuit for a musical tone signal is obtained from a musical tone signal generator by operation of a key. The passing circuit is connected to a plurality of variable delay circuits which are individually controlled by a plurality of delay control signals generated by a delay control signal generator. The passing circuit for the musical tone signal has a format filter, as well as a keying signal generating circuit. An output terminal of this keying signal generating circuit is connected to a voice production initial stage change control signal generator. The latter control signal generator has an output terminal connected to the musical tone signal generator or the delay control signal generator.

Abstract: A delay line time compressor which can be operated at different multiplicon factors by virtue of changes in the length of the recirculation loop for selected parts of the recirculation routine. A preferred embodiment utilizes an organization of parallel recirculation loops and is well adapted to semiconductor shift register implementation. Another embodiment utilizes a single high frequency delay element such as glass, in combination with a shift register.

Abstract: A tapped delay line transversal filter utilizing both surface acoustic wave and charge coupled device technologies, the surface acoustic wave tapped delay line portion providing a coarse selection and the charge coupled device tapped delay line portion providing vernier weighting.

Abstract: In illustrated embodiments, at least one analogue shift register has a number of parallel inputs and one series output. A number of individual evaluating circuits receive the signal to be filtered and supply respective output quantities of charge equal to the product of the difference between the relevant signal value and a predetermined minimum or maximum value, and a respective individual evaluation factor. The output of each evaluating circuit can be connected via a switching element to an associated parallel input. The capacity of every storage position of the shift register is at least such that it is always able to accommodate the maximum quantity of charge supplied by the preceding storage position, and when the storage position has a parallel input, can additionally accommodate the maximum quantities of charge supplied by the associated evaluating circuit (s). Various modifications are disclosed for reducing the space requirement of a transversal filter when implemented, for example, as a CCD.

Abstract: An analog signal processing apparatus of series write-in and parallel read-out type includes a charge transfer device with a plurality of stages and for transferring sampled analog signal charge packets in response to transfer pulses applied. After stoppage of transfer pulses supply, a signal charge packet is shifted to a storage region provided adjacent to a signal charge storage site at each stage. The signal charge packet is kept in the storage region until an analog input signal is rewritten into the device. A signal charge read-out device is coupled with the storage region. The amount of signal charge stored in the storage region increases with time during the charge storage period of time due to generation of dark current charge. Means for removing dark current charge is provided.

Abstract: A transceiver includes a first mixer and a detector in the receive signal path and a second mixer and modulator in the transmit signal path, all of which are coupled to and are operated by programmable counter circuits clocked by a single reference frequency generator. In one embodiment, a charge transfer device filter, which is connectable to both the receive and transmit signal paths by a switch and which has an adjustable bandwidth and center frequency, is also coupled to and operated by a programmable counter circuit which is clocked by the single reference frequency generator.

Abstract: This specification describes a charge-transfer device transversal filter chip in which an input signal is fed in parallel into a number of channels the outputs of which are summed together to provide the desired transversal filter transfer function. Each channel contains an analog shift register, a signal splitter and a polarity selector. The shift registers are of unequal length to provide a different delay thru each channel. The signal splitter provides a plurality of signal paths thru each channel while the polarity selector determines whether a given path in a given channel is added or subtracted in the summation to determine the gain of the given channel in the summation.

Abstract: A transversal filter of the split electrode type employing a bucket-brigade device (BBD) is described. The BBD wells extend beyond the edges of the clocked gates of the BBD below second gates of different areas. These mask programmed second gates provide the filter output. Unlike other split electrode, capacitance sensing filters, these gates are not clocked, thus the filter has simplified output circuitry and a greater dynamic range.

Abstract: Operating circuitry for linear charge launching, non-destructive weighting and non-destructive charge sensing for Charge Coupled Devices (CCD) employs electronic integrating circuitry at the input and output node terminals of the CCD. Feedback circuitry within the integrating circuitry aids in linearizing the signals, in eliminating the non-linear capacitance effect of the depletion regions, and in freeing the design from device parameter variations such as electrode area and absolute values of threshold potential and thickness of insulating layer. The circuitry is adaptable to most conventional CCD and is readily made up of conventional resistance and capacitance elements, of conventional comparing circuits such as differential amplifying or signal repeating circuits, and of conventional summing circuitry.

Abstract: Disclosed is a radio system comprising mixing means for simultaneously receiving electronic input signals consisting of a plurality of non-overlapping frequency bands and first clocking signals having a first selectable frequence. The mixing means frequency shifts the input signals by the first selectable frequency. A charge transfer device transversal filter has inputs coupled to receive the frequency shifted signals. The charge transfer device filters one frequency band from the frequency shifted signals and further frequency shifts the selected band in response to a second clocking signal. Demodulator means is coupled to the output of the charge transfer device filter for demodulating the selected one further downshifted frequency band.

Abstract: A cascade charge coupled delay circuit including a plurality of serial delay line sections formed on a single semiconducter wafer, said delay line sections being directly coupled to one another through the wafer and means for independently clocking each section of said lines.

Abstract: A non-destructive sensing of mobile charge in charge transfer devices or other MOS devices is accomplished by the use of a circuit utilizing two operational amplifiers. One operational amplifier is employed as an inverting amplifier responsive to one input signal, and the other operational amplifier is employed as a summing amplifier responsive both to a second input signal and to the output signal from the first operational amplifier. The electrodes of the MOS device being sensed, as well as capacitors in the sensing circuit, are precharged to given voltage levels before the actual sensing occurs.

Abstract: A charge transfer device transversal filter is provided having electronically controllable weighting factors. Two equivalent and corresponding charge transfer device shift registers have floating electrodes sandwiched between the sensing electrodes and the substrate for biasing the underlying depletion regions and thereby controlling the effective capacitances thereof. Depletion capacitances are controlled so as to produce desired weighting factors when corresponding and otherwise equal charging currents are substrated one from the other.

Abstract: An input stage for a transversal charge transfer filter, which suppresses parasitic image frequencies. It comprises two parallel channels to which the input signal is applied simultaneously. Sampling of the signal is performed in each channel with a periodicity Te, and a relative phase-shift of Te/2. The two samples are then added in order to eliminate components having periodicities in the neighborhood of Te.The present invention relates to low-pass filters using the phenomenon of electrical charge transfer occurring in a semiconductor. It relates more particularly to an input stage for this kind of CTD (Charge Transfer Device) filter, which attenuates parasitic frequencies.The design of CTD low-pass filters, often referred to as transversal filters, poses a classic problem due to the fact that the input stage is a sampling stage.

Abstract: The invention relates to hybrid filters comprising a recursive part and a non-recursive part which make it possible to synthesize the filter by splitting the desired pass-band into two. It consists in using for the design of such a filter a charge-coupled device (CCD) in which these two parts are directly linked by a simple charge transfer mechanism without any other connection.