Abstract: A value of gain is updated so that the greater the difference between the number of bits or estimated number of bits in a code obtained by encoding a string of integer value samples obtained by dividing each sample in a sample string derived from an input audio signal in a given interval by gain before the update and a predetermined number B of allocated bits, the greater the difference between the gain before the update and the updated gain. A gain code corresponding to the updated gain and an integer signal code obtained by encoding a string of integer value samples obtained by dividing each sample in the sample string by the gain are obtained.

Abstract: Apparatuses and devices are provided for bias level correction. An example apparatus includes: a bias-voltage generator configured to generate a bias voltage; a first transmission component configured to receive the bias voltage and generate a first output signal based at least in part on the bias voltage and one or more first data signals; and a first bias-level correction component configured to generate one or more first pulses based at least in part on the one or more first data signals to suppress one or more ripples associated with the bias voltage.

Abstract: An RF front-end with on-chip transmitter/receiver isolation using a gyrator is presented herein. The RF front end is configured to support full-duplex communication and includes a gyrator and a transformer. The gyrator includes two transistors that are configured to isolate the input of a low-noise amplifier (LNA) from the output of a power amplifier (PA). The gyrator is further configured to isolate the output of the PA from the input of the LNA. The gyrator is at least partially or fully capable of being integrated on silicon-based substrate.

Abstract: An RF front-end with on-chip transmitter/receiver isolation using a gyrator is presented herein. The RF front end is configured to support full-duplex communication and includes a gyrator and a transformer. The gyrator includes two transistors that are configured to isolate the input of a low-noise amplifier (LNA) from the output of a power amplifier (PA). The gyrator is further configured to isolate the output of the PA from the input of the LNA. The gyrator is at least partially or fully capable of being integrated on silicon-based substrate.

Abstract: An RF front-end with on-chip transmitter/receiver isolation using a gyrator is presented herein. The RF front end is configured to support full-duplex communication and includes a gyrator and a transformer. The gyrator includes a metal plate and an inductor that are configured to isolate the input of a low-noise amplifier (LNA) from the output of a power amplifier (PA) using the Hall effect. The gyrator is further configured to isolate the output of the PA from the input of the LNA. The gyrator is at least partially or fully capable of being integrated on silicon-based substrate.

Abstract: Switch circuits are disclosed, for providing a single-ended and a differentially switched high-voltage output signals by switching a high supply voltage in response to at least one logic-level control signal. The switch that provides the single-ended switched high-voltage output signal includes a chain of at least three serially coupled field effect transistors (FETs). The chain receives the high supply voltage and switches it to output the high-voltage output signal. The switch that provides the differentially switched high-voltage output signal includes two differentially coupled chains, each having at least three serially coupled FETs. The chains receive the high supply voltage and switch it to output the differential high-voltage output signal. A control/bias circuit provides a control voltage to at least one of the FETs in the chains, responsive to the control signal.

Abstract: The present disclosure relates to techniques for simulating electrical inductance.

Abstract: The invention provides an electrode arrangement for a capacitive sensor device and for a capacitive sensor, respectively, for detecting a position and/or an approach of an object, which comprises a sensor electrode and a first shield electrode, wherein the sensor electrode is arranged on a first side of a substantially flat substrate with a first side and a second side, and wherein the first shield electrode is arranged on the second side of the substrate and serves for shielding the alternating electric field emitted by the sensor electrode from ground. There is also provided a foil with an electrode arrangement according to the invention as well as a method for the production of a display arrangement with an electrode arrangement according to the invention.

Abstract: An embodiment of the invention provides a single-ended polar transmitting circuit. The single-ended polar transmitting circuit comprises a DAC, a differential-to-single-ended converter, a GmC filter and a load. The GmC filter comprises two gain stages, two filters, two switching devices, a translinear loop and a current mirror. When a second clock signal is high, a first current is conducted through the load, a second switching device and a second gain stage. When a first clock signal is high, a second current is conducted through a first switching device and the second gain stage. The first gain stage has a transconductance Gm1 and the second gain stage has a transconductance Gm2. The bandwidth of the GmC filter is approximately equal to the square root of the quantity (Gm1*Gm2)/(C1*C2). The bandwidth of the GmC filter is substantially a constant value.

Abstract: Switch circuits are disclosed, for providing a single-ended and a differentially switched high-voltage output signals by switching a high supply voltage in response to at least one logic-level control signal. The switch that provides the single-ended switched high-voltage output signal includes a chain of at least three serially coupled field effect transistors (FETs). The chain receives the high supply voltage and switches it to output the high-voltage output signal. The switch that provides the differentially switched high-voltage output signal includes two differentially coupled chains, each having at least three serially coupled FETs. The chains receive the high supply voltage and switch it to output the differential high-voltage output signal. A control/bias circuit provides a control voltage to at least one of the FETs in the chains, responsive to the control signal.

Abstract: The present invention is directed to provide a low-power-consumption wide-range RF signal processing unit having a small chip occupation area. A semiconductor integrated circuit has, on a semiconductor chip, a resonant circuit including a first capacitor having a capacitance which can be controlled by a first control signal of a first control terminal, and a gyrator for equivalently emulating an inductor by including a second capacitor having a capacitance which can be controlled by a second control signal of a second control terminal. The capacitance and the inductor form a parallel resonant circuit. At the time of changing parallel resonant frequency, the capacitances of the first and second capacitors are coordinately changed. The parallel resonant circuit is suitable for an active load which is connected to an output node of an amplifier.

Abstract: The present disclosure relates to techniques for simulating electrical inductance.

Abstract: Methods and apparatus are provided for programmable active inductance. The disclosed active inductor devices provide a tunable bandwidth with improved linearity. The disclosed active inductors have a variable frequency response corresponding to a variable inductance of the active inductor. The active inductor comprises a variable resistive circuit having an effective resistance, wherein the variable resistive circuit is comprised of at least one resistor that can be selectively bypassed in the variable resistive circuit to vary the effective resistive. The active inductor has an inductance that can be varied by varying the effective resistance.

Abstract: A gyrator includes a gyrator core and at least one common mode feedback circuit. The gyrator core includes four inverters mutually connected in a loop configuration between a pair of input ends and a pair of output ends. The common mode feedback circuit is provided between the pair of input ends and/or the pair of output ends and includes a forward-reverse connection inverter set and a backward-reverse connection inverter set. The forward-reverse connection inverter set has a first inverter, a second inverter connected in reverse series with the first inverter, and a first feedback resistor connected in parallel with the second inverter. The backward-reverse connection inverter set has a third inverter, a fourth inverter connected in reverse series with the third inverter, and a second feedback resistor connected in parallel with the fourth inverter.

Abstract: An active inductor includes bipolar transistors T1, T2, T3 and TD (TD being arranged in diode), where T1's emitter is connected to an output port and to T2's collector. T2's base is connected to a first voltage line and between two connected capacitors. T2's emitter is connected to T3's collecter. An end of one capacitor is connected to T1's base and to a second voltage line. An end of the other capacitor is connected to T3's emitter and to a third voltage line. T1's collector is connected to a fourth voltage line and to TM's collecter, which is connected to TM's base. TM's emitter is electrically connected to T3's base. Preferably, the transistors T1-T3 and TD are Silicon based, and the active inductor is fabricated on a single substrate comprising Silicon. The active inductor is incorporated into adaptive oscillators and amplifiers and an improved transceiver.

Abstract: The present invention is directed to provide a low-power-consumption wide-range RF signal processing unit having a small chip occupation area. A semiconductor integrated circuit has, on a semiconductor chip, a resonant circuit including a first capacitor having a capacitance which can be controlled by a first control signal of a first control terminal, and a gyrator for equivalently emulating an inductor by including a second capacitor having a capacitance which can be controlled by a second control signal of a second control terminal. The capacitance and the inductor form a parallel resonant circuit. At the time of changing parallel resonant frequency, the capacitances of the first and second capacitors are coordinately changed. The parallel resonant circuit is suitable for an active load which is connected to an output node of an amplifier.

Abstract: The invention proposes a negative gain transconductance amplifier circuit (1) for capacitive load that includes: an RC serial circuit connected between an input terminal (E) of the amplifier circuit and a intermediate terminal (A); an amplification level connected between the intermediate terminal and an output terminal (S) designed to be connected to a capacitive load, and which includes: a first negative gain transconductance amplifier (2) connected via open loop between the intermediate terminal and the output terminal; a second negative gain transconductance amplifier (3) with characteristics that are notably identical to those of the first amplifier, connected via closed loop; its input and output are connected to the intermediate terminal via a resistance (R1).

Abstract: A resonator circuit is shown that is fabricated with substantially identical elements disposed symmetrically along an axis such that the circuit has a linear response to bias current. The alignment of the circuit permits multiple characteristics of the circuit to be calibrated.

Abstract: An amplifier circuit comprising a transconductor device connected to a phase shifter section. The phase shifter section has an adjustable phase shift and an impedance at least partially dependent of the frequency of an input signal. In use, the adjustable phase shift is adjusted to have substantially the opposite value of a phase shift of the transconductor device. In an embodiment, the phase shifter section comprises a capacitor device and an adjustable resistor device which comprises an amplifier device with an input contact for receiving a resistance control signal; a first output contact connected to the capacitor devices and a second output contact connected to the transconductor device. The amplifier circuit further comprises a control device for providing said resistance control signal to the input contact of the amplifier device.

Abstract: An active inductor capable of tuning a self-resonant frequency, an inductance, a Q factor, and a peak Q frequency by applying a tunable feedback resistor to a cascode-grounded active inductor is disclosed. The tunable active inductor includes a first transistor having a source connected to a power supply voltage and a gate connected to first bias voltage; a second transistor having a drain connected to a drain of the first transistor and a gate connected to a second bias voltage; a third transistor having a drain connected to a source of the second transistor and a source connected to a ground voltage; a fourth transistor having a drain connected to a gate of the third transistor, a source connected to the ground voltage and a gate connected to a third bias voltage; a fifth transistor having a source connected to the drain of the fourth transistor and a drain connected to the power supply voltage.

Abstract: Compensation of effects derived from bandwidth limitations of an active frequency-selective circuit is effected by appropriately coupling a resistance to the frequency-selective circuit. In one embodiment, the resistance is designed to have a value that is inversely related to the tangent of a phase-shift at a compensation frequency.

Abstract: The present invention provides an active inductor apparatus and system, having a variable frequency response through inductance adjustment. The active inductor apparatus comprises a variable resistive element and a variable gain element, and the system further comprises an inductance controller and a gain controller. The variable resistive element has a first terminal and a second terminal, with the second terminal capable of receiving a first adjustment signal. The inductance controller is capable of providing the first adjustment signal to control and adjust a resistance level of the variable resistive element. The variable gain element has a third terminal capable of receiving a second adjustment signal. The gain controller is capable of providing the second adjustment signal to control and adjust a transconductance of the variable gain element.

Abstract: An active inductor circuit (L) includes first (T1) and second (T2) terminals for coupling to respective external terminals (Hi,Lo), said first and second terminals being coupled to a first transconductance circuit (gm1), a second transconductance circuit (gm2) and a feedback circuit (fb) included in said active inductor circuit. An output terminal (OUT1) of said first transconductance circuit (gm1) is coupled to an input terminal of said second transconductance circuit (gm2), an output terminal (OUT2) of said second transconductance circuit (gm2) is coupled to an input terminal (IN1) of said first transconductance circuit (gm1) via said feedback circuit (fb), and said active inductor circuit further including a capacitor (C1) coupled between said output terminal (OUT) of said first transconductance circuit (gm1) and said second terminal (T2).

Abstract: A radiotelephony device employing filters and methods for eliminating a DC component from an electronic signal provide for circuitry having a zero corresponding to a cut-off frequency, and circuitry for shifting the zero by an amount corresponding to the absolute value of that cut-off frequency. In such radiotelephony device, the filters and methods, which include integration and operation of gyrators, tend to be (a) suited for incorporation in integrated circuits by virtue of reducing the physical size of the required capacitors and (b) reduce time-dependent inertia.

Abstract: An active inductor circuit implemented in sub-micron CMOS semiconductor technology is usable at gigaHertz frequencies and includes an input node, a non-inverting transconductor circuit comprising a differential pair of NMOS transistors connected to the input node, an inverting transconductor circuit comprising an NMOS transistor connected to an output node of the non-inverting transconductor circuit and connected to the input node in a gyrator feedback configuration. Varactors coupled to the transconductor circuits tune the frequency and Q of the active inductor circuit.

Abstract: A system on chip such as a radio receiver has reduced suceptibility to voltages in the bulk silicon by using gyrator elements in the receiver with each gyrator element including a plurality of current sources interconnected to provide output transconductance voltages, and a variable load for the current sources including first and second load resistors each serially connected with one other plurality of current sources. A variable resistance interconnects nodes of the load resistors with the variable resistance comprising a pair of native MOS transistors having low threshold voltages. In a preferred embodiment the first and second load resistors comprise first and second MOS transistors with the pair of native transistors serially connected between source elements of the first and second MOS transistors.

Abstract: A transistor M1 has its drain connected to a source of a transistor M2 through a capacitor Cc3. A series connection of a resistor R and a capacitor Cc1 is provided between a source of the transistor M1 and a gate of the transistor M2. The transistor M1 has its gate connected to a drain of the transistor M2 through a capacitor Cc2. Appropriate dc bias potentials P1, P2 and P3 are provided for the drain of the transistor M2, the gate and the drain of the transistor M1, respectively, so that an active inductor is obtained between the gate and the source of the transistor M2.

Abstract: The invention relates to an integrated gyrator structure, in which each transistor in the gyrator core (preferably MOS devices) has series feedback associated therewith. This allows for compensation over a large bandwidth of the effects of channel delay in the MOS transistors.

Abstract: Filters and methods for eliminating a DC component from an electronic signal provide for circuitry having a zero corresponding to a cut-off frequency, and circuitry for shifting the zero by an amount corresponding to the absolute value of that cut-off frequency. The filters and methods, which include integration and operation of gyrators, are particularly well-suited for incorporation in integrated circuits by virtue of reducing the physical size of the required capacitors. A further advantage is the reduction of time-dependent inertia. Applications of the filters and methods include, but are not limited to, radiotelephony.

Abstract: An active inductor includes an MOSFET having a gate, a drain serving as an output terminal and a grounded source, the MOSFET having a transconductance gm1, and a capacitor having opposite ends, one of which is grounded and the other of which is connected to the gate of the MOSFET and to a voltage-controlled constant current source having a transconductance gm, the capacitor having a capacitance C, the active inductor being operative with a small-signal output impedance Zo between the output terminal and the ground expressed as Zo=j&ohgr;{C/(gm1·gm)} (wherein &ohgr; is an angular frequency) and with an inductance Leq expressed as Leq={C/(gm1·gm)}.

Abstract: A system on chip such as a radio receiver has reduced suceptibility to voltages in the bulk silicon by using gyrator elements in the receiver with each gyrator element including a plurality of current sources interconnected to provide output transconductance voltages, and a variable load for the current sources including first and second load resistors each serially connected with one other plurality of current sources. A variable resistance interconnects nodes of the load resistors with the variable resistance comprising a pair of native MOS transistors having low threshold voltages. In a preferred embodiment the first and second load resistors comprise first and second MOS transistors with the pair of native transistors serially connected between source elements of the first and second MOS transistors.

Abstract: Integrated circuits, for example, gyrator circuits include transistors that are preferably MOS devices and that are provided with series feedback networks, which compensate for the effects of channel delay in the MOS devices.

Abstract: An innovated transimpedance amplifier circuit consists of a buffer circuit, a simulation resistance circuit, and an amplifier circuit. The buffer circuit for inputting a signal circuit is constituted by two FETs and a resistor, and has a high current input efficiency and function of widening circuit frequency band. The simulation resistance circuit is constituted by a resistor, two buffer units, a coupling capacitor, and a biasing resistor. When operating at a low frequency, the simulating resistance circuit permits a large amount of background DC to flow through; on the other hand, when operating at a high frequency, this circuit can improve the signal coupling efficiency and reduce foreign signal output voltage. On the whole, by the circuit of the present invention, both the detecting sensitivity and the amplification factor of the signal current can be significantly improved.

Abstract: A monolithic active frequency selection circuit includes an input presenting a frequency-dependent impedance and a first gain block configured to provide less than unity voltage gain, a high input impedance and a low output impedance. An output of the first amplifier is coupled to the frequency selection circuit input. The frequency selection circuit includes a first phase shifter that, in one aspect, is formed by a first capacitor coupled between the first port and a reference voltage. The frequency selection circuit also includes a second amplifier configured to provide greater than unity voltage gain. The second amplifier has an input coupled to the output of the first amplifier and an output coupled to the input of the first amplifier. The frequency selection circuit further includes a second phase shifter, which may be formed from a capacitor coupled between the output of the second amplifier and a reference voltage.

Abstract: An arrangement of differential amplifying-type gyrators is used to implement a signal-filtering circuit with significantly reduced power consumption. One specific example implementation is directed to a signal-filtering circuit arrangement that uses a gyrator-type signal-filtering circuit to simulate a multiple-section LC ladder implementation. A plurality of transconductance cells are arranged to simulate the first inductance ladder section and at least one subsequent inductance ladder section. The first inductance ladder section is adapted to provide a gain of two or three. By setting the gain of the first section in this manner, the noise contribution of the subsequent sections is significantly lessened relative to the conventional implementation in which the gain of the first section is unity.

Abstract: An inductorless voltage controlled oscillator that may be fabricated using CMOS circuit elements. In one aspect, the present invention includes a synthetic inductance formed on a substrate and having first and second power supply terminals and a signal port. Additionally, an active admittance transformation network is formed on the substrate and coupled to the synthetic inductance and to the port. The synthetic inductance manifests an admittance at the port which has an inductive component and a positive real component. The active admittance transformation network transforms the positive real component of the synthetic inductance admittance to a negative real component and preserves the inductive character of the synthetic inductance admittance. The synthetic inductance can provide an effective Q of greater than twenty. The active admittance transformation network and the synthetic inductance cooperate to produce a voltage-variable oscillation frequency in excess of fifty megahertz.

Abstract: A gyrator includes shunt or feedback nodal capacitors and shunt lossy inductors without shunt load resistors. The effective nodal capacitance is reduced by the introduction of the shunt lossy inductors. The inductors act to discriminate against injected power supply noise, resulting in improved oscillator phase noise. The inductors produces less drop dc voltage than the resistive load, so that larger linear oscillation is obtained with improved oscillator phase noise.

Abstract: First and second transconductance amplifiers OTA 1, OTA 2, each having two input terminals, and two output terminals are constructed in such a manner that a first input terminal of the OTA 1 is connected with a second output terminal of the OTA 2, a first output terminal of the OTA 1 and a first input terminal of the OTA 2 are connected to a capacitor which is grounded at one end, and a second input terminal and a second output terminal of the OTA 1 and a second input terminal and a first output terminal of the OTA 2 are AC-grounded.

Abstract: A demodulator circuit includes a gyrator circuit forming a derived equivalent inductance which is used in a demodulating circuit. The gyrator circuit has a first operational transconductance amplifier and a second operational transconductance amplifier, wherein a second input terminal of the first operational transconductance amplifier is connected to a first output terminal of the second operational transconductance amplifier. A second output terminal of the first operational transconductance amplifier is connected to a second input terminal of the second operational transconductance amplifier. Both of the second input terminal of the first operational transconductance amplifier and the second input terminal of the second operational transconductance amplifier are grounded via a constant dc voltage. A first output terminal of the first operational transconductance amplifier is connected to a first input terminal of the second operational transconductance amplifier.

Abstract: A microwave differential amplifier comprises a first and a second matched NMOS device, each connected with the source to a common bias node, the gate to an input port for receiving a differential input signal and with the drains to an output port for providing a differential output signal. The Miller capacitors of each device provide the necessary feedback between the input and output ports for shifting the phase of the differential output signal with respect to the phase of the differential input signal with 45.degree. at a predetermined frequency. The operating point of the NMOS devices is maintained in the linear region of the respective transfer characteristic, using matched loads and a corresponding bias current. The loads may be resistors, in which case AGC is used for maintaining a constant bias current, or active loads. A VCO built with four such differential amplifiers in a gyrator configuration oscillates at the predetermined frequency and has eight output signals.

Abstract: The grounded inductance circuit utilizing a gyrator circuit includes a first operational transconductance amplifier, a second operational transconductance amplifier and a first capacitor. A first output terminal of the first operational transconductance amplifier is connected to a first input terminal of the second operational transconductance amplifier, and a second output terminal of the first operational transconductance amplifier is connected to a second input terminal of the second operational transconductance amplifier. A first output terminal of the second operational transconductance amplifier is connected to a second input terminal of the first operational transconductance amplifier and a second output terminal of the second operational transconductance amplifier is connected to a first input terminal of the first operational transconductance amplifier.

Abstract: Apparatus for absorbing acoustic energy directed toward a wall. The appars includes a piezoelectric layer intermediate the wall and the source of the acoustic energy. Circuitry attached to the output of the transducer compensates blocked and motional capacitances of the transducer so that the output signal generates real current for dissipation in a resistor thereby to minimize any echo reflected from the piezoelectric layer.

Abstract: A voltage controlled oscillator (VCO) including a negative feedback circuit operates in response to a negative feedback signal generated during active transistor region operation of transistors in transconductance amplifying stages coupled thereto. As a result, harmonic distortion and problems of noise and unstable frequency oscillation are obviated or significantly reduced. The VCO includes first and second variable transconductance (gm) amplifying stages whose non-inverting (+) and inverting (-) terminals are respectively grounded and a first condenser connected between an output terminal of the first transconductance (gm) amplifying stage and a non-inverting (+) terminal of the second transconductance (gm) amplifying stage. A negative-resistive circuit is used to provide a negative feedback.

Abstract: A Y/C separation circuit includes a glass delay line for delaying an input composite video signal. A luminance signal and a chrominance signal are separated from each other by an adding circuit and a subtracting circuit each of which receives the input signal and an output signal from the glass delay line. The output signal from the glass delay line is phase-shifted by a 90.degree. phase shifting circuit and then inputted to a multiplier which further receives the input signal. The multiplier outputs an error signal according to a phase difference between color burst signals included in the both signals, and a control voltage according to the error signal is outputted from a low-pass filter. The control voltage is applied to gyrators which terminate an input and an output of the glass delay line, respectively, whereby an inductance value of each of the gyrators is controlled by the control voltage such that a delay time of the glass delay line can be exactly adjusted at one horizontal period.

Abstract: A filter (13) for providing temperature compensation for the quality factor thereof comprises transconductance amplifiers (23 and 24) in a gyrator configuration coupled between an input node (21) and an output node (22). A parallel capacitor (25) is coupled between the input node (21) and a supply voltage, and a parallel resistor (26) is coupled between the input node (21) and the supply voltage. A series capacitor (27) is coupled to the output node (22), and a series resistor (28) is coupled between the second capacitor (27) and the supply voltage.

Abstract: A broadband microwave active inductor circuit for producing a flat inductive response versus frequency comprises a pair of bipolar transistors arranged in a gyrator configuration for producing an active inductance. Because the transistors exhibit intrinsic characteristics which influence the inductive response of the active inductor circuit, a feedback network is connected to the gyrator configuration to compensate for the intrinsic characteristics of the transistors so that the active inductor circuit realizes a flat inductive response over a wide range of frequencies including microwave frequencies.

Abstract: A filter equipment comprises a plurality of filters, which are connected in cascade or in parallel. Characteristics of each filter are controlled according to an applied current. Desired characteristics can be realized by a relatively simple circuit configuration. The filter is controlled to adapt to PAL or NTSC standards, for example.

Abstract: A low pass filter using two pseudo gyrators 10 and 20 is disclosed. The gate-source capacitances of field effect transistors forming the pseudo gyrator circuit can be considered to be included in capacitors for forming the low pass filter. Therefore, an ideal admittance matrix for a gyrator is obtained. Increase in integration density of the low pass filter can be achieved since the low pass filter is formed by a simplified pseudo gyrator circuit.

Abstract: In a current level sensing circuit employing a gyrator to control an opto-isolator, a coupling circuit having an input impedance of a magnitude sufficiently higher than the output impedance of the gyrator that it does not substantially load the gyrator is employed to couple the gyrator output to the opto-isolator. In one embodiment, a differential amplifier receives the gyrator output at a first input which is associated with an output that is coupled to the isolator and a predetermined reference voltage supply is applied to a second input of the differential amplifier. A current sink is connected in a common load path portion of the differential amplifier and is otherwise connected to implement differential amplifier current limiting at a level which assures damage-free operation of the isolator as well as insensitivity to low amplitude electrical disturbances applied to the gyrator.

Abstract: An electrical circuit (200) comprises a first circuit (208) constructed and arranged to simulate an inductor and a second circuit (210) constructed and arranged to simulate an inductor. Coupled to these circuits is a third circuit (212) for simulating a mutual inductance therebetween.