Abstract: Various embodiments provide for a continuous time linear equalizer (CTLE) that includes an active inductor, which can be included in a receiver portion of a circuit. For some embodiments, the CTLE in combination with the active inductor can implement a signal transfer function comprising at least two zeros and two poles.

Abstract: A thin-film filter may include a monolithic substrate and a patterned conductive layer formed over the monolithic substrate. The patterned conductive layer may include at least one thin-film inductor. The thin-film filter may have a power capacity that is greater than about 25 W. In some embodiments, the thin-film inductor(s) may be connected between the input port and the output port. A heat sink terminal may be exposed along the bottom surface of thin-film filter. In some embodiments, the heat sink terminal may have an exposed heat sink area, and the bottom surface of the thin-film filter has an area that is less than 20 times larger than the exposed heat sink area.

Abstract: A device, a memory interface device, and a method of implementing an active inductor circuit are disclosed. In one aspect, the device includes one or more active inductor circuits, each including a first metal-oxide-semiconductor (MOS) transistor and a second MOS transistor. The first MOS transistor has a first terminal connected to a first voltage level, a second terminal connected to a resistor, and a gate terminal. The second MOS transistor has a first terminal connected to the first voltage level, a second terminal connected to a first current source and the gate terminal of the first MOS transistor, and a gate terminal connected to the resistor and to a capacitor connected to a second voltage level. One of the first MOS transistor and the second MOS transistor is a p-channel MOS (PMOS) transistor, and another of the first MOS transistor and the second MOS transistor is an n-channel MOS (NMOS) transistor.

Abstract: A radio frequency front end circuit includes an output signal transmission line, an amplifier circuit with an input connected to a radio frequency signal source and an output connected to the output signal transmission line. A harmonic suppression circuit is connected to the amplifier circuit, and includes an active circuit element having a frequency-dependent impedance and is tuned as a reflective trap with a negative capacitance for one or more rejection frequency ranges each corresponding to a multiple of a fundamental frequency of a signal generated by the radio frequency signal source.

Abstract: An electronic circuit simulating the behavior of an inductance between a respective input node and a reference potential. The electronic circuit comprises a compensation network electrically connected between ground and a source potential and an inverting amplification stage electrically connected to the output of the compensation network. The inverting amplification stage comprises a transistor having a control terminal connected to the input of the inverting amplification stage, a first bias terminal operatively connected to the output of the inverting amplification stage, and a second bias terminal operatively connected to ground. The inverting amplification stage further comprises a feedback capacitance interposed between the first bias terminal and the control terminal of the transistor, and a feedback inductance interposed between the second bias terminal of the transistor and ground.

Abstract: An active inductor circuit includes a field-effect transistor having a first source/drain adapted for connection with a first voltage source, a capacitor coupled between the first voltage source and a gate of the field-effect transistor, a resistor coupled between a second source/drain of the field-effect transistor and the gate of the field-effect transistor, and a current source coupled with the gate of the field-effect transistor. A voltage headroom of the active inductor circuit is controlled as a function of at least one of a magnitude of current generated by the current source and a resistance of the resistor.

Abstract: An electronic circuit simulating the behavior of an inductance between a respective input node and a reference potential. The electronic circuit comprises a compensation network electrically connected between ground and a source potential and an inverting amplification stage electrically connected to the output of the compensation network. The inverting amplification stage comprises a transistor having a control terminal connected to the input of the inverting amplification stage, a first bias terminal operatively connected to the output of the inverting amplification stage, and a second bias terminal operatively connected to ground. The inverting amplification stage further comprises a feedback capacitance interposed between the first bias terminal and the control terminal of the transistor, and a feedback inductance interposed between the second bias terminal of the transistor and ground.

Abstract: In one embodiment, a circuit, which comprises a resistor and a pMOS or cMOS transistor, has the characteristic of an inductor and produces an inductive impedance that operates over a substantially full range of a direct-current bias.

Abstract: There is provided an oscillator using a high-frequency crystal resonator which can satisfy the drive level needed for the crystal resonator and expand a variable frequency range. An oscillator having an oscillation circuit CC for oscillating the resonator SS is provided with a limiter circuit LM1 as a load of the resonator SS which is inductive and is a load circuit for limiting an oscillation amplitude. According to this configuration, the action of the limiter circuit LM1 allows satisfaction of the drive level needed for the crystal resonator and expansion of the variable frequency range.

Abstract: An active inductor circuit includes a field-effect transistor having a first source/drain adapted for connection with a first voltage source, a capacitor coupled between the first voltage source and a gate of the field-effect transistor, a resistor coupled between a second source/drain of the field-effect transistor and the gate of the field-effect transistor, and a current source coupled with the gate of the field-effect transistor. A voltage headroom of the active inductor circuit is controlled as a function of at least one of a magnitude of current generated by the current source and a resistance of the resistor.

Abstract: The present disclosure relates to techniques for simulating electrical inductance.

Abstract: An apparatus and method for manufacturing low-cost high-density compact active inductor module using existing DRAM, SRAM and logic process integration. The elements of the active inductor modules are formed by three semiconductor devices including nMOS devices, deep-trench capacitors and a polysilicon or TaN resistor. The active inductor modules can be connected in a parallel and/or serial configuration to obtain a wide range of inductance values. The modular active inductors can be advantageously stored in an ASIC library to facilitate a flexible and convenient circuit design.

Abstract: Methods and systems for VCO impedance control to optimize performance, efficiency, and power consumption are disclosed and may include selectively coupling one of a plurality of taps on a multi-tap inductive load to a voltage controlled oscillator (VCO) on a chip comprising a plurality of transmitters and receivers. The multi-tap inductive load may comprise a multi-tap transformer or transmission line, which may be integrated on the chip, or may be integrated on a package to which the chip is coupled. A voltage swing at an output of the VCO and/or a current in the VCO may be adjusted by configuring a load of the VCO utilizing the multi-tap inductive load. The multi-tap inductive load may be coupled to the VCO utilizing one or more CMOS switches.

Abstract: An linear equalizer system for a transmission channel includes an active inductor with a tunable inductance and quality factor. The active inductor includes a transconducting element. A current steering digital to analog converter controls the flow of a bias current through the transconducting element to tune the active inductor.

Abstract: A variable simulated inductor comprises an integrator connected to receive the voltage across the input to the circuit. The output of the inductor is connected to a control terminal of a transconductor connected across the input of the circuit. The gain of the transconductor is electronically controllable in order to control the inductance of the circuit. An oscillator using a variable simulated inductor and a piezoelectric resonator connected in parallel is also provided.

Abstract: An injection-locked frequency divider is provided. The injection-locked frequency divider includes an active inductor unit, a source injection unit, a first transistor and a second transistor. The injection-locked frequency divider generates a frequency-divided signal having a half frequency of the signal source. A locking frequency range of the injection-locked frequency divider is determined by a quality factor of a resonant cavity. A quality factor of the active inductor unit is lower than a conventional spiral inductor because the active inductor unit is composed of active elements. In the injection-locked frequency divider, the active inductor unit is used to instead of the conventional spiral inductor, so that the chip area can be reduced and the locking frequency range of the injection-locked frequency divider can be increased. Further, an induction value of the active inductor unit can be altered to change the locking frequency range of the injection-locked frequency divider.

Abstract: An apparatus and method for manufacturing low-cost high-density compact active inductor module using existing DRAM, SRAM and logic process integration. The elements of the active inductor modules are formed by three semiconductor devices including nMOS devices, deep-trench capacitors and a polysilicon or TaN resistor. The active inductor modules can be connected in a parallel and/or serial configuration to obtain a wide range of inductance values. The modular active inductors can be advantageously stored in an ASIC library to facilitate a flexible and convenient circuit design.

Abstract: The present disclosure relates to techniques for simulating electrical inductance.

Abstract: Methods and apparatus are provided for programmable active inductance. The disclosed active inductor devices provide a tunable bandwidth with improved linearity. The disclosed active inductors have a variable frequency response corresponding to a variable inductance of the active inductor. The active inductor comprises a variable resistive circuit having an effective resistance, wherein the variable resistive circuit is comprised of at least one resistor that can be selectively bypassed in the variable resistive circuit to vary the effective resistive. The active inductor has an inductance that can be varied by varying the effective resistance.

Abstract: The invention is characterized in that it comprises a plurality of impedances (R2, C3, R4, R5) and at least one operational amplifier (51, 52), and means (53) for connecting a resistive sensor (Rs) to the electronic circuit (50) such that, once the resistive sensor has been connected to the electronic circuit, a resulting electronic circuit is obtained that consists of the electronic circuit and the resistive sensor connected thereto, the input impedance (Zinp) of which corresponds to that of a variable capacitance as a function of the resistive sensor (Rs). A capacitative input impedance that can very as a function of a sensor is obtained.

Abstract: An amplifier comprises an amplifier stage and an active inductor. The amplifier stage has an input terminal and an output terminal. The active inductor comprises first and second resistors and first and second transistors. The first resistor has a first terminal coupled to the output terminal of the amplifier stage, and a second terminal. The second resistor has a first terminal coupled to the output terminal of the amplifier stage, and a second terminal. The first transistor has a first current electrode coupled to the second terminal of the first resistor, a control electrode coupled to receive a bias voltage, and a second current electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a control electrode coupled to the second terminal of the second resistor, and a second current electrode coupled to a first power supply voltage terminal.

Abstract: The present invention reduces distortion in variable capacitance devices by connecting a circuit to the variable capacitance devices that has low impedance at predetermined frequencies to suppress those frequencies and also suppress harmonics and mixing products resulting from mixing of various frequencies.

Abstract: A gyrator includes a gyrator core and at least one common mode feedback circuit. The gyrator core includes four inverters mutually connected in a loop configuration between a pair of input ends and a pair of output ends. The common mode feedback circuit is provided between the pair of input ends and/or the pair of output ends and includes a forward-reverse connection inverter set and a backward-reverse connection inverter set. The forward-reverse connection inverter set has a first inverter, a second inverter connected in reverse series with the first inverter, and a first feedback resistor connected in parallel with the second inverter. The backward-reverse connection inverter set has a third inverter, a fourth inverter connected in reverse series with the third inverter, and a second feedback resistor connected in parallel with the fourth inverter.

Abstract: The present invention relates to an input and output signal preservation circuit of an amplification circuit capable of preventing an attenuation of an input signal and an output signal of an amplification circuit in such a manner that an AC input signal is amplified using an amplification device such as a vacuum tube or a transistor in a preamplifier.

Abstract: An active inductor includes bipolar transistors T1, T2, T3 and TD (TD being arranged in diode), where T1's emitter is connected to an output port and to T2's collector. T2's base is connected to a first voltage line and between two connected capacitors. T2's emitter is connected to T3's collecter. An end of one capacitor is connected to T1's base and to a second voltage line. An end of the other capacitor is connected to T3's emitter and to a third voltage line. T1's collector is connected to a fourth voltage line and to TM's collecter, which is connected to TM's base. TM's emitter is electrically connected to T3's base. Preferably, the transistors T1-T3 and TD are Silicon based, and the active inductor is fabricated on a single substrate comprising Silicon. The active inductor is incorporated into adaptive oscillators and amplifiers and an improved transceiver.

Abstract: An linear equalizer system for a transmission channel includes an active inductor with a tunable inductance and quality factor. The active inductor includes a transconducting element. A current steering digital to analog converter controls the flow of a bias current through the transconducting element to tune the active inductor.

Abstract: The invention relates to an Electromagnetic Interference (EMI) filter circuit (Fa) for suppressing a Line Conducted Interference (LCI) signal. The EMI filter circuit (Fa) comprises a filter inductance (Lo) to carry a supply current (Isup) between a supply voltage (Vsup) and a load (L). The EMI filter circuit (Fa) further comprises an active circuit (Ca), arranged in parallel with the filter inductance (Lo). The active circuit (Ca) comprises a sensing circuit (Mm) to sense the LCI signal and further comprises a suppressing circuit (Ms) to suppress the LCI signal. In an embodiment of the active EMI filter circuit (Fa), the active circuit (Ca) comprises a negative inductance generating circuit to create a negative inductance value. Selecting the negative inductance generating circuit to create an inductance value (Lca) larger than the inductance value of the filter inductance (Lo) creates a resulting inductance (Lr) which is higher compared to the inductance value of the filter inductance (Lo).

Abstract: A non-inverting amplifier includes n external input terminals which receive n (n?3) input voltage signals having a constant sum of voltages, respectively, n amplification units each including n?1 internal input terminals connected to n?1 terminals of the n external input terminals in a different combination for each of the amplification units, n?1 voltage-to-current converters which convert input voltage signals from the internal input terminals into current signals, and a load which converts an added current signal obtained by adding up the current signals into an output voltage signal, and n external output terminals which output n output voltage signals from the n amplification units.

Abstract: Methods and apparatus are provided for programmable active inductance. The disclosed active inductor devices provide a tunable bandwidth with improved linearity. The disclosed active inductors have a variable frequency response corresponding to a variable inductance of the active inductor. The active inductor comprises a variable resistive circuit having an effective resistance, wherein the variable resistive circuit is comprised of at least one resistor that can be selectively bypassed in the variable resistive circuit to vary the effective resistive. The active inductor has an inductance that can be varied by varying the effective resistance.

Abstract: Provided herein are negative capacitance circuits for reducing distortion resulting from a gate-source (or base-emitter) capacitance of an output stage. Such a negative capacitance circuit is connected in parallel with the gate-source (or base-emitter) capacitance ofthe output stage to shunt the gate-source (or base-emitter) capacitance and thereby reduce distortion.

Abstract: A semiconductor element for macro and micro frequency tuning, and an antenna and a frequency tuning circuit having the semiconductor element, are provided. The semiconductor element includes first and second semiconductors which have a same polarity, a third semiconductor which has a polarity opposite to the polarity of the first and second semiconductors and is interposed between the first and the second semiconductors, a first intrinsic semiconductor which is interposed between the first and the third semiconductors, and a second intrinsic semiconductor which is interposed between the third and the second semiconductors.

Abstract: The present invention provides an active capacitor comprising an input terminal, a primary all-pass type 90° phase-advanced stage constituted of discrete elements, and a phase inversion amplifying stage and including a constitution in which a signal supplied to the input terminal is inputted to the primary all-pass type 90° phase-advanced stage, a 90° phase-advanced signal obtained at its output is inputted to the phase inversion amplifying stage subsequent to the primary all-pass type 90° phase-advanced stage and phase-inversion amplified thereat, and an output produced from the phase inversion amplifying stage is feedback-coupled to the input terminal.

Abstract: The present invention provides an active inductor comprising an input terminal, a primary all-pass type 90° phase-delayed stage constituted of discrete elements, and a phase inversion amplifying stage and including a constitution in which a signal supplied to the input terminal is inputted to the primary all-pass type 90° phase-delayed stage, a 90° phase-delayed signal obtained at its output is inputted to the phase inversion amplifying stage subsequent to the primary all-pass type 90° phase-delayed stage and phase-inversion amplified thereat, and an output produced from the phase inversion amplifying stage is feedback-coupled to the input terminal.

Abstract: The present invention provides an active inductor that includes an active all-pass type 90° phase advancing circuit comprising an operational amplifier, a first resistor connected between an inversion input end of the operational amplifier and an input terminal, a capacitor connected between a non-inversion input end of the operational amplifier and the input terminal, a second resistor connected between an output end of the operational amplifier and the non-inversion input end, and a third resistor connected between the non-inversion input end and a ground point; and a fourth resistor having a resistance value sufficiently lower than respective resistance values of the first through third resistors connected between input and output terminals of the active all-pass type 90° phase advancing circuit and an impedance value of the capacitor. Thus, an equivalent inductor is obtained between the input terminal and the ground point.

Abstract: An active inductor capable of tuning a self-resonant frequency, an inductance, a Q factor, and a peak Q frequency by applying a tunable feedback resistor to a cascode-grounded active inductor is disclosed. The tunable active inductor includes a first transistor having a source connected to a power supply voltage and a gate connected to first bias voltage; a second transistor having a drain connected to a drain of the first transistor and a gate connected to a second bias voltage; a third transistor having a drain connected to a source of the second transistor and a source connected to a ground voltage; a fourth transistor having a drain connected to a gate of the third transistor, a source connected to the ground voltage and a gate connected to a third bias voltage; a fifth transistor having a source connected to the drain of the fourth transistor and a drain connected to the power supply voltage.

Abstract: Compensation of effects derived from bandwidth limitations of an active frequency-selective circuit is effected by appropriately coupling a resistance to the frequency-selective circuit. In one embodiment, the resistance is designed to have a value that is inversely related to the tangent of a phase-shift at a compensation frequency.

Abstract: The present invention provides an active inductor apparatus and system, having a variable frequency response through inductance adjustment. The active inductor apparatus comprises a variable resistive element and a variable gain element, and the system further comprises an inductance controller and a gain controller. The variable resistive element has a first terminal and a second terminal, with the second terminal capable of receiving a first adjustment signal. The inductance controller is capable of providing the first adjustment signal to control and adjust a resistance level of the variable resistive element. The variable gain element has a third terminal capable of receiving a second adjustment signal. The gain controller is capable of providing the second adjustment signal to control and adjust a transconductance of the variable gain element.

Abstract: A switched-mode Class F power amplifier is provided for parallel connection with at least one other like amplifier, within a Chireix architecture, for combining the signals output therefrom. An input component includes at least one active device configured to be alternately switched by a signal input thereto to present an amplified signal corresponding to the input signal and constituting a low output impedance voltage source. A lumped element impedance inverter is provided between the input component and an output resonator component, the impedance inverter being configured for transforming the low output impedance voltage source to instead constitute a high output impedance current source configured for said parallel connection. In accordance with the invention, the negative reactive component values required by the impedance inverter are eliminated and effectively provided by incorporating those values into pre-selected reactive components of the input and output components.

Abstract: An active inductor circuit (L) includes first (T1) and second (T2) terminals for coupling to respective external terminals (Hi,Lo), said first and second terminals being coupled to a first transconductance circuit (gm1), a second transconductance circuit (gm2) and a feedback circuit (fb) included in said active inductor circuit. An output terminal (OUT1) of said first transconductance circuit (gm1) is coupled to an input terminal of said second transconductance circuit (gm2), an output terminal (OUT2) of said second transconductance circuit (gm2) is coupled to an input terminal (IN1) of said first transconductance circuit (gm1) via said feedback circuit (fb), and said active inductor circuit further including a capacitor (C1) coupled between said output terminal (OUT) of said first transconductance circuit (gm1) and said second terminal (T2).

Abstract: A group delay adjusting circuit. The group delay adjusting circuit comprises an electronically adjustable variable capacitance, and an electronically variable virtual inductor coupled in parallel to the electronically variable capacitance at a node.

Abstract: An active inductance circuit comprising a signal terminal (OUT) and having voltage and current characteristics, as viewed from this terminal, which are identical to those of a circuit comprising an inductance, this active inductance circuit having a structure in which the drain terminal of a first MOS transistor M1 and the gate terminal of a second MOS transistor M2 different in conductivity type from the first MOS transistor are connected to the signal terminal, the gate terminal of the first MOS transistor is connected to the source terminal of the second MOS transistor, a capacitor and a current source are connected to the source terminal of the second transistor, the source terminal of the first MOS transistor and the drain terminal of the second MOS transistor are connected to a power source and other terminals of the capacitor and current source are connected to another power source.

Abstract: An active inductor circuit implemented in sub-micron CMOS semiconductor technology is usable at gigaHertz frequencies and includes an input node, a non-inverting transconductor circuit comprising a differential pair of NMOS transistors connected to the input node, an inverting transconductor circuit comprising an NMOS transistor connected to an output node of the non-inverting transconductor circuit and connected to the input node in a gyrator feedback configuration. Varactors coupled to the transconductor circuits tune the frequency and Q of the active inductor circuit.

Abstract: A system on chip such as a radio receiver has reduced suceptibility to voltages in the bulk silicon by using gyrator elements in the receiver with each gyrator element including a plurality of current sources interconnected to provide output transconductance voltages, and a variable load for the current sources including first and second load resistors each serially connected with one other plurality of current sources. A variable resistance interconnects nodes of the load resistors with the variable resistance comprising a pair of native MOS transistors having low threshold voltages. In a preferred embodiment the first and second load resistors comprise first and second MOS transistors with the pair of native transistors serially connected between source elements of the first and second MOS transistors.

Abstract: An active inductor with a smaller voltage drop with respect to the power supply voltage of an integrated circuit can be realized by an active inductor which is biased from a voltage higher than the power supply voltage, the higher voltage being generatable on the integrated circuit. Advantageously, more headroom is left for the amplifying circuit coupled to the active inductor to operate properly than with prior art active inductors. Furthermore, by not simply operating the entire active inductor from a higher voltage, the power dissipation remains the same as if the active inductor were connected as in the prior art only to the power supply voltage, and the task of generating the voltage higher than the power supply voltage is simplified, because only leakage current, e.g., nanoamps, is required.

Abstract: A group delay adjusting circuit. The group delay adjusting circuit comprises an electronically adjustable variable capacitance, and an electronically variable virtual inductor coupled in parallel to the electronically variable capacitance at a node.

Abstract: According to an embodiment of the present invention, a capacitor comprising field effect transistors and a bias transistor.

Abstract: In order to improve Q of a tuning circuit by using a negative resistance circuit, a tuning circuit wherein a frequency selectivity characteristic and a tuning circuit gain does not vary and are kept constant values even if a tuning frequency is changed, is provided. The tuning circuit is constructed so as to compensate a series resistance component by connecting a negative resistance circuit to a series resonance circuit. The negative resistance circuit includes a differential amplifying circuit having two transistors emitters of which are connected in common, and a low output impedance circuit such as an emitter follower. The low impedance output is fed back to a same phase input side of the differential amplifying circuit directly and also to an inverse phase input side thereof to obtain a negative resistance value at this inverse input terminal.

Abstract: An active inductance circuit comprising a signal terminal (OUT) and having voltage and current characteristics, as viewed from this terminal, which are identical to those of a circuit comprising an inductance, this active inductance circuit having a structure in which the drain terminal of a first MOS transistor M1 and the gate terminal of a second MOS transistor M2 different in conductivity type from the first MOS transistor are connected to the signal terminal, the gate terminal of the first MOS transistor is connected to the source terminal of the second MOS transistor, a capacitor and a current source are connected to the source terminal of the second transistor, the source terminal of the first MOS transistor and the drain terminal of the second MOS transistor are connected to a power source and other terminals of the capacitor and current source are connected to another power source.

Abstract: An active inductor circuit (L) includes first (T1) and second (T2) terminals for coupling to respective external terminals (Hi,Lo), said first and second terminals being coupled to a first transconductance circuit (gm1), a second transconductance circuit (gm2) and a feedback circuit (fb) included in said active inductor circuit. An output terminal (OUT1) of said first transconductance circuit (gm1) is coupled to an input terminal of said second transconductance circuit (gm2), an output terminal (OUT2) of said second transconductance circuit (gm2) is coupled to an input terminal (IN1) of said first transconductance circuit (gm1) via said feedback circuit (fb), and said active inductor circuit further including a capacitor (C1) coupled between said output terminal (OUT) of said first transconductance circuit (gm1) and said second terminal (T2).

Abstract: An inductor equivalent circuit is disclosed. The circuit comprises a reference current source, a first current mirror, a second current mirror, two operational amplifiers OP1 and OP2, a capacitor, a first transistor, a second transistor, a mirror resistor set, and a bypass current source in parallel with the capacitor. An input signal is through OP1 and second transistor to control the reference current source. The first mirror current is then feed-back a signal to the first transistor through an OP2. The current signal makes the drain current of the first transistor lags the input voltage signal by 90° due to the capacitor coupled with the first mirror current source.