Negative Resistance Or Reactance Networks Of The Active Type Patents (Class 333/213)
  • Patent number: 10848196
    Abstract: A radio frequency input/output circuit with a composite inductor structure is presented. The composite inductor structure has a plurality of inductors that are interwound. The composite inductor structure is implemented on a chip. The plurality of inductors are magnetically coupled. The plurality of inductors are interwound around a core. A second inductor is coupled in series with a first inductor and the first inductor is coupled in series with the third inductor. The first inductor and the third inductor are coupled at a centre tap, such that the first inductor and the third inductor form a centre-tapped coil. The centre tap is coupled to an input terminal.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: November 24, 2020
    Assignee: Dialog Semiconductor B.V.
    Inventors: Mahbub Reja, Shobak Kythakyapuzha, Zhi Mou, Mohammad Hanif
  • Patent number: 9252842
    Abstract: An image communication system includes a coaxial cable having first and second ends. A monitor station is coupled to the first end and a camera is coupled to the second end. The monitor station provides power to the camera through the cable, while the cable is also used to carry communication signals transmitted by the camera to the monitor station. The image communication system includes a first active inductor coupled to the first end and a second active inductor coupled to the second end. A current-compensation circuit may also be provided.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: February 2, 2016
    Assignee: Intersil Americas LLC
    Inventor: Dennis M. Mutzabaugh
  • Patent number: 9024710
    Abstract: An active inductor circuit includes a field-effect transistor having a first source/drain adapted for connection with a first voltage source, a capacitor coupled between the first voltage source and a gate of the field-effect transistor, a resistor coupled between a second source/drain of the field-effect transistor and the gate of the field-effect transistor, and a current source coupled with the gate of the field-effect transistor. A voltage headroom of the active inductor circuit is controlled as a function of at least one of a magnitude of current generated by the current source and a resistance of the resistor.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: May 5, 2015
    Assignee: LSI Corporation
    Inventors: Hiroshi Kimura, Ram Surya Narayan, Ashutosh K. Sinha
  • Publication number: 20150035625
    Abstract: An inductor (1) includes an inductor (L11P) formed into the shape of a spiral on the outer circumference of an inductor region and having a start point connected to a terminal (N11P), an inductor (L12P) formed into the shape of a spiral on the inner circumference of the inductor region and having a start point at the end point of the inductor (L11P) and an end point connected to a terminal (N12P), and an inductor (L13P) formed into the shape of a spiral in a region sandwiched between the inductor (L11P) and the inductor (L12P) and having a start point at a node between the inductor (L11P) and the inductor (L12P) and an end point connected to a terminal (N13P).
    Type: Application
    Filed: September 14, 2011
    Publication date: February 5, 2015
    Inventors: Yusuke Ohtomo, Hiroaki Katsurai, Hidetoshi Onodera, Akira Tsuchiya
  • Patent number: 8878631
    Abstract: The invention relates to a selective active low-pass filter and to a method for improving the selectivity of such a filter. The method includes centering, in the center of a network, the resonant element whose frequency is closest to the cutoff frequency of the filter and in inserting in series with this element a negative resistance of higher value than the parasitic resistance of the filter.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: November 4, 2014
    Assignee: Thomas Licensing
    Inventors: Dominique Lo Hine Tong, Fran├žois Baron, Raafat Lababidi, Ali Louzir
  • Patent number: 8766746
    Abstract: In one embodiment, a circuit, which comprises a resistor and a pMOS or cMOS transistor, has the characteristic of an inductor and produces an inductive impedance that operates over a substantially full range of a direct-current bias.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: July 1, 2014
    Assignee: Fujitsu Limited
    Inventor: Nikola Nedovic
  • Patent number: 8723625
    Abstract: An amplification cell employing a linearization scheme and an active inductor using the same are provided. The active inductor includes: first and second amplification cells each including a main amplifying unit amplifying an input signal, an auxiliary amplifying unit connected in parallel to the main amplifying unit and eliminating nonlinear characteristics of the main amplifying unit while amplifying the input signal, and a negative load unit connected to an output terminal of the main amplifying unit and that of the auxiliary amplifying unit; a plurality of load resistors for tuning frequency; and a plurality of capacitors for tuning frequency, wherein an output from the first amplification cell is negatively fed back to the second amplification cell, an output from the second amplification cell is negatively fed back to the first amplification cell, and the plurality of load resistors and the plurality of capacitors are disposed on negative feedback paths of the first and second amplification cells.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: May 13, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Young Jae Lee
  • Patent number: 8653900
    Abstract: There is provided an oscillator using a high-frequency crystal resonator which can satisfy the drive level needed for the crystal resonator and expand a variable frequency range. An oscillator having an oscillation circuit CC for oscillating the resonator SS is provided with a limiter circuit LM1 as a load of the resonator SS which is inductive and is a load circuit for limiting an oscillation amplitude. According to this configuration, the action of the limiter circuit LM1 allows satisfaction of the drive level needed for the crystal resonator and expansion of the variable frequency range.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: February 18, 2014
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Kenichi Sato, Tomoaki Yamamoto
  • Publication number: 20130038409
    Abstract: Techniques to develop negative impedance circuits that may operate to their power supply rails. The techniques may include generating currents in response to voltage signals presented at respective input terminals of a negative impedance circuit. The voltage signals may be differential signals. The generated currents may be driven through a common impedance within the negative impedance circuit. The currents flowing through the common impedance may be mirrored back to the input terminals of the negative impedance circuit. The negative impedance circuit may be controlled to operate about a common-mode voltage for the circuit.
    Type: Application
    Filed: September 27, 2011
    Publication date: February 14, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventor: Padraig COONEY
  • Patent number: 7852174
    Abstract: A negative capacitances circuit includes first and second branches connected between a first reference voltage and a second reference voltage. The first branch includes, in series, a first biasing resistor, a first diode, a first bipolar transistor, and a first current source. The second branch includes, in series, a second biasing resistor, a second diode, a second bipolar transistor, and a second current source. The first transistor has a base coupled to a collector of the second transistor and to one input, and the second transistor has a base coupled to a collector of the first transistor and to another input. A capacitor is connected between the emitter of said first transistor and the emitter of said second transistor. A linearization resistor is coupled in parallel between the two emitters of said first and said second transistors.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: December 14, 2010
    Assignee: STMicroelectronics SA
    Inventors: Andreia Cathelin, Stephane Razafimandimby, Cyrille Tilhac
  • Patent number: 7843287
    Abstract: The present invention is directed to provide a low-power-consumption wide-range RF signal processing unit having a small chip occupation area. A semiconductor integrated circuit has, on a semiconductor chip, a resonant circuit including a first capacitor having a capacitance which can be controlled by a first control signal of a first control terminal, and a gyrator for equivalently emulating an inductor by including a second capacitor having a capacitance which can be controlled by a second control signal of a second control terminal. The capacitance and the inductor form a parallel resonant circuit. At the time of changing parallel resonant frequency, the capacitances of the first and second capacitors are coordinately changed. The parallel resonant circuit is suitable for an active load which is connected to an output node of an amplifier.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: November 30, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Toru Masuda, Hiroshi Mori
  • Patent number: 7683742
    Abstract: An electronic circuit includes: an acoustic resonator of BAW or SAW type, said resonator having a series resonance frequency and a parallel resonance frequency; an active circuit which is coupled in parallel to said acoustic resonator, said active circuit having a negative capacity acting on the parallel resonance frequency of said resonator.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: March 23, 2010
    Assignee: STMicroelectronics SA
    Inventors: Andreia Cathelin, Stephane Razafimandimby, Cyrille Tilhac
  • Patent number: 7583166
    Abstract: The present invention provides an apparatus for enhancing Q factor of an inductor. The apparatus includes a negative resistance generator coupled to the inductor for providing a negative resistance, and a bias circuit coupled to the negative resistance generator for biasing the negative resistance generator.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: September 1, 2009
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ying-Yao Lin, Ying-Hsi Lin
  • Patent number: 7541882
    Abstract: Disclosed is a tuned circuit tuned to an input signal having a predetermined radio frequency, the tuned circuit comprising a tank circuit having a loaded ring oscillator circuit with a resonant frequency corresponding to said radio frequency. The tank circuit is configured for a predetermined frequency that the tuned circuit is designed for. In the case wherein the tuned circuit is in CMOS 0.18 ?m technology, the tuned circuit is configured for a frequency of up to 7 GHz. The tank circuit may be in the form of an integrated circuit having a size of not more than 200 ?m by 200 ?m. The tank circuit may form part of a low-noise amplifier or part of a mixer.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: June 2, 2009
    Inventors: Abdulhakim Ahmed, James Stuart Wight
  • Publication number: 20070236280
    Abstract: An active bandpass filter is disclosed herein. The active bandpass filter has N transmission lines, N negative resistant circuits, a DC circuit, and at least (N?1) coupling circuit. Each transmission line has a first end and a second end. Each negative resistant circuit has a third end and a fourth end and is electrically coupled with a related transmission line, wherein the third end and the fourth end are electrically coupled with the first end and second end, respectively. The DC circuit provides a bias voltage for N negative resistant circuits, wherein the DC circuit electrically couples with N transmission lines via N coupling elements. Each coupling circuit has a fifth end and a sixth end and is electrically coupled with any two transmission lines, wherein the fifth end and sixth end are electrically coupled with the second end and the first end, respectively.
    Type: Application
    Filed: March 23, 2007
    Publication date: October 11, 2007
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Ching-Kuang C. Tzuang, Hsien-Hung Wu
  • Patent number: 7202762
    Abstract: A Q enhancement circuit and method. In a most general embodiment, the inventive circuit is adapted for use with a component having a parasitic resistance R3 and a first resistance R1 disposed in series with the component and an arrangement for making the resistance a negative resistance. In the illustrative embodiment, first and second inductors constitute the components for which Q enhancement is effected. A resistance R1 is disposed in series with the first inductor and is equal to the parasitic resistance RL1 thereof. Likewise, a second resistance R2 is disposed in series with the second inductor and is equal to the parasitic resistance RL2 thereof. The Q enhancement circuit further includes a first transistor Q1 and a second transistor Q2.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: April 10, 2007
    Assignee: Raytheon Company
    Inventor: Louis Luh
  • Patent number: 7005950
    Abstract: There is provided a negative impedance converter, which has negative impedance conversion function by widening the available range of a generalized impedance converter. A generalized impedance converter is composed of two operational amplifiers Q1 and Q2 and four series-connected first to fifth impedance elements Z1 to Z4. The four impedance elements included in the generalized impedance converter are all set as the same resistor R1, and an impedance element Z6 is connected between the intermediate point B of the series-connected impedance elements and the ground. The magnitude of the impedance element Z6 is set smaller than that of load impedance element Z5. By doing so, the input impedance Z11? becomes negative, and the kind of the impedance is determined depending on the kind of the impedance elements Z5 and Z6.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: February 28, 2006
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Patent number: 6985053
    Abstract: In order to provide a negative resistance circuit which is not influenced by means of change of temperature and source voltage, etc., operates stably and has simple circuit construction, a first stage circuit of the negative resistance circuit is a collector-emitter dividing type amplifying circuit comprising of a npn transistor and a second stage circuit thereof is an emitter earth type amplifying circuit comprising of a pnp transistor. A collector output of the pnp transistor is connected to a base of the npn transistor to constitute a positive feedback path and is divided and is connected to an emitter of the npn transistor to constitute a negative feedback path. An amplification factor A of the emitter earth type amplifying circuit and voltage dividing ratio ? is set to be (1+A?)<A.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: January 10, 2006
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Patent number: 6954123
    Abstract: Selectivity Q of a tuning circuit is maximized by using a negative resistance circuit that is not influenced significantly by changes in conditions such as temperature, source voltage, etc. The tuning circuit operates stably and is constituted by a series resonance circuit and the negative resistance circuit connected thereto. The negative resistance circuit can be a C-E dividing type circuit including a npn transistor as a first stage circuit and an emitter earth type amplifying circuit including a pnp transistor as a second stage circuit. A collector output of the pnp transistor is connected to an emitter of the npn transistor to constitute a negative feedback circuit and the collector output is divided and connected to a base of the npn transistor to constitute a positive feedback circuit. Selectivity Q is improved by the negative resistance circuit provided by the negative feedback circuit.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: October 11, 2005
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Patent number: 6870447
    Abstract: A tuning circuit using a negative resistance circuit for compensating an equivalent series resistance component thereof is provided. The negative resistance circuit has simple circuit construction and design and adjustment thereof is easy. The tuning circuit comprises a series resonance circuit and a negative resistance circuit connected to the series resonance circuit in series. In the negative resistance circuit, a first transistor constitutes an inverse amplifier by providing a resistor in an emitter circuit thereof and a second transistor constitutes an emitter follower circuit. A positive feedback circuit is constituted by feeding back an output of the emitter follower circuit to an emitter circuit of the first transistor and a negative feedback circuit is constituted by feeding back an output terminal to a base circuit of the first transistor. Thus a negative resistance is produced between this base input terminal and an earth.
    Type: Grant
    Filed: August 1, 2003
    Date of Patent: March 22, 2005
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Patent number: 6768393
    Abstract: A circuit and method for calibrating an active termination resistor irrespective of changes in process, voltage, or temperature is provided. The method includes the steps of (a) calibrating a first variable resistor to have the same resistance as that of an external resistor; (b) at the same time calibrating a second variable resistor to have the same resistance as that of the first variable resistor; and (c) calibrating the active termination resistor to have the same resistance as that of the external resistor. The step of calibrating the first variable resistor to have the same resistance as that of the external resistor is in response to a first control code, and at the same time the step of calibrating the second variable resistor to have the same resistance as that of the first variable resistor is in response to a second control code.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: July 27, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Ho-Young Song
  • Patent number: 6628181
    Abstract: A tuning circuit is constructed to set Q of the tuning circuit to a high desired value by using a negative resistance value. The tuning circuit is made to oscillate weakly by using a negative resistance circuit, a voltage-resistance converter and a digital-analog converter. A negative resistance of the negative resistance circuit is scanned by a counter so that two negative resistance values corresponding to an oscillation amplitude and another oscillation amplitude of one half are obtained by analog comparators COMP1 and COMP2. A negative resistance value to be set is operated by an adder/subtracter from a series resistance value corresponding to a desired Q and this value. Scanning is stopped when the negative resistance value is obtained. The tuning circuit can be formed by small size digital integrated circuits.
    Type: Grant
    Filed: March 15, 2002
    Date of Patent: September 30, 2003
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Patent number: 6577212
    Abstract: The invention relates to an integrated gyrator structure, in which each transistor in the gyrator core (preferably MOS devices) has series feedback associated therewith. This allows for compensation over a large bandwidth of the effects of channel delay in the MOS transistors.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: June 10, 2003
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventors: Sven Mattisson, Henrik Geis
  • Patent number: 6573788
    Abstract: The amplifier device serves the purpose of broadband amplification of an electric input signal fed from a signal source. It has an amplifier input for feeding the input signal, and a broadband amplifier element. Provided for the purpose of compensating a source reactance active at a source output is an amplifier reactance which is active at the amplifier input and is determined by an input impedance of a current-reversing negative impedance converter. The useful bandwidth for the input signal is raised thereby.
    Type: Grant
    Filed: July 18, 2001
    Date of Patent: June 3, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventor: Ralph Oppelt
  • Patent number: 6552634
    Abstract: A method and a circuit for power amplification over a wide frequency range based upon the use of minimum-rating filters or matching networks, negative-component signal processing, and single or multiple amplifiers. The filters and matching networks are preferably designed to minimize the required ratings of the amplifier(s) driving them. The signal processor or generator preferably uses negative components to produces a driving signal that is compensated for the ripple in the filter, matching network, and load. The outputs of multiple amplifiers optimized for different frequency ranges can be combined into a single load with flat frequency response, resistive loads presented to the amplifiers, and no inherent power loss in the combining network.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: April 22, 2003
    Inventor: Frederick Herbert Raab
  • Patent number: 6545570
    Abstract: A tuning circuit has a simple circuit construction and is capable of setting Q thereof to a high desired value. The tuning circuit is formed by a resonance circuit consisting of an inductor and a capacitor and a negative resistance circuit connected in series to the resonance circuit including a negative impedance converter and a variable resistor. A counter counts clock signals from a clock signal generating circuit and a count value is converted to an analog signal by a D/A converter. The negative resistance circuit is controlled by the analog signal so that an effective resistance of the tuning circuit is made negative to oscillate and to vary a negative resistance value in a positive direction. When the effective resistance value becomes zero, oscillation stops and thereafter when a value of Q becomes a predetermined value, the clock signals are stopped and the latch circuit holds a final count value.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: April 8, 2003
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Publication number: 20030025579
    Abstract: A tuning circuit comprising a first reactance, a second reactance and a insulated gate field effect transistor having a gate arranged to receive a control signal. The first reactance is connected between the source of the field effect transistor and a first node. The second reactance has the same value as the first reactance and is connected between the drain of the field effect transistor and a second node. The first and second nodes are arranged so as to experience a balanced ac signal. Turning the field effect transistor on has the effect of making the first and second reactances effective in the circuit and vice versa.
    Type: Application
    Filed: July 31, 2001
    Publication date: February 6, 2003
    Inventor: Kaare Tais Christensen
  • Patent number: 6504458
    Abstract: In order to automatically set a Q value to an optimal value, a tuning circuit has a resonance circuit composed of an inductor and a capacitor. The resonance circuit includes a negative resistance circuit having a dummy load resistance and a negative impedance converter. An operating circuit provides the dummy load resistance so that a negative resistance value is output to obtain a desired Q value.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: January 7, 2003
    Assignee: General Research of Electronics, Inc.
    Inventor: Kazuo Kawai
  • Publication number: 20020163407
    Abstract: A circuit and method for input side impedance matching of a power amplifier in an electronic device. Specifically, the present invention provides an impedance transformer network that includes a negative resistor in series with a bondwire inductor. The network is placed in parallel with a signal source and synthesizes the source side impedance at the input of the power amplifier. The desired impedance is synthesized by selecting an appropriate value for the negative resistor and setting the reactance of the inductor equal to the capacitance of the electronic device at a required frequency of operation.
    Type: Application
    Filed: March 19, 2001
    Publication date: November 7, 2002
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventor: Vickram R. Vathulya
  • Publication number: 20020118082
    Abstract: In order to set up automatically Q value by optimal value, a tuning circuit connected a resonance circuit composed of an inductor and a capacitor, it is connected a resonance circuit of an inductor and a capacitor with a negative resistance circuit comprised of a dummy load resistance and a negative impedance transform circuit NIC in series, is constituted the tuning circuit.
    Type: Application
    Filed: August 16, 2001
    Publication date: August 29, 2002
    Inventor: Kazuo Kawai
  • Publication number: 20020101306
    Abstract: In order to provide a tuning circuit having small, cheap and simple circuit construction capable of setting Q thereof to a high desired value, said tuning circuit is constituted by a resonance circuit consisting of an inductor and a capacitor and a negative resistance circuit connected to said resonance circuit in series including a negative impedance converter and a variable resistor.
    Type: Application
    Filed: August 24, 2001
    Publication date: August 1, 2002
    Inventor: Kazuo Kawai
  • Patent number: 6417734
    Abstract: A high-frequency amplifier circuit includes an amplifying transistor and a driver transistor, with the amplifying transistor being connected in either a common emitter or a common source configuration and the driver transistor being connected in a corresponding common collector or a common drain configuration, depending upon whether bipolar or field effect transistors are used. A current-mirror bias circuit is coupled between an input terminal and an output terminal of the driver transistor, with a resistor being provided for coupling the current mirror to the input terminal of the driver transistor. The resistor, which typically has a value of between about 20 and 100 ohms, provides a negative impedance cancellation effect while minimizing power consumption at low bias levels.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: July 9, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Sifen Luo, Tirdad Sowlati
  • Patent number: 6340916
    Abstract: An innovated transimpedance amplifier circuit consists of a buffer circuit, a simulation resistance circuit, and an amplifier circuit. The buffer circuit for inputting a signal circuit is constituted by two FETs and a resistor, and has a high current input efficiency and function of widening circuit frequency band. The simulation resistance circuit is constituted by a resistor, two buffer units, a coupling capacitor, and a biasing resistor. When operating at a low frequency, the simulating resistance circuit permits a large amount of background DC to flow through; on the other hand, when operating at a high frequency, this circuit can improve the signal coupling efficiency and reduce foreign signal output voltage. On the whole, by the circuit of the present invention, both the detecting sensitivity and the amplification factor of the signal current can be significantly improved.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: January 22, 2002
    Assignee: Telecommunications Laboratories, Chunghwa Telecom Co., Ltd.
    Inventors: Tsz-Lang Chen, Guang-Ching Leu, Chun-Yo Hsu
  • Patent number: 6078215
    Abstract: A circuit for modifying the impedance of a subject circuit includes a driving impedance element having an impedance characteristic which is substantially proportional to the impedance characteristics of the subject circuit. The circuit of the present circuit further includes a voltage controlled voltage source circuit which is coupled to the driving impedance element to proportionally add or subtract current from the applied subject circuit. The voltage controlled voltage source circuit provides a given voltage to the combined subject circuit and driver impedance element that is effectively proportional to the voltage potential difference across the subject circuit, thereby providing an enhanced effective impedance for the subject circuit.
    Type: Grant
    Filed: July 20, 1998
    Date of Patent: June 20, 2000
    Inventor: David Fiori, Jr.
  • Patent number: 5617064
    Abstract: An active termination resistor is provided within a feedback loop circuit thus advantageously increasing the stability of the feedback loop circuit. In particular, the active termination resistor traces the impedance of the feedback loop such that R(f).congruent.1/GM3(f). The active resistor may also be configured to track the value of the resistor to set the feedback transconductance over process and temperature variations to ensure stability of the feedback loop over these variations.
    Type: Grant
    Filed: March 14, 1995
    Date of Patent: April 1, 1997
    Assignee: Lattice Semiconductor Corporation
    Inventor: James L. Gorecki
  • Patent number: 5550520
    Abstract: An active tuneable band-pass filter is provided which has a negative resistance circuit for generating a tuneable amount of negative resistance for a passive band-pass filter structure so as to compensate for resistive losses. The negative resistance circuit has a bipolar transistor with a base connected in shunt to the passive filter structure and a collector connected to a shunt inductive element. A negative resistance is generated at the base of the transistor and is applied to the passive filter structure. A coarse Q-factor tuning circuit is coupled to the emitter of the transistor for providing a coarse amount of tuning of the negative resistance. Also connected to the emitter terminal, is a fine tuning circuit for providing fine tuning of the negative resistance. The fine tuning may be achieved manually or automatically with a control circuit.
    Type: Grant
    Filed: April 11, 1995
    Date of Patent: August 27, 1996
    Assignee: TRW Inc.
    Inventor: Kevin W. Kobayashi
  • Patent number: 5451915
    Abstract: A negative resistance generator includes first and second terminals; first and second inductors connected in series between the terminals; and a semiconductor amplifying device having a first control electrode connected to the first terminal and a first active electrode connected to the second terminal and a second active electrode connected to the junction of the inductors. When employed in an active filter resonator a first variable capacitor is interconnected with the inductors for setting the resonant frequency of the resonator. The resonators may be combined in an active filter with a transmission line where each of the resonators is interconnected to the line by decreasing resistance from the input to the output in order to balance the rf currents to which the resonators are subjected.
    Type: Grant
    Filed: May 26, 1993
    Date of Patent: September 19, 1995
    Assignee: Hittite Microwave Corporation
    Inventors: Peter J. Katzin, Yalcin Ayasli, Brian E. Bedard
  • Patent number: 5371801
    Abstract: Apparatus for absorbing acoustic energy directed toward a wall. The appars includes a piezoelectric layer intermediate the wall and the source of the acoustic energy. Circuitry attached to the output of the transducer compensates blocked and motional capacitances of the transducer so that the output signal generates real current for dissipation in a resistor thereby to minimize any echo reflected from the piezoelectric layer.
    Type: Grant
    Filed: January 4, 1993
    Date of Patent: December 6, 1994
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: James M. Powers, Mark B. Moffett, Stephen S. Gilardi
  • Patent number: 5343177
    Abstract: Apparatus and methods are disclosed for use in electronic circuits that contain Generalized Impedance Converters and shape frequency response. The combined effect of two Generalized Impedance Converters 30 and 34 with their outputs connected to a coupler 32 simulates coupled capacitors FIG. 2(B) or coupled inductors FIG. 2(A) through impedance scaling. The resistors used in the coupler 32 define the degree of coupling between the first and second Generalized Impedance Converter 30 and 34 respectively. In one embodiment, simulated coupled inductors 96, 98 and 100 are used in a bandpass circuit along with additional R-C devices to control upper and lower sideband attenuation and resonant frequency. Here, the resistors in the coupler device 86 simulate the mutual inductance 98 of coupled inductors.
    Type: Grant
    Filed: December 1, 1992
    Date of Patent: August 30, 1994
    Assignee: Hughes Aircraft Company
    Inventor: Austin M. Williams
  • Patent number: 5343170
    Abstract: A voltage controlled oscillator (VCO) including a negative feedback circuit operates in response to a negative feedback signal generated during active transistor region operation of transistors in transconductance amplifying stages coupled thereto. As a result, harmonic distortion and problems of noise and unstable frequency oscillation are obviated or significantly reduced. The VCO includes first and second variable transconductance (gm) amplifying stages whose non-inverting (+) and inverting (-) terminals are respectively grounded and a first condenser connected between an output terminal of the first transconductance (gm) amplifying stage and a non-inverting (+) terminal of the second transconductance (gm) amplifying stage. A negative-resistive circuit is used to provide a negative feedback.
    Type: Grant
    Filed: January 8, 1993
    Date of Patent: August 30, 1994
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Junseong Lee
  • Patent number: 5315399
    Abstract: A capacitive circuit incorporated in an integrated circuit, the capacitive circuit including a high-pass type non-inverting amplifier which receives an input signal and a differential amplifier which receives the input signal and an output signal of the non-inverting amplifier. A differential component between both signals is detected by the differential amplifier and fed-back to the input signal, the input impedance having a capacitive characteristic because the input signal is phase-shifted by 90 degrees.
    Type: Grant
    Filed: June 26, 1992
    Date of Patent: May 24, 1994
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Fumiaki Honda, Nobukazu Hosoya
  • Patent number: 5172076
    Abstract: A resonant circuit comprises first and second amplifiers. An input of the second amplifier is coupled to an output of the first amplifier, and an output of the second amplifier is cross-coupled to an input of the first amplifier. The first amplifier has a first gain and a 90 degree phase shift between its input and its output at a resonant frequency of the resonant circuit. The second amplifier has a second gain and a 90 degree phase shift between its input and its output at the resonant frequency of the resonant circuit. The second gain is different from the first gain. The resonant circuit can have a first port and second ports coupled to an input and an output respectively of one of the first and second amplifiers. Because the gains of the first and second amplifiers differ, the gain from the first port to the second port of the resonant circuit will differ from the gain from the second port to the first port.
    Type: Grant
    Filed: March 26, 1992
    Date of Patent: December 15, 1992
    Assignee: Northern Telecom Limited
    Inventor: Anthony K. D. Brown
  • Patent number: 5066140
    Abstract: Temperature measurement with thermocouples is made more accurate, and the cost of disposable thermocouples is reduced by locating the cold junction close to the hot junction, utilizing a thermistor in thermal communication with the cold junction in developing a compensating voltage which varies with temperature as does the voltage produced by the cold junction, and applying the compensating voltage to cancel the cold junction voltage. The presence of radio frequency fields in the region of the thermocouple is detected and utilization of the thermocouple voltage is interrupted in intervals when the interference is greater than some preselected intensity. Further, the thermocouple voltage information is utilized to simulate the resistance a thermistor would have at the temperature represented by the thermistor voltage information and that simulated resistance is applied to instrumentation designed to measure temperature with a thermistor.
    Type: Grant
    Filed: October 13, 1987
    Date of Patent: November 19, 1991
    Assignee: Respiratory Support Products, Inc.
    Inventor: Anthony V. Beran
  • Patent number: 4990872
    Abstract: A reactance circuit comprises a differential amplification circuit formed by differentially connecting the first and second transistors to each other, a load connected to a collector of the first transistor, a reactance element interposed between a base of the first transistor and a reference potential point, and a capacitor and a resistor connected in series between the collector and the base of the first transistor. A negative feedback loop to the first transistor is formed by the capacitor and the resistor. Accordingly, when the collector of the first transistor is used as an output terminal, a negative equivalent reactance is produced in the output terminal.
    Type: Grant
    Filed: June 13, 1988
    Date of Patent: February 5, 1991
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kazuhisa Ishiguro, Mikio Yamagishi
  • Patent number: 4740716
    Abstract: An active element behaving as a negative resistor is situated in parallel with a varactor to cancel the varactor losses. DC bias is provided for the active element and for the varactor which are separated by a DC block. The entire circuit can be fabricated on a single, relatively small chip. A Gunn diode may be used as the active element if the circuit is formed on a silicon substrate. A field effect transistor may be used as the active element on a gallium arsenide substrate.
    Type: Grant
    Filed: December 29, 1986
    Date of Patent: April 26, 1988
    Assignee: General Instrument Corp.
    Inventor: Lawrence H. Silverman
  • Patent number: 4706281
    Abstract: Battery feed circuits function to supply a predetermined current to the communication pair and include circuitry to counteract the effects of balanced longitudinal signals which appear on the communication pair. Prior art battery feed circuits use either expensive matched power resistors or matched and tracking current sources to provide both the dc current and the necessary balance. The subject battery feed circuit separates the two functions: a pair of poorly matched inexpensive power resistors provide the basic dc current; and associated pair of low power electronic circuits supply compensation signals to provide the necessary balance. The compensation signals are applied to the power resistors in a manner to obtain precision resistor (.+-.0.1%) characteristics from the inexpensive (.+-.5%) power resistors.
    Type: Grant
    Filed: April 30, 1984
    Date of Patent: November 10, 1987
    Assignees: American Telephone and Telegraph Company, AT&T Information Systems Inc.
    Inventor: Richard J. Cubbison, Jr.
  • Patent number: 4686486
    Abstract: A fourth (or higher) order filter has a series resonant section terminated by a parallel resonant section, both based on frequency dependent negative resistance (FDNR). The FDNR, resistance and capacitance (representing damping) of the series section are provided by a capacitive potential divider (C41,C42) connected between low impedance input (A) to the filter and an intermediate terminal forming the input of a unity-gain amplifier (A4) whose output is connected via a resistance (R4O) to the tapping point of the divider; the intermediate terminal is connected via a second resistance (R1) to the parallel section.
    Type: Grant
    Filed: July 5, 1985
    Date of Patent: August 11, 1987
    Assignee: British Telecommunications public limited company
    Inventors: Alan J. Greaves, Phillip J. Hunter
  • Patent number: 4587500
    Abstract: A variable reactance circuit which can produce equivalent reactance varying from negative given values to positive given values in accordance with fundamental reactance elements such as capacitor, coil, etc. The present invention has a big advantage of being capable of easily producing the positive, negative equivalent reactance given times as much as the basic reactance element with the use of a circuit which can be integrated.
    Type: Grant
    Filed: September 23, 1983
    Date of Patent: May 6, 1986
    Assignees: Sanyo Electric Co., Ltd., Tokyo Sanyo Electric Co., Ltd.
    Inventors: Kanji Tanaka, Kazuhisa Ishiguro
  • Patent number: 4551683
    Abstract: Disclosed is a switched capacitor filter circuit employing the equivalent resistance of a switched capacitor circuit as the resistive element in a frequency dependent impedance converting circuit.
    Type: Grant
    Filed: November 17, 1983
    Date of Patent: November 5, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Kenji Matsuo, Shouji Abou
  • Patent number: 4521750
    Abstract: A time constant circuit capable of switching the characteristic, which is realized by a combination of an equivalent resistor made up of a switched capacitor and an ordinary capacitor, comprises a capacitor of the switched capacitor or the time constant circuit connected in parallel to a series circuit including a switching device and an additional capacitor. The characteristic is switched by turning on and off the additional capacitor by the switching device. The direct connection of a plurality of equivalent resistors with a plurality of switched capacitors and ordinary capacitors makes up an equalizer. The capacitor making up a switched capacitor is connected with a switching device and an additional capacitor so that the frequency characteristic of the equalizer is switchable by turning on and off the switching device. Each of the capacitors making up the switched capacitors, the capacitors making up the time constant circuits and the additional capacitors has an end thereof grounded.
    Type: Grant
    Filed: April 7, 1983
    Date of Patent: June 4, 1985
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering, Ltd.
    Inventors: Isao Fukushima, Kazuyoshi Kuwahara, Keiichi Itoigawa, Yasunori Kobori, Hideo Nishijima