Strip Type Patents (Class 333/238)
  • Patent number: 11949144
    Abstract: A transmission line substrate includes a line portion and a connecting portion. The transmission line substrate includes a base material, a first ground conductor, a second ground conductor, a signal line, an external electrode, a second interlayer connection conductor. In the line portion, a transmission line having a strip line structure including the signal line, the first ground conductor, and the second ground conductor is provided. In the connecting portion, the signal line and the external electrode face each other in a stacking direction, without including therebetween an interlayer connection conductor. The second interlayer connection conductor surrounds a facing portion in which the signal line and the external electrode face each other in the Z-axis direction.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: April 2, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takahiro Baba
  • Patent number: 11909088
    Abstract: A transmission line member includes a base body extending along a transmission direction of a high-frequency signal, and a first transmission line, a second transmission line, and a third transmission line. The base body includes a first portion including the first transmission line, a second portion including the second transmission line, and a third portion including the third transmission line. The second portion is connected between the first and third portions. A thickness of the second portion is smaller than a thickness of the first and third portions. The second transmission line includes only a conductor pattern extending more in the transmission direction than in a direction of the thickness.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: February 20, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Shigeru Tago
  • Patent number: 11812551
    Abstract: A flexible circuit board for a continuous analyte monitoring (CAM) device includes a plurality of physically separate circuit board cells each having circuitry thereon. The flexible circuit board also includes a plurality of flexible interconnections each connecting one of the physically separate circuit board cells to another of the physically separate circuit board cells. Each one of the flexible interconnections is operable to couple power, electrical signals, or both to the physically separate circuit board cells connected thereto. The flexible circuit board is bendable in multiple directions in three dimensions. Methods of constructing flexible circuit boards for CAM devices are also provided, as are other aspects.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: November 7, 2023
    Assignee: Ascensia Diabetes Care Holdings AG
    Inventors: Ji Li, Igor Y. Gofman, Dragan Avirovikj, Thomas A. J. Mayer, Jr., Cameron M. Young, Nicholas Erekovcanski
  • Patent number: 11791528
    Abstract: Embodiments of the invention include a packaged device with transmission lines that have an extended thickness, and methods of making such device. According to an embodiment, the packaged device may include a first dielectric layer and a first transmission line formed over the first dielectric layer. Embodiments may then include a second dielectric layer formed over the transmission line and the first dielectric layer. According to an embodiment, a first line via may be formed through the second dielectric layer and electrically coupled to the first transmission line. In some embodiments, the first line via extends substantially along the length of the first transmission line.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: October 17, 2023
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Mathew Manusharow, Krishna Bharath, Zhichao Zhang, Yidnekachew S. Mekonnen, Aleksandar Aleksov, Henning Braunisch, Feras Eid, Javier Soto
  • Patent number: 11696391
    Abstract: A wiring substrate includes a first insulating layer with a first opening, a second insulating layer with a second opening, a high-frequency wiring layer, a first wiring layer, a second wiring layer, and a plurality of conductive pillars. The high-frequency wiring layer including a high-frequency trace is sandwiched between the first insulating layer and the second insulating layer. The first opening and the second opening expose two sides of the high-frequency trace respectively. The high-frequency trace has a smooth surface which is not covered by the first insulating layer and the second insulating layer and has the roughness ranging between 0.1 and 2 ?m. The first insulating layer and the second insulating layer are all located between the first wiring layer and the second wiring layer. The conductive pillars are disposed in the second insulating layer and connected to the high-frequency trace.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: July 4, 2023
    Assignees: AVARY HOLDING (SHENZHEN) CO., LTD., HONGQISHENG PRECISION ELECTRONICS (QINHUANGDAO) CO., LTD., GARUDA TECHNOLOGY CO., LTD
    Inventors: Mao-Feng Hsu, Zhi-Hong Yang
  • Patent number: 11677131
    Abstract: Described is a method for forming a planar transmission line low-pass filter and a resulting filter. The method comprises several acts, including using lithographic processes and a castable polymer with absorptive matrix as a spin-on dielectric to form the planar transmission line low-pass filter.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: June 13, 2023
    Assignee: HRL LABORATORIES, LLC
    Inventors: Faustin Carter, Jacob Blumoff
  • Patent number: 11664566
    Abstract: A semiconductor device includes a first transmission line. The semiconductor device includes a second transmission line. The semiconductor device includes a high-k dielectric material between the first transmission line and the second transmission line, wherein the high-k dielectric material partially covers each of the first transmission line and the second transmission line. The semiconductor device further includes a dielectric material directly contacting the high-k dielectric material, wherein the dielectric material has a different dielectric constant from the high-k dielectric material, and the dielectric material directly contacts each of the first transmission line and the second transmission line.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: May 30, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jiun Yi Wu, Chien-Hsun Lee, Chewn-Pu Jou, Fu-Lung Hsueh
  • Patent number: 11616280
    Abstract: A microwave transmission line assembly operated in vacuum for satellite antennas and beamforming networks comprising a first ground plane and a conductor strip positioned a distance from the first ground plane. The conductor strip comprises a first strip portion and a second strip portion (6). The first strip portion is positioned at a first distance from the first ground plane and wherein the second strip portion is positioned at a second distance from the first ground plane. The first distance is smaller than the second distance, wherein the first distance is chosen to avoid multipaction.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: March 28, 2023
    Assignee: RUAG SPACE AB
    Inventor: Per Magnusson
  • Patent number: 11617270
    Abstract: A method for manufacturing a double-sided, single conductor laminate includes providing a laminated substrate that includes a conductive layer, an adhesive layer and a support layer; dry milling a trace pattern in the laminated substrate by removing selected areas of the conductive layer and the adhesive layer; and attaching a first cover layer using a first adhesive layer to the conductive layer. The first cover layer includes one or more precut access holes that align with one or more traces of the trace pattern.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: March 28, 2023
    Assignee: Gentherm Incorporated
    Inventors: Michael Peter Ciaccio, Timothy Hughes
  • Patent number: 11582863
    Abstract: Provided are a circuit board component and a terminal. The circuit board component includes: a circuit board and a wire disposed on the circuit board, where the wire includes a first portion and a second portion, a line width of the first portion is greater than or equal to a line width threshold, and a line width of the second portion is less than the line width threshold.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: February 14, 2023
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventors: Guanghui Liu, Shiwen Xiao
  • Patent number: 11512960
    Abstract: A method of path routing in a multilayered structure including layers and one or more links formed between adjacent layers includes identifying path connection elements included in each layer of a multilayered structure with layers that can have at least one links between adjacent layers, generating, for each layer of the multilayered structure, an embedded frame including the path connection elements identified in each layer of the multilayered structure, generating a topological frame including an outer boundary enclosing one or more punctures formed by the links among the plurality of path connection elements included in the embedded frame and one or more local path points arranged on a boundary of each of the one or more punctures, and generating a circular frame including a single circular closed curve by merging the boundary of each of the one or more punctures and the outer boundary of the topological frame.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: November 29, 2022
    Assignee: SAMSUNG SDS CO., LTD.
    Inventors: Rak-Kyeong Seong, Chan-Ho Min
  • Patent number: 11515610
    Abstract: The present invention relates to a laminated body with electric conductor including a substrate; a functional layer having at least an adhesive layer; an electric conductor; and a protective material, wherein the substrate, the functional layer having at least the adhesive layer, the electric conductor, and the protective material are sequentially laminated in a thickness direction, and wherein a thickness of the functional layer is less than or equal to 0.300 mm.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: November 29, 2022
    Assignees: AGC Inc., AGC GLASS EUROPE, AGC FLAT GLASS NORTH AMERICA, INC., AGC Vidros do Brasil Ltda.
    Inventors: Tetsuya Hiramatsu, Ryuta Sonoda, Yoshiyuki Ikuma, Masaki Horie, Ryota Okuda
  • Patent number: 11489242
    Abstract: A transmission line device includes first and second transmission lines. The first transmission line includes a first electrode pad that is electrically connected to a first signal conductor pattern, and a second electrode pad and a third electrode pad that are portions of a first ground conductor pattern. The second transmission line includes a fourth electrode pad that is electrically connected to a second signal conductor pattern, and a fifth electrode pad and a sixth electrode pad that are portions of a second ground conductor pattern. The first electrode pad is between the second electrode pad and the third electrode pad, and the fourth electrode pad is between the fifth electrode pad and the sixth electrode pad. The second electrode pad and the third electrode pad are larger than the first electrode pad, and the fifth electrode pad and the sixth electrode pad are larger than the fourth electrode pad.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: November 1, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Shinichi Araki
  • Patent number: 11445600
    Abstract: A signal via has a via diameter that causes a high-frequency signal to be propagated through a high-frequency transmission line causing multi mode propagation (multi-mode interference propagation). At least one of the inter-via distance between the signal via and respective ground vias, the via diameter, and the thickness of the multilayer substrate is determined to introduce the high-frequency signal from the interlayer transmission line to the signal lines in the high-intensity region of the multi mode propagation.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: September 13, 2022
    Assignees: SOKEN, INC., DENSO CORPORATION
    Inventors: Kazumasa Sakurai, Kazuya Wakita, Yuuji Kakuya
  • Patent number: 11431070
    Abstract: A flexible substrate (1) is bent at a bending part (2). A dielectric plate (3) has first and second main surfaces opposite to each other. A high-frequency signal line (4) is provided on the first main surface of the dielectric plate (3). A ground conductor (5) is provided on the second main surface of the dielectric plate (3). The high-frequency signal line (4) and the ground conductor (5) form a micro strip line. A local absent part (6) facing the high-frequency signal line (4) is provided on the ground conductor (5) only at the bending part (2).
    Type: Grant
    Filed: November 22, 2018
    Date of Patent: August 30, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Shin Chaki
  • Patent number: 11329358
    Abstract: Embodiments of the invention include a packaged device with transmission lines that have an extended thickness, and methods of making such device. According to an embodiment, the packaged device may include a first dielectric layer and a first transmission line formed over the first dielectric layer. Embodiments may then include a second dielectric layer formed over the transmission line and the first dielectric layer. According to an embodiment, a first line via may be formed through the second dielectric layer and electrically coupled to the first transmission line. In some embodiments, the first line via extends substantially along the length of the first transmission line.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: May 10, 2022
    Assignee: Intel Corporation
    Inventors: Adel A. Elsherbini, Mathew Manusharow, Krishna Bharath, Zhichao Zhang, Yidnekachew S. Mekonnen, Aleksandar Aleksov, Henning Braunisch, Feras Eid, Javier Soto
  • Patent number: 11290150
    Abstract: Various embodiments describe communication systems for implementing high-speed transmission systems using waveguide-mode transmission over wires. In certain examples, a communication system uses wire pairs as “waveguides” that transmit data at high frequencies and speeds. The data is transmitted through wave propagation that takes various forms, such as surface waves and Total Internal Reflection (TIR) waves.
    Type: Grant
    Filed: May 2, 2018
    Date of Patent: March 29, 2022
    Assignee: ASSIA SPE, LLC
    Inventors: John Matthew Cioffi, Kenneth J. Kerpez, Chan-Soo Hwang, Ioannis Kanellakopoulos
  • Patent number: 11279339
    Abstract: A hybrid vehicle includes a generator, a driving motor, and a battery. The control system includes the hybrid vehicle, and a controller for controlling the generator and the driving motor. The controller calculates a battery output request value and a power-generating output request value based on traveling conditions of the vehicle, and controls the driving motor and the power generator based on these values. At this time, when a state of the battery is a state in which the power-generating output request value is not satisfied, the controller executes an adjustment process for adjusting the battery output request value and the power-generating output request value. In the adjustment process, the smaller the remaining capacity of the battery, the smaller the battery output request value is and the larger the power-generating output request value is.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: March 22, 2022
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Taiga Hagimoto, Tetsuhiro Maki
  • Patent number: 11264720
    Abstract: An electrically controllable RF circuit that includes an EC cell and an EAP-based actuator configured to produce relative movement of an electrode of the electrochromic cell and an electrically conducting patch or another electrode electromagnetically coupled thereto. In one embodiment, the RF circuit operates as a tunable patch antenna whose frequency characteristics can be changed by changing the bias voltages applied to the EC cell and EAP-based actuator. Advantageously, the capability to tune the antenna using two different tuning mechanisms (i.e., a dielectric-permittivity based tuning mechanism implemented using the EC cell and a geometry-based tuning mechanism implemented using the EAP-based actuator) provides more degrees of control over the pertinent antenna characteristics compared to what is available in some other antenna designs.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: March 1, 2022
    Assignee: Nokia Technologies Oy
    Inventors: Dirk Wiegner, Wolfgang Templ, Senad Bulja, Rose F. Kopf
  • Patent number: 11251511
    Abstract: A signal transmission line includes a laminate, a signal conductor, a hollow portion, and a reinforcing conductor. The laminate includes a flexible laminate including resin layers each of which has flexibility. The signal conductor extends in a signal transmission direction of the laminate and is disposed in an intermediate position in a laminating direction of the resin layers. The hollow portion is in the laminate and defined by an opening provided at a portion of the plurality of resin layers. The reinforcing conductor is in the laminate. The hollow portion is disposed at a position overlapping with the signal conductor, in a plan view of the laminate from a surface perpendicular or substantially perpendicular to the laminating direction. The reinforcing conductor is disposed at a position different from the position of the hollow portion in a plan view.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: February 15, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kanto Iida, Nobuo Ikemoto
  • Patent number: 11245171
    Abstract: A transmission line device includes a first multilayer substrate with a transmission line including laminated insulating base materials and a conductor pattern on the insulating base materials, and a second multilayer substrate defining a connected member to which the transmission line of the first multilayer substrate is connected. The conductor pattern includes a signal conductor pattern and a signal electrode pad electrically connected to the signal conductor pattern. The first multilayer substrate includes a resist film provided on a surface of a laminate of the insulating base materials, and the resist film includes an opening that is separated from an outer edge of the signal electrode pad in a surface direction of the laminate of the insulating base material and exposes the signal electrode pad.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: February 8, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kuniaki Yosui
  • Patent number: 11245170
    Abstract: A multilayer board includes a layered body including insulating base material layers that are laminated, and first and second signal lines, a first ground conductor including a first opening, a second ground conductor, a third ground conductor, and an interlayer connecting conductor. The first signal line overlaps the first opening when seen in a layering direction. The second signal line is provided on a layer different from a layer including the first signal line and includes a portion extending side by side with the first signal line when seen in the Z-axis direction. The first, second, and third ground conductors are connected by the interlayer connecting conductor. The third ground conductor is disposed on a layer including the first signal line or a layer positioned between the first signal line and the second signal line.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: February 8, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Chu Xu
  • Patent number: 11227532
    Abstract: The present disclosure provides a panel, a manufacturing method for the same, and a terminal. The panel includes: a base substrate; at least one differential signal line group on the base substrate, each including two signal lines; and at least one ground wire group on the base substrate and on the same side of the base substrate as the at least one differential signal line group. The at least one ground wire group is in one-to-one correspondence with the at least one differential signal line group, each ground wire group includes two ground wires, and orthographic projections of the two ground wires in each ground wire group on the base substrate are on two sides of an orthographic projection of a corresponding differential signal line group on the base substrate, respectively.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: January 18, 2022
    Assignees: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xianyong Gao, Sijun Lei, Liang Gao, Yansheng Sun, Ying Zhang, Shanbin Chen
  • Patent number: 11228079
    Abstract: A balun includes a substrate, a balanced port, and an unbalanced port. The balanced port disposed on a first configuration surface of the substrate includes a first metal configuration section, a second metal configuration section, and two balanced terminals respectively disposed at one end of the first metal configuration section and one end of the second metal configuration section. The unbalanced port is disposed on a second configuration surface of the substrate corresponding to an arrangement of the balanced port to form an overlapping coupling with the balanced port. The unbalanced port includes a third metal configuration section and an unbalanced terminal disposed at one end of the third metal configuration section. A first orthographic projection on the substrate formed by the first metal configuration section and the second metal configuration section jointly is overlapped with a second orthographic projection on the substrate formed by the third metal configuration section.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: January 18, 2022
    Assignee: NATIONAL SYNCHROTRON RADIATION RESEARCH CENTER
    Inventors: Tsung-Chi Yu, Chao-En Wang, Lung-Hai Chang
  • Patent number: 11222845
    Abstract: A semiconductor device includes a dielectric layer, a first conductive layer penetrating the dielectric layer, and a grounding structure disposed within the dielectric layer and adjacent to the first conductive layer. The dielectric layer has a first surface and a second surface opposite the first surface. The first conductive layer has a first portion and a second portion connected to the first portion. The first portion has a width greater than that of the second portion.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: January 11, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Po-I Wu, Chen-Chao Wang
  • Patent number: 11088096
    Abstract: A transistor outline housing is provided that includes a header for an optoelectronic component. The header has electrical feedthroughs in the form of connection pins embedded in a potting compound. The header has a recess in which at least one of the connection pins in one of the feedthroughs extends out of the lower surface of the header.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: August 10, 2021
    Assignee: SCHOTT AG
    Inventors: Artit Aowudomsuk, Karsten Droegemueller, Rudolf Jungwirth, Michelle YanYan Fang
  • Patent number: 11056760
    Abstract: A method of making an electrical structure having a foam housing is set forth. The foam housing includes an interior surface forming a conductive cavity adapted to carry energized waveforms therethrough. An electrical component of the electrical structure is integrally formed with the interior surface as the foam housing of the structure is assembled. The method includes the steps of depositing a plating material into a mold, pouring a foam polymer into the mold and removing the plated foam structure from the mold without etching the section from the mold. The method further includes steps of forming a metallic form into a planar structure, filling the open pores of the foam with a material such as photo-resist, machining a cavity from the foam, electroplating the cavity in the foam then removing the photo-resist material.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: July 6, 2021
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Steven J. Mass, Anthony L. Long, Mansoor K. Siddiqui, Marijan D. Grgas, Gershon Akerling
  • Patent number: 11056756
    Abstract: A multilayer substrate connecting body includes first and second multilayer substrates. The first and second multilayer substrates each include a step portion defined by a difference of a number of stacked layers of insulating base material layers, and a portion of a conductor pattern is exposed to the step portion. An anisotropic conductive film is disposed between the step portions of the first and second multilayer substrates, and portions of conductor patterns that are exposed to the step portions of the first and second multilayer substrates are electrically connected through an electrically connecting portion of the anisotropic conductive film.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: July 6, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kuniaki Yosui
  • Patent number: 11043452
    Abstract: According to one embodiment, a semiconductor device includes first to fourth electrodes, a semiconductor layer, a first extension conductive layer, first and second electrode connection portions, and an insulating member. The first to fourth electrodes extend along a first direction. The first electrode is between the second and third electrodes in a second direction. The second direction crosses the first direction. The first extension conductive layer extends along the first direction and is electrically connected to the first electrode. The fourth electrode is between the first and third electrodes in the second direction. The first electrode connection portion is electrically connected to the first electrode. The second electrode connection portion is electrically connected to the second and fourth electrodes. The insulating member includes a first insulating portion. The first insulating portion is between the second electrode connection portion and a portion of the first electrode.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: June 22, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yosuke Kajiwara, Masahiko Kuraguchi
  • Patent number: 10998706
    Abstract: A system includes a first bus bar. A foil element is spaced apart from the first bus bar. The foil element is electrically connected to the first bus bar by grid elements. A second bus bar is spaced apart from the foil element across a dielectric layer. The system can include a second foil element spaced apart from the second bus bar.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: May 4, 2021
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Robert C. Cooney, Huazhen Chai
  • Patent number: 10963023
    Abstract: A computing system including a housing assembly having a front and a rear, a CPU module positioned towards the front of the housing assembly and including a plurality of I/O connectors, and a plurality of I/O modules positioned towards the rear of the housing assembly, where each I/O module includes a second I/O connector. The computing system also includes a plurality of riser cards each having a PCB with opposing side surfaces, a front edge, a rear edge, a top edge, a bottom edge, a third I/O connector coupled to the bottom edge and a fourth I/O connector coupled to the rear edge. The third I/O connector on each riser card is connected to one of the first I/O connectors and the fourth I/O connector on each riser card is connected to one of the second I/O connectors so that the riser cards are oriented in parallel with each other.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: March 30, 2021
    Assignee: JABIL INC.
    Inventors: Fengquan Zheng, Ronald E. St. Germain
  • Patent number: 10930990
    Abstract: A device includes at least one electrically conductive structure and at least one stripline. The stripline includes stripline sections that are connected to one another in a series connection between a first terminal and a second terminal. A first subset of the stripline sections is arranged on a first side of the conductive structure and a second subset of the stripline sections is arranged on a second side of the conductive structure. The device also includes at least one conductive connection between the first subset of the stripline sections and the second subset of the stripline sections, wherein the at least one conductive connection is isolated from the at least one electrically conductive structure.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: February 23, 2021
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: David Seebacher, Andrea Del Chiaro, Christian Schuberth, Peter Singerl, Ji Zhao
  • Patent number: 10930410
    Abstract: A flat flexible cable may include a plurality of generally parallel, co-planar flat conductive traces sandwiched between two ribbons of dielectric material and a plurality of strips of conductive material formed at intervals along a length of the flat flexible cable, each strip of conductive material electrically coupling a plurality of ground traces of the flat conductive traces to one another via portions of the ground traces exposed through the dielectric material at each of the intervals.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: February 23, 2021
    Assignee: Dell Products L.P.
    Inventors: Kevin W. Mundt, Bhyrav M. Mutnury
  • Patent number: 10873120
    Abstract: A multilayer board includes a layered body including insulating base material layers that are laminated, and first and second signal lines, a first ground conductor including a first opening, a second ground conductor, a third ground conductor, and an interlayer connecting conductor. The first signal line overlaps the first opening when seen in a layering direction. The second signal line is provided on a layer different from a layer including the first signal line and includes a portion extending side by side with the first signal line when seen in the Z-axis direction. The first, second, and third ground conductors are connected by the interlayer connecting conductor. The third ground conductor is disposed on a layer including the first signal line or a layer positioned between the first signal line and the second signal line.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: December 22, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Chu Xu
  • Patent number: 10811753
    Abstract: A hollow-waveguide-to-planar-waveguide transition circuit includes: a dielectric substrate; strip conductors formed on a first main surface of the dielectric substrate; a ground conductor formed on a second main surface of the dielectric substrate, facing the strip conductors in the thickness direction; a slot formed in the ground conductor; a coupling conductor formed at a position to be electrically coupled with the strip conductors on the first main surface; and branch conductor lines formed on the first main surface. Each of the branch conductor lines includes a base portion branching from the coupling conductor and a tip portion that is electrically open.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: October 20, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiromasa Nakajima, Akimichi Hirota, Naofumi Yoneda, Takeshi Oshima
  • Patent number: 10790432
    Abstract: Techniques for implementing multiple microwave attenuators on a high thermal conductivity substrate for cryogenic applications to reduce heat and thermal noise during quantum computing are provided. In one embodiment, a device for using in cryogenic environment is provided that comprises a substrate having a thermal conductivity above a defined threshold, a plurality of transmission lines fabricated on the substrate and arranged with a separation gap between the plurality of transmission lines to maintain crosstalk below ?50 decibels, and one or more microwave attenuators embedded on the plurality of transmission lines.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: September 29, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Salvatore Bernardo Olivadese, James Robert Rozen, Patryk Gumann, Martin O. Sandberg
  • Patent number: 10777867
    Abstract: A transmission line of the disclosure includes: a first line; a second line having characteristic impedance higher than characteristic impedance of the first line; and a third line. The transmission line transmits a symbol that corresponds to a combination of signals in the first line, the second line, and the third line.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: September 15, 2020
    Assignee: Sony Corporation
    Inventor: Tatsuya Sugioka
  • Patent number: 10756672
    Abstract: A varainductor includes a signal line, a ground plane, and a floating plane over a substrate. The ground plane is disposed on a side of the signal line, and the first floating plane is disposed between the ground plane and the signal line. An array of switches includes at least two switches configured to selectively electrically connect the ground plane to the floating plane.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: August 25, 2020
    Assignee: TAIWAN SEMINCONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Hsuan Liu, Hsieh-Hung Hsieh, Chewn-Pu Jou, Fu-Lung Hsueh
  • Patent number: 10720690
    Abstract: A transmission line structure includes a first transmission line having a first and a second extending line segments and a first and a second line segments extending along a first direction and a third line segment extending along a second direction, and a second transmission line having a third and a fourth extending line segments, a fourth and a fifth line segments extending along the first direction and a sixth line segment extending along the second direction. The first and the second extending line segment are connected to ends of the first and the second line segment. The third line segment is connected to sides of the first and the second line segment. The third and the fourth extending line segment are connected to ends of the fourth the fifth line segment. The sixth line segment is connected to sides of the fourth and the fifth line segment.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: July 21, 2020
    Assignee: CHUNG YUAN CHRISTIAN UNIVERSITY
    Inventor: Guang-Hwa Shiue
  • Patent number: 10673114
    Abstract: A signal transmission line includes a laminate, a signal conductor, a hollow portion, and a reinforcing conductor. The laminate includes a flexible laminate including resin layers each of which has flexibility. The signal conductor extends in a signal transmission direction of the laminate and is disposed in an intermediate position in a laminating direction of the resin layers. The hollow portion is in the laminate and defined by an opening provided at a portion of the plurality of resin layers. The reinforcing conductor is in the laminate. The hollow portion is disposed at a position overlapping with the signal conductor, in a plan view of the laminate from a surface perpendicular or substantially perpendicular to the laminating direction. The reinforcing conductor is disposed at a position different from the position of the hollow portion in a plan view.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: June 2, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kanto Iida, Nobuo Ikemoto
  • Patent number: 10615480
    Abstract: A radio frequency transmission arrangement comprises a ground plate having an aperture comprising a slot with an elongate cross-section and substantially parallel sides, and a first and second transmission line. The thickness of the ground plate is greater than a width of the slot. The first transmission line comprises a first elongate conductor on a first side of the ground plate and has an end terminated with a first termination stub. The second transmission line comprises a second elongate conductor on the opposite side of the ground plate and has an end terminated with a second termination stub. The first transmission line is arranged to cross the slot at a point adjacent to the first termination stub, and the second transmission line is arranged to cross the slot at a point adjacent to the second termination stub.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: April 7, 2020
    Assignee: CAMBIUM NETWORKS LIMITED
    Inventors: Peter Strong, Adam Wilkins, Carl Morrell, Paul Clark, Nigel Jonathan Richard King
  • Patent number: 10615481
    Abstract: A millimeter wave semiconductor apparatus includes: a module substrate including the millimeter wave semiconductor chip mounted thereon; and a waveguide tube member constituting a package of the chip and the waveguide tube by including the waveguide tube and supporting the module substrate, the module substrate includes: a base member; a line pattern including a microstrip line portion, a fin line portion, and an interface portion formed on one of surfaces of the base member; a ground pattern formed on the other surface of the base member; and a cavity defined by a hole formed through the base member at a center portion thereof and a surface of the ground pattern on a side where the line pattern is formed as a bottom surface for mounting the chip on the bottom surface thereof, and the microstrip line portion and the chip are wire-bonded at the substantially same level.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: April 7, 2020
    Assignee: NEC CORPORATION
    Inventor: Toshihide Kuwabara
  • Patent number: 10581147
    Abstract: An antenna is used in a radar, sensor, communication, discovery, electronic warfare and/or networking system. The antenna system includes a disc-shaped conductive substrate, a ring-shaped conductive substrate being positioned generally parallel with respect to the disc-shaped conductive substrate, the ring-shaped conductive substrate having an outer diameter generally coincides with an outer diameter of the disc-shaped conductive substrate. Antenna elements, such as, Balanced Antipodal Vivaldi Antenna (BAVA) elements, are disposed between the disc-shaped conductive substrate and the ring-shaped conductive substrate.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: March 3, 2020
    Assignee: ROCKWELL COLLINS, INC.
    Inventor: James B. West
  • Patent number: 10561012
    Abstract: Disclosed are apparatus and methods related to ground paths implemented with surface mount devices to facilitate shielding of radio-frequency (RF) modules. In some embodiments, a method for fabricating a radio-frequency module includes providing a packaging substrate, the packaging substrate configured to receive a plurality of components and the packaging substrate including a ground plane. In some embodiments, the method includes mounting a surface mount device on the packaging substrate, and forming or providing a conductive layer over the surface mount device such that the surface mount device electrically connects the conductive layer with the ground plane to thereby provide radio-frequency shielding between first and second regions about the surface mount device.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: February 11, 2020
    Assignee: Skyworks Solutions, Inc.
    Inventor: Howard E. Chen
  • Patent number: 10522892
    Abstract: This invention provides a high-frequency line adopting a structure to suppress an impedance variation and occurrence of an excessive power loss in high-frequency wiring having intersection with an optical waveguide. A high-frequency line is a microstrip line which has a basic configuration of stacking a ground electrode, a dielectric layer, and a signal electrode in this order on a SI-InP substrate. In addition, as shown in a transverse sectional view, an optical waveguide core made of InP-based semiconductor intersects with the high-frequency line in a crossing manner. A width of the signal electrode is partially increased in a certain region covering the intersection with the optical waveguide along a propagating direction of the high-frequency line. In the microstrip line, the width of the signal electrode is partially increased from w1 to w2, and characteristic impedance is thus reduced as compared to one with the uniform width w1.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: December 31, 2019
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Nobuhiro Kikuchi, Eiichi Yamada, Yoshihiro Ogiso, Josuke Ozaki
  • Patent number: 10505584
    Abstract: Aspects of the subject disclosure may include, a system for generating electromagnetic signals that resonate in a cavity having a plurality of reflectors resulting in resonating electromagnetic signals and combining the resonating electromagnetic signals to form an electromagnetic wave that traverses a reflector and couples onto a physical transmission medium. A plurality of fins is aligned radially outward from a surface of a physical transmission medium within a cavity between reflector. Other embodiments are disclosed.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: December 10, 2019
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Paul Shala Henry, Robert Bennett, Donald J. Barnickel, Giovanni Vannucci, Farhad Barzegar, Irwin Gerszberg, Thomas M. Willis, III, Bruce E. Stuckman
  • Patent number: 10506705
    Abstract: Provided is a multilayered transmission line plate including a pair of ground layers, a differential wiring disposed between a one-sided ground layer of the pair of ground layers and the other ground layer, an insulating layer (X) disposed between the differential wiring and the one-sided ground layer, and an insulating layer (Y) disposed between the differential wiring and the other ground layer, wherein the insulating layer (X) has a layer containing a resin and not containing a glass cloth; the insulating layer (X) or the insulating layer (Y) has a layer containing a glass cloth and a resin; and the thickness of the insulating layer (X) is equal to or less than the thickness of the insulating layer (Y).
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: December 10, 2019
    Assignee: HITACHI CHEMICAL COMPANY, LTD.
    Inventors: Yuusuke Kondou, Etsuo Mizushima, Takao Tanigawa, Yuki Nagai, Tomio Fukuda, Tetsurou Irino
  • Patent number: 10505243
    Abstract: A balun includes an unbalanced port, a first balanced port, a second balanced port, a main line, a subline, a capacitor, and an impedance matching section. The subline is configured to be electromagnetically coupled to the main line. The main line has a first end and a second end opposite to each other. The subline has a first end and a second end opposite to each other. The capacitor is provided between the first end of the main line and the unbalanced port. The impedance matching section is provided between the second end of the subline and the second balanced port. The second end of the main line is connected to a ground. The first end of the subline is connected to the first balanced port.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: December 10, 2019
    Assignee: TDK CORPORATION
    Inventors: Hiroya Suzuki, Yuta Ashida, Noriaki Ootsuka
  • Patent number: 10490874
    Abstract: A board to board contactless interconnect system includes a first circuit board for launching at st one microwave signal into a cavity of a first waveguide secured thereto. A second waveguide, secured to a second circuit board, is coupleable to the first waveguide to receive the at least one microwave signal in a cavity of the second waveguide and conduct the at least one microwave signal onto a microwave receiver aligned with the cavity on the second circuit board. The waveguides may be separable and may include additional waveguides. Conductive gaskets with apertures for microwave signals to pass through are positioned between the waveguides and between each circuit board and a waveguide to prevent leakage of microwave energy therebetween. Some embodiments may pass signals through a sealed boundary and maintain integrity of the seal. Such embodiments may have a third waveguide interposed between the first and second waveguides.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: November 26, 2019
    Assignee: TE CONNECTIVITY CORPORATION
    Inventors: Graham Harry Smith, Jr., Stephen T. Morley, Hung Thai Nguyen, Michael Frank Cina
  • Patent number: 10461033
    Abstract: A semiconductor memory package is provided. The package includes a base substrate, and chip connection pads and external connection pads respectively arranged on upper and lower surfaces of the base substrate; and two semiconductor memory chips mounted on the base substrate each having chip pads electrically connected to the chip connection pads. A first electrical path extends from an external connection pad to a first chip pad of one of the chips and a second electrical path extends from the external connection pad to a second chip pad of another chip, the first and second electrical paths have a common line, and the first electrical path has a first branch line and the second electrical path has a second branch line. The base substrate includes an open stub extending from the common line and having an end which is open without being connected to another electrical path.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: October 29, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-Joo Lee, Hee-woo An