Strip Type Patents (Class 333/238)
  • Patent number: 8354892
    Abstract: Provided is a marchand balun device. The marchand balun device includes: a first line connected between a balanced terminal and a ground terminal; a second line disposed horizontally parallel to the first line and forming a parallel capacitance jointly with the first line; and a coupled line disposed vertically parallel to the first and second lines and forming a vertical capacitance jointly with one of the first and second lines.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: January 15, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jin Cheol Jeong, In Bok Yom
  • Publication number: 20130009729
    Abstract: A printed circuit board having a micro strip line, a printed circuit board having a strip line and a method of manufacturing thereof are disclosed. The printed circuit board having a micro strip line in accordance with an embodiment of the present invention includes a first insulation layer, a signal line buried in one surface of the first insulation layer, a plurality of conductors penetrating through the first insulation layer and being disposed on both sides of the signal line in parallel with the signal line, and a ground layer formed to be electrically connected to the conductor on the other surface of the first insulation layer.
    Type: Application
    Filed: September 15, 2012
    Publication date: January 10, 2013
    Inventor: Heung-Kyu KIM
  • Publication number: 20130002375
    Abstract: A transmission line structure is disclosed. The structure includes at least one signal transmission line and a pair of ground transmission lines embedded in a first level of a dielectric layer on a substrate, wherein the pair of ground transmission lines are on both sides of the signal transmission line. A first ground layer is embedded in a second level lower than the first level of the dielectric layer and a second ground layer is embedded in a third level higher than the first level of the dielectric layer. First and second pairs of via connectors are embedded in the dielectric layer, wherein the first pair of via connectors electrically connects the pair of ground transmission lines to the first ground layer and the second pair of via connectors electrically connects the pair of ground transmission lines to the second ground layer.
    Type: Application
    Filed: July 1, 2011
    Publication date: January 3, 2013
    Applicant: MEDIATEK INC.
    Inventors: Ming-Tzong Yang, Tung-Hsing Lee, Kuei-Ti Chan
  • Patent number: 8344828
    Abstract: A metamaterial transmission line for transmitting an electromagnetic wave. The metamaterial transmission line may include a substrate including a substrate configured to include a an upper portion and a lower portion on which a ground plane is formed, a signal line configured to be formed on the substrate, and a defected ground structure configured to include an etched region and two metal portions, wherein the etched region is generated by etching a part of the ground plane and the metal portions extend from the signal line and are disposed on the etched region.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: January 1, 2013
    Assignees: Electronics and Telecommunications Research Institute, Kyung Hee University Industry Academic Cooperation Foundation
    Inventors: Bom-Son Lee, Tack-Gyu Kim, Jae-Ick Choi, Wang-Joo Lee
  • Patent number: 8344819
    Abstract: Methods, systems, and apparatuses for circuit boards are provided herein. An electrically insulating material is formed over one or more traces on a circuit board. One or more further electrically conductive features are present on the circuit board. A layer of an electrically conductive material is formed over the one or more traces that is electrically isolated from the one or more traces by the electrically insulating material, and is in electrical contact with the one or more further electrically conductive features. The electrically conductive material confines magnetic and electric fields produced when the one or more traces conduct an alternating current. By confining the magnetic and electric field distributions in this manner, problems of interference and/or crosstalk with adjacent signal traces are reduced or eliminated.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: January 1, 2013
    Assignee: Broadcom Corporation
    Inventor: Sampath Komarapalayam Velayudham Karikalan
  • Publication number: 20120326812
    Abstract: In order that the total distance of a first high-frequency current path, which is defined in the periphery of slits (34a, 36a), satisfies a prescribed relationship, the slits (34a, 36a) are respectively formed in a first conductor pattern (34) and a second conductor pattern (36) that configure a coplanar line (30). Thus, the first high-frequency current that flows along the peripheries of the slits (34a, 36a) combines with a second high-frequency current that flows along a signal line conductor (32) without significantly affecting the second high-frequency current. Thus, radiated electromagnetic waves are efficiently collected, and radiation loss in a wiring substrate (10) is efficaciously alleviated.
    Type: Application
    Filed: March 4, 2011
    Publication date: December 27, 2012
    Applicant: NEC CORPORATION
    Inventor: Risato Ohhira
  • Publication number: 20120313736
    Abstract: On-chip high performance slow-wave coplanar waveguide through-silicon via structures, method of manufacture and design structures for integrated circuits are provided herein. The method includes forming at least one ground plane layer in a substrate and forming a signal layer in the substrate, in a same plane layer as the at least one ground. The method further includes forming at least one metal filled through-silicon via between the at least one ground plane layer and the signal layer.
    Type: Application
    Filed: June 9, 2011
    Publication date: December 13, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Essam F. MINA, Guoan WANG, Wayne H. WOODS, JR.
  • Patent number: 8330552
    Abstract: A sandwich strip coupled coupler implemented in a multi-layer substrate, such as a multi-layer printed circuit board. In one example, the sandwich strip coupled coupler includes a main arm having a first main arm section and a second main arm section disposed above the first main arm section, the first and second main arm sections being electrically connected together, and a coupled arm disposed between the first and second main arm sections, the first main arm section, the coupled arm and the second main arm section forming a sandwich structure.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: December 11, 2012
    Assignee: Skyworks Solutions, Inc.
    Inventors: Yang Li, Xuanang Zhu, Dmitri Prikhodko
  • Patent number: 8324981
    Abstract: A composite balun includes a plurality of baluns, at least one capacitor, a ground terminal, and a DC voltage supply terminal. The plurality of baluns and the capacitor are built into a single chip. Each of the baluns includes first to fourth connection lines, a first balanced terminal, a second balanced terminal, and an unbalanced terminal. The first connection line is connected at one end to the unbalanced terminal. The second connection line is connected at one end to the other end of the first connection line. The third connection line is electromagnetically coupled to the first connection line and connected at one end to the first balanced terminal and at the other end to the DC voltage supply terminal. The fourth connection line is electromagnetically coupled to the second connection line and connected at one end to the second balanced terminal and at the other end to the DC voltage supply terminal.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: December 4, 2012
    Assignee: TDK Corporation
    Inventors: Shoichi Ohi, Naoto Ohyama
  • Patent number: 8324979
    Abstract: A coupled microstrip line structure having tunable characteristic impedance and wavelength are provided. In accordance with one aspect of the invention, a coupled microstrip line structure comprises a first ground plane having a plurality of first conductive strips separated by a dielectric material, and a first dielectric layer over the first ground plane. The coupled microstrip line further comprises a first signal line over the first dielectric layer, wherein the first signal line is directly above the plurality of first conductive strips, and wherein the first signal line and the plurality of first conductive strips are non-parallel, and a second signal line over the first dielectric layer, wherein the second signal line is directly above the plurality of first conductive strips, and wherein the second signal line and the plurality of first conductive strips are non-parallel, and wherein the second signal line is substantially parallel to the first signal line.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: December 4, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Shu-Ying Cho
  • Patent number: 8319577
    Abstract: To provide a thin film balun that can improve balance characteristics while maintaining miniaturization. In a thin film balun to which an embodiment relates, an auxiliary coil portion is disposed at a predetermined position so as to face any one of an unbalanced transmission line and a balanced transmission line.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: November 27, 2012
    Assignee: TDK Corporation
    Inventor: Makoto Endo
  • Publication number: 20120287000
    Abstract: A structure of the present disclosure is provided with a first conductor element (11), a conductor pattern (19) facing the first conductor element (11). In the conductor pattern (19), a part opposed to the first conductor element (11) includes a line part (14) with an open end (141), an opening (13) partially surrounding the line part (14) and a second conductor element (12) surrounding the opening (13) and being continuous to the line part (14). The first conductor element (11) and the line part (14) make up a microstrip line (16).
    Type: Application
    Filed: December 6, 2010
    Publication date: November 15, 2012
    Inventors: Noriaki Ando, Hiroshi Toyao
  • Patent number: 8304659
    Abstract: Circuit boards and methods for their manufacture are disclosed. The circuit boards carry high-speed signals using conductors formed to include lengthwise channels. The channels increase the surface area of the conductors, and therefore enhance the ability of the conductors to carry high-speed signals. In at least some embodiments, a discontinuity also exists between the dielectric constant within the channels and just outside the channels, which is believed to reduce signal loss into the dielectric material.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: November 6, 2012
    Assignee: Force 10 Networks, Inc.
    Inventor: Joel R. Goergen
  • Publication number: 20120274423
    Abstract: A flexible high-frequency signal transmission line includes a dielectric body including laminated flexible dielectric layers. A signal line is provided in the dielectric body. A grounding conductor is arranged in the dielectric body to be opposed to the signal line via one of the dielectric layers. The grounding conductor is of a ladder structure including a plurality of openings and a plurality of bridges arranged alternately along the signal line. A characteristic impedance of the signal line changes between two adjacent ones of the plurality of bridges such that the characteristic impedance of the signal line rises from a minimum value to an intermediate value and to a maximum value and falls from the maximum value to the intermediate value and to the minimum value in this order.
    Type: Application
    Filed: June 29, 2012
    Publication date: November 1, 2012
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Noboru KATO
  • Patent number: 8299873
    Abstract: A grounding plate and a transmission line are provided in a stack of dielectric material layers. First transmission line portions having a first width are alternately interlaced with second transmission line portions having a second width in the transmission line. The second width is greater than the first width so that inductance of the transmission line is increased relative to a transmission line having a fixed width. Metal fins may be provided between the grounding plate and the transmission line in the stack of the dielectric material layers. The metal fins may be grounded to the grounding plate to increase capacitance between the transmission line and the grounding plate. The increase in the inductance and the capacitance per unit length between the transmission line and the grounding plate is advantageously employed to provide a reduced phase velocity for electromagnetic signal transmitted through the transmission line. A design structure for the transmission line structure is provided.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Guoan Wang, Essam Mina
  • Patent number: 8299871
    Abstract: In a directional coupler having flaps on a pair transmission lines to be coupled, structural characteristics such as the distance between adjacent flaps, the length and width of a flap, the direction of projection of the flaps, and whether and to what degree the flaps on the two transmission lines overlap can be selected in order to optimize electrical characteristics of the coupler.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: October 30, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Rodrigo Carrillo-Ramirez
  • Patent number: 8294529
    Abstract: A printed circuit board having a micro strip line, a printed circuit board having a strip line and a method of manufacturing thereof are disclosed. The printed circuit board having a micro strip line in accordance with an embodiment of the present invention includes a first insulation layer, a signal line buried in one surface of the first insulation layer, a plurality of conductors penetrating through the first insulation layer and being disposed on both sides of the signal line in parallel with the signal line, and a ground layer formed to be electrically connected to the conductor on the other surface of the first insulation layer.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: October 23, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Heung-Kyu Kim
  • Publication number: 20120256707
    Abstract: Various embodiments of millimeter-wave systems on a printed circuit board, including a microstrip, a probe, and an RF integrated circuit, as well as methods for manufacturing said systems. Various embodiments have holes extending through lamina in the PCB, thereby improving radiation propagation. Various embodiments have conductive cages created by multiple through-holes extending through lamina in the PCB, thereby increasing radiation propagation. The manufacture of such systems is easier and less expensive than the manufacture of current systems.
    Type: Application
    Filed: June 20, 2012
    Publication date: October 11, 2012
    Applicant: Siklu Communication Ltd.
    Inventors: Yigal Leiba, Elad Dayan
  • Patent number: 8283992
    Abstract: A balun that includes a first conductor, a second conductor, and a third conductor. The first conductor has a first length. The first conductor also has a first end connected to a first balanced power amplifier output port. The second conductor has substantially the same first length. The second conductor also includes a first end connected to a second balanced power amplifier output port and a second end connected to a second end of the first conductor. The third conductor has substantially the same first length. The third conductor has a first end connected to an antenna port and a second end connected to a ground potential.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: October 9, 2012
    Assignee: Broadcom Corporation
    Inventors: Tom McKay, Vas Postoyalko, Edwin Li
  • Patent number: 8283991
    Abstract: Provided are assemblies and processes for efficiently coupling wideband differential signals between balanced and unbalanced circuits. The assemblies include a broadband balun having an unbalanced transmission line portion, a balanced transmission line portion, and a transition region disposed between the unbalanced and balanced transmission line portions. The unbalanced transmission line portion includes at least one ground and a pair of conductive signal traces, each isolated from ground. The balanced portion does not include an analog ground. The transition region effectively terminates the analog ground, while also smoothly transitioning or otherwise shaping transverse electric field distributions between the balanced and unbalanced portions. Beneficially, the balun is free from resonant features that would otherwise limit operating bandwidth, allowing it to operate over a wide bandwidth of 10:1 or greater.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: October 9, 2012
    Assignee: Raytheon Company
    Inventor: Kenneth A. Essenwanger
  • Patent number: 8279025
    Abstract: An integrated circuit structure includes an interconnect structure over a semiconductor substrate and a coaxial transmission line. The coaxial transmission line includes a signal line, a top plate over the signal line and electrically insulated from the signal line, and a bottom plate under the signal line and electrically insulated from the signal line. At least one of the top plate and the bottom plate includes metal strip shields and dielectric strips, with each of the dielectric strips being between two of the metal strip shields. The integrated circuit structure further includes a ground conductor electrically connecting the top plate and the bottom plate. The ground conductor is insulated from the signal line by a dielectric material.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: October 2, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Shu-Ying Cho
  • Patent number: 8274343
    Abstract: An integrated circuit structure includes a semiconductor substrate; an interconnect structure over the semiconductor substrate; a first dielectric layer over the semiconductor substrate and in the interconnect structure; a second dielectric layer in the interconnect structure and over the first dielectric layer; and a wave-guide. The wave-guide includes a first portion in the first dielectric layer and a second portion in the second dielectric layer. The first portion adjoins the second portion.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: September 25, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Hsiu-Ying Cho
  • Patent number: 8274340
    Abstract: A signal bus includes multiple interconnects for transporting electronic signals. The interconnects have different physical path lengths and different structures to equalize the different the physical path lengths, so that the electronic signals traverse the corresponding interconnects in same period of time.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: September 25, 2012
    Assignee: Agilent Technologies, Inc.
    Inventor: Nathaniel Guilar
  • Publication number: 20120235764
    Abstract: Disclosed is a structure for impedance matching by applying a CPW structure to an impedance discontinuous portion on a data signal line or using a micro-strip open stub so as to be used for high-speed transmission by a flexible PCB. According to the present invention, it is possible to fabricate a flexible PCB capable of performing low-priced and high-speed transmission.
    Type: Application
    Filed: February 3, 2012
    Publication date: September 20, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sae Kyoung KANG, Joon Ki LEE, Joon Young HUH, Jyung Chan LEE
  • Patent number: 8269575
    Abstract: A semiconductor device has an RF balun formed over a substrate. The RF balun includes a first conductive trace wound to exhibit inductive properties with a first end coupled to a first terminal of the semiconductor device and second end coupled to a second terminal of the semiconductor device. A first capacitor is coupled between the first and second ends of the first conductive trace. A second conductive trace is wound to exhibit inductive properties with a first end coupled to a third terminal of the semiconductor device and second end coupled to a fourth terminal of the semiconductor device. The first conductive trace is formed completely within the second conductive trace. The first conductive trace and second conductive trace can have an oval, circular, or polygonal shape separated by 50 micrometers. A second capacitor is coupled between the first and second ends of the second conductive trace.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: September 18, 2012
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Robert C. Frye, Kai Liu
  • Patent number: 8258889
    Abstract: A directional coupler for the directional transmission of high-frequency signals provides at least three lines and at least three ports. Two lines of the three lines are connected in a conductive manner at least at their ends. A third line is arranged between the two first lines and coupled to the latter in an electromagnetic manner. In this context, the high-frequency signal is transmitted from the third line to the first line and second line. The coupling is implemented via a coupling gap.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: September 4, 2012
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Christoph Fluhrer
  • Patent number: 8248183
    Abstract: The present invention provides a transmission line portion for a circuit board including a conductive strip and a pad portion including a conductive pad connected to the conductive strip, wherein an impedance discontinuity or mismatch between the transmission line portion and the pad portion is reduced or controlled. Impedance discontinuity or mismatch may be controlled by controlling the dimensions of the pad portion, for example the pad width or distance between pad and ground. A ground pad associated with the pad portion may be provided on a different layer than a ground plane of the transmission line portion. The ground pad and ground plane may be connected by vias. The ground pad may comprise a patterned conductive region, the pattern configured so as to desirably configure impedance of the pad portion. Also provided are a method, circuit board layout, and the like, related to the above.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: August 21, 2012
    Assignee: Sierra Wireless, Inc.
    Inventor: Ashish Syal
  • Publication number: 20120193771
    Abstract: A transmission line includes two tapered lines having a tapered planar shape and arranged in parallel, opposite lines provided in opposition to the narrower width sides of the two tapered lines, and a bonding wire for connecting the narrower width sides of the two tapered lines and the opposite lines, wherein the width between two outer edges on the narrower width sides of the two tapered lines arranged in parallel is greater than the width between outer edges on the opposite side of the opposite lines in opposition to the narrower width sides of the two tapered lines.
    Type: Application
    Filed: November 29, 2011
    Publication date: August 2, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Satoshi MASUDA
  • Publication number: 20120194300
    Abstract: To provide a communication sheet structure that is used in combination with an IC tag, has stable read rate and can be easily introduced and installed on an existing shelf, and also an information management system using the same.
    Type: Application
    Filed: October 4, 2010
    Publication date: August 2, 2012
    Applicant: TEIJIN FIBERS LIMITED
    Inventors: Machiko Oouchida, Seiji Ito
  • Publication number: 20120188030
    Abstract: Embodiments of the present application disclose a waveguide conversion device. The waveguide conversion device includes: a multi-layer circuit board; and a waveguide cavity and a metal reflection cavity, located at two lateral sides of the multi-layer circuit board. The waveguide cavity and the metal reflection cavity are embedded in the multi-layer circuit board. The multi-layer circuit board is disposed with a micro strip line or a strip line and a match patch connected to the micro strip line or the strip line. The match patch is located in the waveguide cavity.
    Type: Application
    Filed: April 4, 2012
    Publication date: July 26, 2012
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jie LIU, Cui GUO, Wenxin YUAN, Tiezhu YU
  • Patent number: 8228139
    Abstract: The invention relates to a transmission line (1) comprising: a groove (2) defined by two parallel conducting walls (3) and a conducting floor (4) all electrically connected to each other, together forming a peripheral conductor of the transmission line, and a center conductor (5), at least partly submersed in the groove (2), the center conductor (5) being isolated from the conducting walls (3) and the conducting floor (4) of the groove (2). The transmission line is distinguished in that the center conductor (5) comprises at least one conductor formed on a side of a printed circuit board (6). The invention also relates to a method for the production of a transmission line.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: July 24, 2012
    Assignee: Powerwave Technologies Sweden AB
    Inventor: Björn Lindmark
  • Patent number: 8228133
    Abstract: A first balance electrode unit electrically connected to a pair of balance terminals (a first balance terminal and a second balance terminal) is formed on a main surface of a fourth dielectric layer sandwiched by an upper grounding electrode and a lower grounding electrode in a dielectric substrate. A second balance electrode unit electrically connected to a pair of balance terminals on the main surface of a seventh dielectric layer. An unbalance electrode unit electrically connected to an unbalance terminal is formed on the main surface of a fifth dielectric layer.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: July 24, 2012
    Assignee: Soshin Electric Co., Ltd.
    Inventors: Hiroto Motoyama, Hironobu Kimura, Yasuhiko Mizutani
  • Publication number: 20120182082
    Abstract: Embodiments of the present invention are directed to providing an increased trace width when traversing a void in another layer in a printed circuit board or package design. By increasing the trace width or alternatively increasing the capacitance, the degradation due to the void can be reduced. This approach works for microstrip, stripline as well as other transmission lines that use a reference plane. The void can be the result of an antipad associated with a via, or any other disruption in an otherwise uniform reference plane.
    Type: Application
    Filed: January 14, 2011
    Publication date: July 19, 2012
    Applicant: Broadcom Corporation
    Inventor: Shengli LIN
  • Patent number: 8212634
    Abstract: An on-chip vertical coplanar waveguide with tunable characteristic impedance, a design structure, and a method of making the same. An on-chip transmission line includes a signal line, an upper ground line spaced apart from and above the signal line, and a lower ground line spaced apart from and below the signal line. The signal line, the upper ground line and the lower ground line are substantially vertically aligned in a dielectric material.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Essam Mina, Guoan Wang
  • Patent number: 8207797
    Abstract: A balun is provided. The balun includes a first substrate, a feed conductor, a second substrate, a first ground layer, a second ground layer and a common ground element. The feed conductor includes a feed portion and an extended feed portion. The feed conductor is disposed on the first substrate. The first ground layer is disposed on the second substrate corresponding to the feed portion. The second ground layer is disposed on the second substrate corresponding to the extended feed portion. A gap is formed between the first and second ground layers. The common ground element is disposed on the second substrate. The common ground element is electrically connected to the first and second ground layers. The common ground element includes a first common ground portion parallel and corresponding to the feed conductor.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: June 26, 2012
    Assignee: National Taiwan University
    Inventors: Han-Yang Wu, Keng-Chih Lin, Yi-Cheng Lin
  • Publication number: 20120154075
    Abstract: A printed circuit board includes a base, a signal layer lying on the base, and a number of pairs of differential signal traces positioned on the signal layer. The base is made of a grid of glass fiber bundles filled with epoxy resin. Each pair of differential signal traces includes a first signal trace and a second signal trace. Each of the first and second signal traces extends in a zigzag pattern. The first signal trace includes a number of wave crests and wave troughs. The wave crests define a reference straight line that connects all the wave crest of the first signal trace. The ratio of the distance from each wave crest to the reference straight line to the orthogonal distance between each wave crest and an adjacent wave trough along the reference straight line is 1:5.
    Type: Application
    Filed: January 28, 2011
    Publication date: June 21, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: YING-TSO LAI, YUNG-CHIEH CHEN
  • Patent number: 8203082
    Abstract: A printed circuit board includes a first layout layer, a second layout layer, a copper foil layer, a first via and a second via. The first layout layer has a first signal line and a second signal line, each of which has a curved first portion. The second layout layer has a third signal line and a fourth signal line, each of which also has a curved first portion. The curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line are coupled to the first via and the second via. In this case, the curved first portions of the first signal line, the second signal line, the third signal line and the fourth signal line cooperatively generate spiral inductance characteristic.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: June 19, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Yu-Chang Pai, Shou-Kuo Hsu, Chien-Hung Liu, Ying-Tso Lai
  • Patent number: 8203395
    Abstract: Various apparatus and methods of addressing crosstalk in a circuit board are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first layer of a circuit board with a first signal trace and forming a second layer of the circuit board with a second signal trace. A first guard trace is formed on the first layer and offset laterally from the first signal trace but at least partially overlapping the second signal trace and a second guard trace is formed on the second layer and offset laterally from the second signal trace but at least partially overlapping the first signal trace.
    Type: Grant
    Filed: August 17, 2009
    Date of Patent: June 19, 2012
    Assignee: ATI Technologies ULC
    Inventors: Fei Guo, Xiao Ling Shi, Mark Frankovitch, Wasim Ullah
  • Publication number: 20120146748
    Abstract: According to one exemplary embodiment, a circuit board for reducing dielectric loss, conductor loss, and insertion loss includes a pair of transmission lines. The pair of transmission lines has sufficient thickness to cause substantial broadside electromagnetic coupling between the pair of transmission lines, where the pair of transmission lines is sufficiently separated from a ground plane of the circuit board so as to cause negligible electromagnetic coupling to the ground plane relative to the substantial broadside electromagnetic coupling. The pair of transmission lines thereby reduce dielectric loss, conductor loss, and insertion loss for signals traversing through the transmission line pair. The pair of transmission lines can be separated from the ground plane by, for example, at least 50.0 mils.
    Type: Application
    Filed: February 21, 2012
    Publication date: June 14, 2012
    Applicant: BROADCOM CORPORATION
    Inventor: Mohammad Tabatabai
  • Patent number: 8198962
    Abstract: A carrier for transmitting a high frequency signal and a carrier layout method thereof are provided. The carrier includes a substrate, conducting wires and reference planes both formed on the substrate. The carrier layout method includes defining impedance and thickness of the carrier according to the high frequency signal and defining layout parameters according to the impedance and the thickness. The layout parameters include a conducting layer formed on the conducting wires, a coplanar waveguide encompasses both the reference planes and the conducting wires as a part thereof, roughness portions formed on the conducting wires, recessed portions formed on the conducting wires, and the substrate being a high loss tangent substrate. The layout is performed according to the layout parameters defined thereabove, so as to increase loss of the high frequency signal in transmission.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: June 12, 2012
    Assignee: Askey Computer Corp.
    Inventors: Chih-Ming Yang, Chien-Hao Huang, Chao-Nan Tsai, Ching-Feng Hsieh, Chin-Ching Chang, Chun-Hsiung Tsai, Pi-Chi Chang, Chih-Wei Huang
  • Patent number: 8198954
    Abstract: An impedance matched circuit board utilizes a series of vias, one signal via that is surrounded by four ground vias in order to effect impedance matching with a coaxial signal transmission line. The vias are plated and extend through the thickness of the circuit board. Both opposing surfaces of the circuit board are provided with a conductive ground layer and each such ground layer has an opening formed there that encompasses one or more of the vias. On the top surface the opening surrounds the signal and ground via and on the bottom surface the opening only partially surrounds the signal via and the opening includes a convex portion formed therein.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: June 12, 2012
    Assignee: Molex Incorporated
    Inventors: Kimiyasu Makino, Shinji Kajiwara
  • Publication number: 20120139668
    Abstract: On-chip high performance slow-wave microstrip line structures, methods of manufacture and design structures for integrated circuits are provided herein. The structure includes at least one ground and a signal layer provided in a different plane than the at least one ground. The signal layer has at least one alternating wide portion and narrow portion with an alternating thickness such that a height of the wide portion is different than a height of the narrow portion with respect to the at least one ground.
    Type: Application
    Filed: December 3, 2010
    Publication date: June 7, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Essam MINA, Guoan Wang, Wayne H. Woods, JR.
  • Publication number: 20120139667
    Abstract: On-chip high performance slow-wave coplanar waveguide structures, method of manufacture and design structures for integrated circuits are provided herein. The structure includes at least one ground and signal layer provided in a same plane as the at least one ground. The signal layer has at least one alternating wide portion and narrow portion with an alternating thickness. The wide portion extends toward the at least one ground.
    Type: Application
    Filed: December 3, 2010
    Publication date: June 7, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Essam MINA, Guoan Wang, Wayne H. Woods, JR.
  • Patent number: 8193880
    Abstract: A semiconductor device for transmitting a radio frequency signal along a signal line includes a signal line that extends along a principal axis. On one side of the signal line is a first dielectric, and on the opposite side of the signal line is a second dielectric. First and second ground lines are proximate to the first and second dielectrics, respectively, and the ground lines are approximately parallel to the signal line. The device has a transverse cross-section that varies along the principal axis.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: June 5, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Ying Cho, Tzu-Jin Yeh, Sally Liu
  • Publication number: 20120133458
    Abstract: A signal line that can be easily bent and significantly reduces loss generated in a high-frequency signal includes a main body including a plurality of insulating sheets made of a flexible material and stacked on each other in a stacking direction. Ground conductors are provided in the main body on the positive z-axis direction side of a signal line. The ground conductors have a slit S formed therein that overlaps the signal line when viewed in plan from the z-axis direction. A ground conductor is provided in the main body on the negative z-axis direction side of the signal line, and is overlapped by the signal line when viewed in plan from the z-axis direction. The ground conductors and the signal line define a strip line structure. A distance between the ground electrodes and the signal line is smaller than a distance between the ground electrode and the signal line.
    Type: Application
    Filed: February 7, 2012
    Publication date: May 31, 2012
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Noboru KATO, Jun SASAKI
  • Patent number: 8183961
    Abstract: The present invention provides a complementary-conducting-strip (CCS) structure for miniaturizing microwave transmission line. The CCS structure comprises a substrate; a transmission part formed on the substrate, the transmission part consisted of M metal layers and at least one connecting arm extending from the metal layers to connect to an adjacent CCS structure, the M metal layers interlaminated M?1 dielectric layer(s) perforating a plurality of first metal vias to connect the M metal layers, wherein M?2 and M is a nature number; and a frame part formed on the substrate, the frame part surrounding the transmission part and consisted of M?1 metal frame(s), the M?1 metal frame(s) interlaminated M?2 dielectric frame(s) perforating a plurality of second metal vias to connect the metal frames.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: May 22, 2012
    Assignees: National Taiwan University, CMSC, Inc.
    Inventors: Ching-Kuang Tzuang, Meng-Ju Chiang, Shian-Shun Wu
  • Publication number: 20120119854
    Abstract: A segmented transmission signal circuit is provided with a parallel bus of data transmission. The bus includes a plurality of sections, each section transmits a corresponding parallel data of multiple bits, and the parallel data corresponding to different sections are in different bit orders.
    Type: Application
    Filed: August 2, 2011
    Publication date: May 17, 2012
    Applicant: RAYDIUM SEMICONDUCTOR CORPORATION
    Inventor: Chih-Chuan Huang
  • Publication number: 20120112857
    Abstract: Disclosed are a microstrip transmission line having a common defected ground structure (DGS) and a wireless circuit apparatus having the same. The microstrip transmission line realizes a common defected ground structure (DGS) and a double microstrip structure, and includes: a first dielectric layer; a first signal line pattern formed on a first surface of the first dielectric layer; a common ground conductive layer formed on a second surface of the first dielectric layer and having a defected ground structure, the first surface facing the second surface; a second dielectric layer having a first surface brought into contact with the common ground conductive layer, and facing the first dielectric layer while interposing the common ground conductive layer between the first dielectric layer and the second dielectric layer; and a second signal line pattern formed on a second surface of the second dielectric layer, the first surface facing the second surface.
    Type: Application
    Filed: October 6, 2011
    Publication date: May 10, 2012
    Inventors: Jongsik LIM, Dal AHN
  • Patent number: 8169273
    Abstract: Disclosed herein is a flat uniform transmission line having an electromagnetic shielding function. The flat uniform transmission line includes a strip transmission line, an insulating layer, and electromagnetic shielding layers. The strip transmission line is formed on a dielectric layer made of functional polymer material, and includes a plurality of strip lines. The plurality of strip lines are configured to be a ground line, or to transmit signals. The insulating layer is formed on the strip transmission line. The electromagnetic shielding layers are respectively formed on the insulating layer and beneath the strip transmission line.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: May 1, 2012
    Assignee: Brocoli Ltd.
    Inventor: Joo-Yeol Lee
  • Patent number: 8169275
    Abstract: A circuit board with jumper structure is disclosed. The circuit board includes a substrate, a ground layer, a first signal transmission line, and a second signal transmission line. The ground layer is formed on a second plane of the substrate. The first signal transmission line is formed on a first plane of the substrate, and coupled to a first signal end and a second signal end. A first signal transmitted on the first signal transmission line in a combination method of a microstrip line to co-planar waveguide transition and a co-planar waveguide to microstrip line transition. The second signal transmission line is formed on the second plane of the substrate, and coupled to a third signal end and a fourth signal end. A second signal is transmitted on the second signal transmission line in the co-planar waveguide transmission.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: May 1, 2012
    Assignee: Wistron NeWeb Corporation
    Inventors: Wen-Tsai Tsai, Wen-Chen Lan