Voltage Surge-responsive Or Lightning Arrester Type Patents (Class 338/21)
  • Patent number: 11939461
    Abstract: A non-ohmic composition including a base elastomer and a plurality of non-ohmic particles, wherein, in a case of comparing volume resistivities ? for the non-ohmic composition within a range of E?Eth for the non-ohmic composition not elongated, the E being an electric field strength applied to the non-ohmic composition, the ? being the volume resistivity of the non-ohmic composition, and the Eth being a threshold electric field strength at a point where an absolute value of a variation in a slope of log ? with respect to log E is maximum, the volume resistivity ? for the non-ohmic composition uniaxially elongated by 50% is 50 times or less the volume resistivity ? for the non-ohmic composition not elongated.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: March 26, 2024
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shuhei Yasuda, Takanori Yamazaki, Shinya Nishikawa
  • Patent number: 11935674
    Abstract: An object is to provide a laminated varistor excellent in clamping voltage ratio. Laminated varistor includes at least a pair of internal electrodes provided in varistor layer containing ZnO as a main component. Internal electrode contains Ag as a main component and is made of a metal containing at least one type selected from Pt and Au. The total weight of Pt and Au with respect to the weight of the metal constituting internal electrode is set between 2% and 30% (inclusive). With such a configuration, diffusion of Ag into varistor layer can be prevented, and a laminated varistor excellent in clamping voltage ratio can be obtained.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Mikinori Amisawa, Masuto Omiya, Kouji Hirate, Yukihito Yamashita, Touichi Makita
  • Patent number: 11901100
    Abstract: In an embodiment a method for manufacturing a multilayer varistor includes providing a first ceramic powder for producing a first ceramic material and at least one second ceramic powder for producing a second ceramic material, wherein the ceramic powders differ from each other in concentration of monovalent elements X+ by 50 ppm??c(X+)?5000 ppm, wherein X+=(Li+, Na+, K+ or Ag+), and wherein ?c denotes a maximum concentration difference occurring between an active region and a near-surface region of the multilayer varistor, slicking of the ceramic powders and forming of green films, partially printing of a part of the green films with a metal paste to form inner electrodes, stacking printed and unprinted green films, laminating, decarbonizing and sintering the green films and applying outer electrodes.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: February 13, 2024
    Assignee: TDK Electronics AG
    Inventors: Hermann Grünbichler, Jaromir Kotzurek, Franz Rinner
  • Patent number: 11823819
    Abstract: A resistor includes a first insulator, a resistive body, a second insulator, a pair of electrodes, and a covering body. The first insulator has a first obverse surface facing in a thickness direction thereof. The resistive body is provided on the first obverse surface. The second insulator covers the resistive body. The pair of electrodes are electrically connected to the resistive body at both sides in a first direction perpendicular to the thickness direction. The covering body is formed on at least one of the first insulator and the second insulator. The covering body has electrical conductivity. The first layer is in contact with at least one of the first insulator and the second insulator.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: November 21, 2023
    Assignee: ROHM CO., LTD.
    Inventor: Kosaku Tanaka
  • Patent number: 11811172
    Abstract: An electrical connector provided with a varistor, and to a protection device for incorporation into an electrical connector and having a varistor comprising at least two pins including a first pin which is a live (502) or neutral (504) pin and a second pin which is an earth pin (506), the first and second pins (502, 504, 506) extending through respective apertures (512) in a varistor plate (514) which has first and second faces, wherein a first conductive layer on the first face of the varistor plate (514) connects electrically to the first pin (502, 504) and a second conductive region on the second face of the varistor plate connects electrically to the second pin (506), so that in response to an excessive voltage across the first (502, 504) and second (506) pins the varistor plate will conduct electricity between the first (502, 504) and second (506) pins. The arrangement can easily be adopted in connectors conforming to existing standards, such as existing mains electrical plugs (500).
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: November 7, 2023
    Assignee: MPE IP LIMITED
    Inventor: Jan Nalborczyk
  • Patent number: 11764567
    Abstract: A high-voltage protection module for a metrology device includes a metal-oxide varistor (MOV) coupled across a mains power line, a resistor electrically coupled to the MOV in series with the MOV, and a fuse electrically coupled to the MOV and the resistor in series, the resistor being located between the fuse and the MOV. The fuse opens upon an overvoltage event disengaging alternating current (AC) power from the mains power line to the metrology device.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: September 19, 2023
    Assignee: Itron, Inc.
    Inventors: Steven Alexander Grey, Dipankar L. Tewari, Jaihind Reddy Maddi
  • Patent number: 11721483
    Abstract: A multilayer ceramic capacitor includes: a multilayer structure having a parallelepiped shape in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the multilayer structure, a main component of the plurality of dielectric layers being a ceramic; and a first cover layer and a second cover layer that sandwich the multilayer structure in a stacking direction of the multilayer structure, a main component of the first cover layer and the second cover layer being the same as that of the dielectric layers, wherein the first cover layer includes a first region spaced from the multilayer structure by at least 50 ?m, is thicker than the second cover layer, and has a thickness more than 50 ?m.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: August 8, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Hideya Teraoka, Koichiro Morita
  • Patent number: 11721457
    Abstract: Systems for disconnecting a surge arrester. One embodiment provides a surge arrester comprising a housing, a connecting interface configured to connect to an electrical power grid, and a disconnector device coupled to the connecting interface. A metal oxide varistor stack is coupled to the disconnector device, and a ground side connection is coupled to the metal oxide varistor stack, the ground side connection configured to connect to a system ground. The disconnector device is configured to disconnect the connecting interface from the system ground based on a predetermined disconnection condition.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: August 8, 2023
    Assignee: Hubbell Incorporated
    Inventors: Bastiaan Hubertus van Besouw, David Charles Hughes
  • Patent number: 11682504
    Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: June 20, 2023
    Assignee: TDK CORPORATION
    Inventors: Satoshi Goto, Naoyoshi Yoshida, Takeshi Yanata, Takeshi Oyanagi, Daiki Suzuki, Shin Kagaya, Masayuki Uchida, Yusuke Imai
  • Patent number: 11676762
    Abstract: A multilayer capacitor includes a body including a stack structure in which dielectric layers are stacked and internal electrodes are stacked with one of the dielectric layers interposed therebetween and first and second external electrodes disposed on the body and connected to the first and second internal electrodes, respectively. The first external electrode includes a first electrode layer covering a first surface of the body to which the first internal electrode is exposed, a glass layer covering the first electrode layer and a second surface of the body connected to the first surface, and a second electrode layer covering the glass layer, and the glass layer includes an inner region having a discontinuous region and an outer region covering the second surface of the body and having an end exposed from the second electrode layer.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jang Yeol Lee, Hye Min Bang, Bum Soo Kim
  • Patent number: 11636960
    Abstract: An item of electrical equipment includes a core clad with a glass fiber material. The glass fiber material is preimpregnated with a resin. A layer of a substance is applied to the glass fiber material. The substance is formed at least partly of high-temperature vulcanizing silicone rubber. A corresponding production method is also provided.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: April 25, 2023
    Assignee: Siemens Energy Global GmbH & Co. KG
    Inventors: Bernd Kruska, Henrik Roggow
  • Patent number: 11615899
    Abstract: The present invention relates to a polymer voltage-dependent resistor (PVDR) in various physical forms and methods for manufacturing the varistor. The body of the PVDR is composed of a polymer matrix having a filler composed of doped zinc oxide particles, other semi conductive particles or metal particles uniformly distributed therein. Conductive electrodes may be affixed to the polymer matrix and electrical leads attached to the electrodes.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: March 28, 2023
    Assignee: DONGGUAN LITTELFUSE ELECTRONICS COMPANY LIMITED
    Inventors: Chun-Kwan Tsang, Jianhua Chen, Yi-hua Deng
  • Patent number: 11600411
    Abstract: A terminal connecting structure is provided with each of the electrodes provided on the element forming the electronic component; and the terminals respectively having the connecting portions arranged along the electrodes respectively. In addition, the terminal connecting structure is provided with clearance forming portions configured to respectively form the respective clearances between the electrodes and the connecting portions respectively; and the connecting materials respectively provided in the clearances, the connecting material being configured to electrically connect the connecting portions and the electrodes respectively.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: March 7, 2023
    Assignee: KOA Corporation
    Inventor: Isao Tonouchi
  • Patent number: 11594351
    Abstract: A multilayer chip varistor includes an element body, first and second external electrodes, and first and second electrical conductor groups. The first electrical conductor group includes a first internal electrode connected to the first external electrode, and a first intermediate electrical conductor opposed to the first internal electrode. The second electrical conductor group includes a second internal electrode including a first electrically conductive material and connected to the second external electrode, and a second intermediate electrical conductor opposed to the second internal electrode. At least one of the first and second intermediate electrical conductors includes the second electrically conductive material. The element body includes a low electrical resistance region between the first and second internal electrodes. The second electrically conductive material is diffused in the low electrical resistance region.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: February 28, 2023
    Assignee: TDK CORPORATION
    Inventors: Shin Kagaya, Masayuki Uchida, Naoyoshi Yoshida, Takeshi Yanata, Satoshi Goto, Takeshi Oyanagi, Yusuke Imai, Daiki Suzuki, Kaname Ueda
  • Patent number: 11557410
    Abstract: In an embodiment a ceramic material includes ZnO as main constituent, Y as a first additive, second additives including at least one compound containing a metal element, wherein the metal element is selected from the group consisting of Bi, Cr, Co, Mn, Ni and Sb, Si4+ as a first dopant and second dopants having at least one compound containing a metal cation from Al3+, B3+, or Ba2+, wherein a corresponds to a molar proportion of Bi calculated as Bi2O3, b corresponds to a molar proportion of Y calculated as Y2O3, c corresponds to a molar proportion of Al calculated as Al2O3, d corresponds to a molar proportion of Ba calculated as BaO, e corresponds to a molar proportion of B calculated as B2O3, f corresponds to a molar proportion of Si calculated as SiO2, g corresponds to a molar proportion of Ni calculated as NiO, h corresponds to a molar proportion of Co calculated as Co3O4, i corresponds to a molar proportion of Cr calculated as Cr2O3, j corresponds to a molar proportion of Sb calculated as Sb2O3, and k cor
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: January 17, 2023
    Assignee: TDK ELECTRONICS AG
    Inventors: Hermann Gruenbichler, Andreas Buergermeister, Michael Hofstaetter, Thomas Feichtinger
  • Patent number: 11552431
    Abstract: Disclosed are an input/output terminal for connecting an electronic device to an external device and an electronic device comprising the input/output terminal, the input/output terminal comprising: a signal pin allowing signals to be transmitted/received between the electronic device and the external device; a ground pin connected to a ground part of the electronic device; and a resistant material disposed at the end part of the signal pin or the ground pin. Other various embodiments are possible.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: January 10, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jinseock Lee, Jaesub Youn
  • Patent number: 11545284
    Abstract: Provided is a varistor assembly capable of achieving good surge breakdown voltage while suppressing capacitance. The varistor assembly is obtained by connecting a plurality of varistor elements in parallel. Each varistor element includes: a sintered body obtained by sintering a laminate in which varistor layers and internal electrodes are alternately laminated; and a pair of external electrodes provided in a state where the internal electrodes are alternately connected on at least both end faces of this sintered body. Varistor element includes at least a plurality of first group varistor elements in which a value obtained by dividing a surface area of the sintered body by a volume of the sintered body is 1.9 mm?1 or more.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: January 3, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yoshiko Higashi, Eiichi Koga, Masayuki Takagishi
  • Patent number: 11532415
    Abstract: An electronic component includes: an insulator part (10) of rectangular solid shape; a coil element (32) provided inside the insulator part (10); bottom electrodes (40) provided on a bottom face (14) of the insulator part (10) and electrically connected to the coil element (32); a plating layer (62) provided in a manner overlapping each bottom electrode (40) so that its end (64) on the bottom face (14) is away from the end (42) of the bottom electrode (40); a plating layer (60) which is arranged between the bottom electrode (40) and the plating layer (62) and overlaps the bottom electrode (40), and which is constituted by a metal having lower solder wettability and higher melting point than those of the plating layer (62); and an insulation layer (70) provided on the bottom face (14) in a manner covering the end (42) of the bottom electrode (40).
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: December 20, 2022
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Yoshikazu Maruyama, Noriyuki Mabuchi, Ichiro Yokoyama, Masataka Kohara, Keiichi Nozawa, Masakazu Okazaki, Chikako Yoshida, Tomoyuki Oyoshi, Ikuo Kakiuchi, Masami Seto
  • Patent number: 11521767
    Abstract: An ignition resistor includes an ignition structure, an insulation substrate, a carrying base, and first and second conductor layers. The ignition structure includes an ignition portion, and first and second electrode portions respectively connected to two opposite ends of the ignition portion. The insulation substrate is disposed on the ignition structure and includes a filling portion including a hole exposing the ignition portion and configured to accommodate an ignition material, and a sidewall surrounding the hole. The carrying base is disposed under the ignition structure. The carrying base includes first and second electrodes respectively corresponding to the first and second electrode portions. The first and second electrodes and the ignition structure are located on two opposite sides of the carrying base. The first and second conductive layers electrically connect the first electrode portion and the first electrode, and the second electrode portion and the second electrode respectively.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: December 6, 2022
    Assignee: YAGEO CORPORATION
    Inventors: Shen-Li Hsiao, Fu-Sheng Huang
  • Patent number: 11501900
    Abstract: Provided according to embodiments of the invention are varistor ceramic formulations that include zinc oxide (ZnO). In particular, varistor ceramic formulations of the invention may include dopants including an alkali metal compound, an alkaline earth compound, an oxide of boron, an oxide of aluminum, or a combination thereof. Varistor ceramic formulations may also include other metal oxides. Also provided according to embodiments of the invention are varistor ceramic materials formed by sintering a varistor ceramic formulation according to an embodiment of the invention. Further provided are varistors formed from such ceramic materials and methods of making such materials.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: November 15, 2022
    Assignee: RIPD Intellectual Assets Ltd.
    Inventors: Mirjam Cergolj, Sa{hacek over (s)}a Rustja Kosec, Sodec Jo{hacek over (z)}ef, Andrej Pirih
  • Patent number: 11404209
    Abstract: An electrical device package structure and manufacturing method thereof is disclosed. The manufacturing method comprises: providing an electrical device body having at least two electrodes, wherein an outer surface of the electrical device body is partially covered by the electrodes, and outer surfaces of the electrodes are covered by a plastic material; forming a first protective layer including phosphate salt at least on the exposed outer surface of the electrical device body; and forming a second protective layer including glass at least on an exposed outer surface of the first protective layer. The present invention can prevent the electrical device body and/or the electrodes from being damaged on their manufacturing process, and avoid a forming high impedance layer on an electrode.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: August 2, 2022
    Assignee: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Len, Hong Zong Xu, Zhi Xian Xu, Hsing Tsai Huang, Jie-An Zhu
  • Patent number: 11398704
    Abstract: A varistor (50) comprising: a feed-through conductor (52) and a varistor disc (72) interposed between, and electrically connected to, conductor layers disposed on opposite surfaces of the varistor disc (72), the conductor layers being electrically isolated from one another; wherein the varistor disc (72) comprises a through aperture (60) through which the feed-through conductor extends; a first one of the conductor layers is electrically connected to the feed-through conductor; a second one of the conductor layers is, in normal use, permanently electrically connected to ground the varistor (50). This configuration enables one side of the disc (72) to be connected to the feed-through terminal, and the other side of the disc (72) to be connected to a ground plane, such as an earthed bulkhead of a wall or cabinet, via a metal plate forming part of the varistor (50) housing.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: July 26, 2022
    Assignee: MPE IP LIMITED
    Inventor: Jan Nalborczyk
  • Patent number: 11393636
    Abstract: Provided is an improved overvoltage protection element. The overvoltage protection devices comprises at least one ESD protection couple comprising discharge electrodes in a plane, a gap insulator between the discharge electrodes, an overvoltage protection element parallel to the planar discharge electrodes wherein the overvoltage protection element comprises a conductor and an secondary material. The overvoltage protection element also comprises a primary insulator layer between the discharge electrodes and overvoltage protection element.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: July 19, 2022
    Assignee: KEMET Electronics Corporation
    Inventors: Iain D. Kinnon, John Bultitude, Lonnie G. Jones
  • Patent number: 11302464
    Abstract: A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: April 12, 2022
    Assignee: TDK CORPORATION
    Inventors: Satoshi Goto, Naoyoshi Yoshida, Takeshi Yanata, Takeshi Oyanagi, Daiki Suzuki, Shin Kagaya, Masayuki Uchida, Yusuke Imai
  • Patent number: 11276515
    Abstract: A varistor includes an effective layer having first and second surfaces opposite to each other, a first ineffective layer stacked on the first surface of the effective layer, a second ineffective layer stacked on the second surface of the effective layer, and an external electrode. The effective layer includes a ceramic layer having a polycrystalline structure including crystal particles exhibiting voltage nonlinear characteristics, and internal electrodes stacked alternately on the ceramic layer. The thickness of the second ineffective layer is equal to or more than 1.1 times a thickness of the first ineffective layer and equal to or smaller than 6 times the thickness of the first ineffective layer. This varistor has a small size and excellent surge resistance.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: March 15, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yoshiko Higashi, Eiichi Koga
  • Patent number: 11195643
    Abstract: In an embodiment a multilayer varistor includes a ceramic body made from a varistor material, wherein the ceramic body includes a plurality of inner electrodes, first regions and second regions, wherein the varistor material in the first regions has a first average grain size DA, wherein the varistor material in the second regions has a second average grain size DB, and wherein DA<DB.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: December 7, 2021
    Assignee: TDK ELECTRONICS AG
    Inventors: Thomas Feichtinger, Michael Hofstätter, Hermann Grünbichler
  • Patent number: 11189404
    Abstract: An NTC ceramic part, an electronic component for inrush current limiting, and a method for manufacturing an electronic component are disclosed. In an embodiment, an NTC ceramic part for use in an electronic component for inrush current limiting is disclosed, wherein the NTC ceramic part has an electrical resistance in the m? range at a temperature of 25° C. and/or at room temperature.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: November 30, 2021
    Assignee: EPCOS AG
    Inventors: Hermann Grünbichler, Manfred Schweinzger, Franz Rinner
  • Patent number: 11120929
    Abstract: A surge arrester includes a tubular housing and an end fitting which is connected to one end of the housing and on which a column having at least one electrical resistor is disposed. A support abuts the inner surface of the tubular housing in the region of the end fitting. The support has a recess in the longitudinal direction of the surge arrester, into which a pressure device is inserted. A method for installing a surge arrester is also provided.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: September 14, 2021
    Assignee: Siemens Aktiengesellschaft
    Inventor: Erhard Pippert
  • Patent number: 11037730
    Abstract: An electronic component includes a body; first and second external electrodes including first and second connection portions and first and second band portions, respectively; and first and second metal frames connected to the first and second external electrodes, respectively, wherein the first and second metal frames include first and second support portions bonded to the first and second connection portions, and first and second mounting portions extended in the first direction from lower ends of the first and second support portions and spaced apart from the body and the first and second external electrodes, and further include first and second insulating layers formed on external surfaces of the first and second support portions.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: June 15, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ho Yoon Kim, Woo Chul Shin, Sang Soo Park
  • Patent number: 10910135
    Abstract: A surge arrester and a method for manufacturing the surge arrester are disclosed. The surge arrester includes a preassembled active part extending in a longitudinal direction, and a separately produced flexible housing defining a bore in the longitudinal direction and having an opening at an end surface of the flexible housing. The flexible housing is arranged surrounding the active part via the bore and in contact with the active part. The contact causes a deformation of the flexible housing in a circumferential direction, and the deformation generates a pressure applied on the active part along a radial direction.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: February 2, 2021
    Assignee: ABB POWER GRIDS SWITZERLAND AG
    Inventors: Chun Li, Jian He, Deli Gao, Maoshan Niu, Ektor Sotiropoulos, Felix Greuter, Jiansheng Chen, Jens Rocks
  • Patent number: 10839127
    Abstract: A temperature calculation method for a substrate, the temperature calculation method includes: calculating, by a computer performing a circuit simulation based on a resistance equivalent to a component that joins two substrates included in a target model of an analysis, a value of a current that flows through the component or voltage values in respective end portions of the component; setting, based on model information for expressing the target model, the current value or the voltage values in a first surface and a second surface that are included in surfaces of an outer shape of the component and that are in contact with the respective substrates; and calculating a first current density distribution of the component by performing a first electrical analysis according to the setting.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: November 17, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Tetsuyuki Kubota, Akira Ueda, Hideharu Matsushita, akihiro otsuka, Yasuhiro Ite, Takamasa Shinde, Kazuhisa Inagaki, Akira Sakai
  • Patent number: 10790075
    Abstract: The present invention is directed to a varistor comprising a dielectric material comprising a sintered ceramic composed of zinc oxide grains and a grain boundary layer between the zinc oxide grains. The grain boundary layer contains a positive temperature coefficient thermistor material in an amount of less than 10 mol % based on the grain boundary layer.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: September 29, 2020
    Assignee: AVX Corporation
    Inventors: Palaniappan Ravindranathan, Marianne Berolini
  • Patent number: 10755838
    Abstract: A tensioning device is provided for a surge arrester having an end fitting and tensioner. The tensioning device has an axial clearance for receiving a tensioner and a region being conically tapered in axial direction to be introduced into a clearance of the end fitting being shaped for a substantially exact fit. The conically tapered region has delimitation walls defining the axial clearance for the tensioner being movable toward a clearance interior. An antifriction layer is applied to the surface of the conically tapered region. A production method for a surge arrester and a corresponding surge arrester are also provided.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: August 25, 2020
    Assignee: Siemens Aktiengesellschaft
    Inventors: Bernd Kruska, Dirk Springborn, Kai Steinfeld
  • Patent number: 10706994
    Abstract: A varistor includes a varistor body, a first terminal disposed on one side of the varistor body, a second terminal disposed on the other side of the varistor body, a first electrode disposed on an upper portion of the varistor body, electrically connected to the first terminal, and extending towards the other side of the varistor body, and a second electrode disposed on a lower portion of the varistor body, electrically connected to the second terminal, and extending towards the one side of the varistor body.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: July 7, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ic Seob Kim, Jung Il Kim, Yong Sung Kim, Eun Ju Oh, Su Rim Bae, Hae In Kim
  • Patent number: 10685767
    Abstract: A surge protective device (SPD) module includes a varistor and an electrical conductor. The varistor includes a hole defined therein and extending through the varistor. The electrical conductor extends through the hole in the varistor.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: June 16, 2020
    Assignee: RAYCAP IP DEVELOPMENT LTD
    Inventors: Sebastjan Kamen{hacek over (s)}ek, Tadej Knez, Milenko Vukotic, Igor Juri{hacek over (c)}ev, Thomas Tsovilis
  • Patent number: 10672581
    Abstract: The invention relates to a type-II overvoltage protection device having a varistor and a protective element, wherein the protective element has a first contact for connecting to a first potential of a supply network and a second contact that is connected to a first contact of the varistor, wherein the varistor further comprises a second contact for connecting to a second potential of a supply network, wherein the protective element has a fuse element that connects the first contact and the second contact of the protective element, wherein the protective element further comprises a third contact that is connected to the second contact of the varistor and is arranged so as to be near to but electrically insulated from the fuse element, wherein the fuse element has a constriction in the proximity of the neighboring contact, with the constriction being embodied such that the fuse element has an electrically conductive fluxing agent in the proximity of the constriction, with the fluxing agent having a lower fusion
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: June 2, 2020
    Assignee: PHOENIX CONTACT GMBH & CO. KG
    Inventor: Rainer Durth
  • Patent number: 10607754
    Abstract: The invention relates to an overvoltage protection device with varistors, wherein a first varistor and a second varistor are connected in series, wherein the first varistor has a thermal disconnector, wherein the first varistor has a lower operating voltage than the second varistor, and wherein the first varistor has a lower energy absorption capacity than the second varistor, with the first varistor heating up more in the event of an overload and thereby causing the thermal disconnector to disconnect.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: March 31, 2020
    Assignee: PHOENIX CONTACT GMBH & CO KG
    Inventors: Rainer Durth, Jan-Erik Schmutz, Maik Dittert
  • Patent number: 10529472
    Abstract: A low aspect ratio varistor is disclosed. The varistor may have a rectangular configuration defining first and second opposing side surfaces offset in a widthwise direction and first and second opposing end surfaces offset in a lengthwise direction. The varistor may include a first electrode layer including a first electrode having an electrode length in the lengthwise direction and an electrode width in the widthwise direction. The varistor may also include a second electrode layer including a second electrode having an electrode length in the lengthwise direction and an electrode width in the widthwise direction. The varistor may also include first and second terminals adjacent and connected with the first and second opposing end surfaces, respectively. At least one of the first or second electrodes may have an electrode aspect ratio less than about 1.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: January 7, 2020
    Assignee: AVX Corporation
    Inventors: Michael Kirk, Marianne Berolini, Palaniappan Ravindranathan
  • Patent number: 10490535
    Abstract: A light-emitting apparatus package of the present invention includes (i) an electrically insulated ceramic substrate, (ii) a first concave section formed in the direction of thickness of the ceramic substrate so as to form a light exit aperture in a surface of the ceramic substrate, (iii) a second concave section formed within the first concave section in the further direction of thickness of the ceramic substrate so that one or more light-emitting devices are provided therein, (iv) a wiring pattern for supplying electricity, which is provided in the first concave section, and (v) a metalized layer having light-reflectivity, which is (a) provided between the light-emitting device and the surface of the second concave section of the substrate, and (b) electrically insulated from the wiring pattern.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: November 26, 2019
    Assignee: Xiamen San'an Optoelectronics Co., Ltd.
    Inventor: Tsukasa Inoguchi
  • Patent number: 10431365
    Abstract: An electronic component includes a main body made from a metal magnetic powder and an insulating resin, a coating film covering the surface of the main body, a conductor disposed inside the main body, inorganic particles adhering to the surface of the coating film, and outer electrodes which are electrically connected to the conductor and which cover portions of the surface of the coating film while inorganic particles adhere to the portions, wherein the coating film contains a resin and metal cations.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: October 1, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hironobu Kubota, Mitsunori Inoue
  • Patent number: 10405415
    Abstract: An electro-static discharge protection device includes a ceramic base material, first and second outer electrodes on the outer surface of the ceramic base material, a hollow portion inside the ceramic base material, a first discharge electrode including a first end portion electrically connected to the first outer electrode and a second end portion in the hollow portion, a second discharge electrode including a first end portion electrically connected to the second outer electrode and a second end portion spaced apart from the first discharge electrode in the hollow portion, and a discharge supporting electrode including silicon carbide and between the second end portion of the first discharge electrode and the second end portion of the second discharge electrode. The elemental alkali metal in the ceramic base material is about 3 percent by weight or less.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: September 3, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Mayu Suzuki, Jun Adachi, Takayuki Tsukizawa
  • Patent number: 10304598
    Abstract: A surge arrester includes an internal core assembly including a stack of a plurality of varistor elements, a first end core support assembly at a first end surface of the stack, a second end core support assembly at a second end surface of the stack, a plurality of rods disposed around a side surface of the stack, a first crimp fitting at a first end of each of the plurality of rods, and a retention feature on each of the first crimp fittings with each retention feature engaging the first end core support assembly to apply compression to the stack.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: May 28, 2019
    Assignee: TE Connectivity Corporation
    Inventors: Kiran Kumar Pusthay, Senthil A. Kumar, Eduardo Fava Gastaldi
  • Patent number: 10204722
    Abstract: An electronic component and a method for producing an electrical component are disclosed. In an embodiment, the electronic component includes a functional body having a first surface and a second surface, wherein the second surface faces away from the first surface, and a contact electrically linked to the first surface, the contact having an edge region and a central region, wherein the functional body has a first electrical resistance between the first surface and the second surface in a first functional body portion, which overlaps the edge region of the contact as viewed in a plan view of the electronic component, that is greater than a second electrical resistance between the first surface and the second surface in a second functional body portion, which overlaps the central region of the contact as viewed in a plan view of the electronic component.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: February 12, 2019
    Assignee: EPCOS AG
    Inventors: Franz Rinner, Yongli Wang
  • Patent number: 10181718
    Abstract: Provided herein are improved electrical circuit protection devices for protection against electrostatic discharge (ESD), the devices including a first support substrate, a first electrode and a second electrode formed on the first support substrate, wherein the first electrode and the second electrode are formed from a conductive material. The devices further include a first bonding pad disposed on the first and second electrode, the first bonding pad having a first cavity formed therein; a second support substrate disposed on the first bonding pad, the second support substrate having a second cavity formed therein, and a voltage variable material disposed within the first cavity and the second cavity and electrically connected to the first electrode and the second electrode. The devices further include a second bonding pad disposed on the second support substrate, and a third support substrate disposed on the second bonding pad.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: January 15, 2019
    Assignee: Littelfuse, Inc.
    Inventors: Conrado De Leon, Albert Enriquez, Editha Liquido, Crispin Zulueta
  • Patent number: 10170224
    Abstract: A structure and method for fabricating a laterally configured thin film varistor surge protection device using low temperature sputtering techniques which do not damage IC device components contiguous to the varistor being fabricated. The lateral thin film varistor may include a continuous layer of alternating regions of a first metal oxide layer and a second metal oxide layer formed between two laterally spaced electrodes using a low temperature sputtering process followed by a low temperature annealing process.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Richard S. Graf, Sudeep Mandal
  • Patent number: 10158222
    Abstract: A surge protective device (SPD) includes a jack and a plug detachably attached by insertion to the jack. Inside the plug, a protection circuit which protects equipment to be protected against intruding lightning surge, a degradation detecting unit which detects a degradation state of the protection circuit, a display unit which displays the detection result, or the like, are provided. When a plurality of SPDs are installed together, a juncture plug which detachably connects between juncture terminals within the adjacent SPDs is provided. The detection result of the degradation detecting unit within the plug is output to an outside through a third connection terminal within the plug, a first connection terminal and the juncture terminal within the jack and the juncture plug.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: December 18, 2018
    Assignee: SANKOSHA CORPORATION
    Inventors: Kouji Idota, Shin Nakayama
  • Patent number: 10148079
    Abstract: A circuit protection device includes a metal oxide varistor (MOV), a spring terminal and a thermal disconnect coupling the spring terminal to the MOV. A gas discharge tube (GDT) is coupled to the MOV. The spring terminal is biased such that upon occurrence of an overvoltage condition, heat generated by the MOV melts the thermal disconnect and allows the spring terminal to be displaced away from the MOV, thereby creating an opening circuit.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: December 4, 2018
    Assignee: Dongguan Littelfuse Electronics Co., Ltd.
    Inventors: Wen Yang, Hailang Tang, Yanjing Xiao
  • Patent number: 10128028
    Abstract: A varistor device includes a main body, a conductive area, a specific-melting-point metallic pin, and an elastic unit. The main body has a first surface, and the conductive area is located at the first surface. The specific-melting-point metallic pin has a first section and a second section. The first and the second sections are one-piece formed. The first section is fixedly disposed on the conductive area. The second section has a specific melting point such that the second section melts when a current flows between the first surface and the second section so as to expose the second section to a temperature greater than the specific melting point. The elastic unit has an end connected to the second section, and the elastic unit provides an elastic force to the second section to break the second section so as to cut off the current when the second section melts.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: November 13, 2018
    Assignee: POWERTECH INDUSTRIAL CO., LTD.
    Inventor: Jung-Hui Hsu
  • Patent number: 10109993
    Abstract: A circuit protection device includes a metal oxide varistor (MOV), a spring terminal and a thermal disconnect coupling the spring terminal to the MOV. A gas discharge tube (GDT) is coupled to the MOV. The spring terminal is biased such that upon occurrence of an overvoltage condition, heat generated by the MOV melts the thermal disconnect and allows the spring terminal to be displaced away from the MOV, thereby creating an opening circuit.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: October 23, 2018
    Assignee: Dongguan Littelfuse Electronics Co., Ltd.
    Inventors: Wen Yang, Hailang Tang, Yanjing Xiao
  • Patent number: 10109501
    Abstract: A semiconductor device having a voltage resistant structure in a first aspect of the present invention is provided, comprising a semiconductor substrate, a semiconductor layer on the semiconductor substrate, a front surface electrode above the semiconductor layer, a rear surface electrode below the semiconductor substrate, an extension section provided to a side surface of the semiconductor substrate, and a resistance section electrically connected to the front surface electrode and the rear surface electrode. The extension section may have a lower permittivity than the semiconductor substrate. The resistance section may be provided to at least one of the upper surface and the side surface of the extension section.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: October 23, 2018
    Assignees: FUJI ELECTRIC CO., LTD., Octec, Inc.
    Inventors: Koh Yoshikawa, Haruo Nakazawa, Kenichi Iguchi, Yasukazu Seki, Katsuya Okumura