Abstract: A surface mounting chip network component in which a network having three or more odd number of terminals are formed on the surface of an insulating substrate and Tomb Stone Phenomenon is suppressed. Even number of network circuits are formed on the surface of the insulating substrate (2) and the same number of terminals (1) are arranged, respectively, on the opposite sides of the insulating substrate (2). Alternatively, even number of network circuits are formed on the surface of the insulating substrate (2) and the terminals (1) are arranged on the side edges of the insulating substrate (2) point-symmetrically with respect to the center of the surface of the insulating substrate (2).

Abstract: There is provided a method and circuit for trimming a functional resistor on a thermally isolated micro-platform such that a second functional resistor on the same micro-platform remains substantially untrimmed; a method and circuit for providing and trimming a circuit such that at least two circuit elements of the circuit are subjected to a same operating environment and the operating environment is compensated for by distributing heat generated during operation of the circuit among the two circuit elements; a method and circuit for trimming a functional resistor on a thermally-isolated micro-platform such that a constant temperature distribution is obtained across the functional resistor; and a method and circuit for calculating a temperature coefficient of resistance of a functional resistor.

Abstract: A thermally stabilized device is described. Single or multiple input ports are accommodated and single and multiple power ports are described. The variation of resistance of a resistor subject to varying power dissipations is minimized by injecting complementary power dissipation and thermally linking it to the resistor. In this manner the temperature of a resistor may be maintained constant even though it dissipates varying amounts of power.

Abstract: A precision AC input voltage divider on a substrate is printed as a serpentine pattern for a thin line of resistive material. Bothersome original “bad” stray capacitances to a ground, particularly those to or from the middle of the serpentine, are effectively removed by coupling to their ungrounded ends additional “good” stray capacitances that are themselves driven by the input voltage. The additional good stray capacitances are chosen to supply substantially the exact current needed by the original bad strays, so that the original resistive divider never “sees” the strays at all, and requires in addition only minimal conventional compensation by external parts. The additional good strays are obtained by a metallic conductor that is electrically connected to the input terminal, and runs adjacent to the serpentine resistance for part or all of its length.

Abstract: An impedance network configuration in the form of a snake-like or ladder structure is provided. The ladder configuration enables the provision of tabs extending outwardly from the normal conducting path, the tabs providing a location for the provision of contact layers. Using such a configuration the contribution of the contact impedance can be minimized and also programming of the configuration may be effected.

Abstract: A composite circuit protection device includes a laminar insulating member and first and second laminar circuit protection devices.

Abstract: Circuit panels are provided with resistors in vias extending between the top and bottom surfaces of the panels. The resistors may be formed by depositing a composite in each via, as by depositing a dispersion of a conductive material and a dielectric or by depositing one or more thin layers of a conductor. The resistors may be disposed at interior locations buried within a multilayer circuit board formed by laminating one or more panels having such resistors with one or more additional elements.

Abstract: An arrangement of several resistors jointly positioned in one and the same well of a semiconductor device, as well as to a semiconductor device including at least one such arrangement of resistors, wherein the resistors, when viewed in a longitudinal direction of the resistors, are displaced in relation to one another.

Abstract: A resistor layout and method of forming the resistor are described which achieves improved resistor characteristics, such as resistor stability and voltage coefficient of resistance. A resistor is formed from a conducting material such as doped silicon or polysilicon. The resistor has a rectangular first resistor element, a second resistor element, a third resistor element, a fourth resistor element, and a fifth resistor element. A layer of protective dielectric is then formed over the first, second, and third resistor elements leaving the fourth and fifth resistor elements exposed. The conducting material in the exposed fourth and fifth resistor elements is then changed to a silicide, such as titanium silicide or cobalt silicide, using a silicidation process. The higher conductivity silicide forms low resistance contacts between the second and fourth resistor elements and between the third and fifth resistor elements.

Abstract: A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are located on the first surface between the vias. Conductors are located over the vias and are electrically connected to ends of the resistors. A cover coat covers the conductors and resistors. A ground plane is located on the second surface. An insulating layer is located over the ground plane. Ball pads are located over the vias. The ball pads are electrically connected to the vias. Solder spheres are attached to the ball pads.

Abstract: A resistor string that may have two resistor matrices laid out back-to-back with selected or all nominally equipotential nodes of the two matrices being interconnected. In certain applications, the matrix may have switch connections at each node, with the second matrix being an inactive matrix that may have the same number or different number, typically fewer resistors than the first matrix. In another embodiment, separate matrices may be used, and the inactive matrix may be smaller and have fewer resistors of a lower value to minimize the effect of gradients across the substrate. Preferred matrices and node connection switch configurations, as well as various embodiments of these and other features of the invention are disclosed.

Abstract: A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are located on the first surface between the vias. Conductors are located over the vias and are electrically connected to ends of the resistors. A cover coat covers the conductors and resistors. A ground plane is located on the second surface. An insulating layer is located over the ground plane. Ball pads are located over the vias. The ball pads are electrically connected to the vias. Solder spheres are attached to the ball pads.

Abstract: A chip resistor comprising a substrate having opposite parallel symmetrical first and second surfaces, a central longitudinal plane of symmetry, separate and spaced first and second resistive layers on the first and second surfaces. The resistive layers are electrically connected in parallel to each other and the first and second surfaces of the substrate are symmetrically located with respect to and equidistant from a central longitudinal plane. Thus, when electrical current passes through the resistive layers, a temperature distribution within the substrate will be substantially symmetrical about the central longitudinal plane of the substrate for eliminating thermal bending thereof. The splitting of the surge current between two resistive layers results in the lower temperature in each resistive layer when compared with the temperature in the single resistive layer of the prior art chip resistor loaded by the same current.

Abstract: A method of making resistors includes providing a sacrificial layer. Conductive material is then formed over a region of the sacrificial layer. Resistive material is then deposited over the first surface of the sacrificial layer such that the resistive material covers the sacrificial layer and the conductive material. A portion of the sacrificial layer is then removed to expose the conductive material. A method of making resistors includes the steps of providing a sacrificial layer, removing at least a portion of the sacrificial layer from regions of the sacrificial layer so as to create a plurality of cavities within the sacrificial layer, plating said cavities with a conductive material, disposing resistive material over the first surface of the sacrificial layer such that resistive material covers the sacrificial layer and said conductive material, and removing at least a portion of said sacrificial layer to expose the conductive material.

Abstract: A high voltage resistor comprising an array of a plurality of parallel electrically connected resistor elements each containing a resistive solution, attached at each end thereof to an end plate, and about the circumference of each of the end plates, a corona reduction ring. Each of the resistor elements comprises an insulating tube having an electrode inserted into each end thereof and held in position by one or more hose clamps about the outer periphery of the insulating tube. According to a preferred embodiment, the electrode is fabricated from stainless steel and has a mushroom shape at one end, that inserted into the tube, and a flat end for engagement with the end plates that provides connection of the resistor array and with a load.

Abstract: A printed circuit polymer thick film (PTF) resistor includes tolerance control material that substantially surrounds the resistor body and significantly improves the linearity of resistance vs. resistor length, and significantly reduces resistor-to-resistor and board-to-board fabrication variances. In one embodiment, the tolerance control material is the same metallic material as the printed circuit conductors, and is formed in two finger patterns on each side of the resistor body, each finger pattern connected to one terminal pad of the resistor. A layout cell is used for fabricating the PTF resistor. A method is used for fabricating the PTF resistor.

Abstract: An electrical component includes a base body that contains dielectric layers. The dielectric layers are superimposed and contain ceramic. The component also includes outer contacts on an exterior of the base body, and a resistor in an interior of the base body located between two of the dielectric layers. The resistor is connected to the outer contacts, and is made from a layer that forms a path between the outer contacts. The path between the outer contacts has multiple bends.

Abstract: A microelectronic assembly, including a microelectronic element such as a semiconductor chip and a dielectric material covering the chip and forming a body having a bottom surface. The assembly includes conductive units having portions exposed at the bottom surface, posts extending upwardly from said exposed portions and top flanges spaced above the bottom surface.

Abstract: A resistor layout and method of forming the resistor are described which achieves improved resistor characteristics, such as resistor stability and voltage coefficient of resistance. A resistor is formed from a conducting material such as doped silicon or polysilicon. The resistor has a rectangular first resistor element, a second resistor element, a third resistor element, a fourth resistor element, and a fifth resistor element. A layer of protective dielectric is then formed over the first, second, and third resistor elements leaving the fourth and fifth resistor elements exposed. The conducting material in the exposed fourth and fifth resistor elements is then changed to a silicide, such as titanium silicide or cobalt silicide, using a silicidation process. The higher conductivity silicide forms low resistance contacts between the second and fourth resistor elements and between the third and fifth resistor elements.

Abstract: A multiple network electronic component includes an insulator having a first element-forming surface and a second element-forming surface spaced thicknesswise from the first element-forming surface, a plurality of first intermediate film conductors 20A formed on the first element-forming surface and spaced from each other, a plurality of second intermediate film conductors 20B formed on the second element-forming surface and spaced from each other in corresponding relation to the first intermediate film conductors, and a plurality of through-conductive paths penetrating the insulator for electrically connecting each of the first intermediate film conductors to a corresponding one of the second film conductors. The first element-forming surface is formed with a plurality of first elements and a plurality of second elements, and each of the first and second elements has one end connected to a respective one of the first intermediate film conductors.

Abstract: A resistor string that may have two resistor matrices laid out back-to-back with selected or all nominally equipotential nodes of the two matrices being interconnected. In certain applications, the matrix may have switch connections at each node, with the second matrix being an inactive matrix that may have the same number or different number, typically fewer resistors than the first matrix. In another embodiment, separate matrices may be used, and the inactive matrix may be smaller and have fewer resistors of a lower value to minimize the effect of gradients across the substrate. Preferred matrices and node connection switch configurations, as well as various embodiments of these and other features of the invention are disclosed.

Abstract: A ball grid array resistor network that has a ground plane to reduce noise and improve signal integrity. The ball grid array resistor network includes a substrate having a first and a second surface and vias that extending through the substrate between the first and second surfaces. Resistors are located on the first surface between the vias. Conductors are located over the vias and are electrically connected to ends of the resistors. A cover coat covers the conductors and resistors. A ground plane is located on the second surface. An insulating layer is located over the ground plane. Ball pads are located over the vias. The ball pads are electrically connected to the vias. Solder spheres are attached to the ball pads.

Abstract: An arrangement of several resistors jointly positioned in one and the same well of a semiconductor device, as well as to a semiconductor device including at least one such arrangement of resistors, wherein the resistors, when viewed in a longitudinal direction of the resistors, are displaced in relation to one another.

Abstract: A laser system and method for cleanly trimming or severing resistive links fabricated on an undoped gallium arsenide substrate without damaging or affecting adjacent circuit structures or the underlying or surrounding substrate is disclosed. The system comprises a laser source adapted to generate an output at a wavelength within the range of 0.9 to 1.5 &mgr;m, a resistive film structure formed on an undoped gallium arsenide substrate, and a beam positioner and alignment system to align the laser source with the target structure. The method comprises generating a laser output at a wavelength in a range of about 0.9 to 1.5 &mgr;m and directing the laser output to illuminate a resistive thin-film structure fabricated on a gallium arsenide substrate. The resistive film structure comprises a first layer of protective dielectric and a layer of resistive thin-film material. Preferably, a second layer of protective dielectric lies upon the layer of resistive thin-film material.

Abstract: In accordance with the invention, a temperature compensating device comprises one or more integrated sheet thermistors. Because the sheet thermistors are relatively thick and integral with the substrate, they are less susceptible to changes in air temperature and to temperature gradients. Moreover, the sheet thermistors can be made smaller in area, permitting more compact, less expensive devices that exhibit improved high frequency performance. The devices can advantageously be fabricated using the low temperature co-fired ceramic (LTCC) process.

Abstract: A multiple chip resistor is manufactured in the following method. First electrode layers are formed on a first surface of a substrate. Resistor elements electrically connected to the first electrode layers, respectively, are formed on the first surface of the substrate. Slits are formed in the substrate for separating the first electrode layers. Edge electrodes connected to the first electrode layers at the edges of the slits, respectively, are formed on respective edges at the slits of the substrate. The substrate is divided at the slits into strip substrates. Portions of the edge electrodes are removed for electrically isolating the resistor elements from each other. The method provides the edge electrodes on each strip substrate with an improved dimensional accuracy, hence allowing the edge electrodes to be isolated electrically from each other. Consequently, the multiple chip resistor is prevented from being mounted defectively when the resistor is surface-mounted.

Abstract: A ball grid array resistor network has a planar substrate formed of an organic material. The substrate preferably is a printed circuit board. The substrate has a top and bottom surface. A ball pad is located on the bottom surface. A low temperature resistor is located on the bottom surface and is connected to the ball pad. A solder mask is located over the first surface except for the ball pads. A conductive ball is attached to the ball pad. A reflowed solder paste connects the conductive ball to the ball pad. Several embodiments of the invention are shown.

Abstract: A process for manufacturing a composite polymeric circuit protection device in which a polymeric assembly is provided and is then subdivided into individual devices. The assembly is made by providing first and second laminates, each of which includes a laminar polymer element having at least one conductive surface, providing a pattern on at least one of the conductive surfaces on one laminate, securing the laminates in a stack in a desired configuration, at least one conductive surface of at least one of the laminates forming an external conductive surface of the stack, and making a plurality of electrical connections between a conductive surface of the first laminate and a conductive surface of the second laminate. The laminar polymer elements may be PTC conductive polymer compositions, so that the individual devices made by the process exhibit PTC behavior.

Abstract: A resistive element controllable to irreversibly decrease its value, comprising: several polysilicon resistors associated in series between two input/output terminals of the resistive element; and an assembly of switches, connected to turn the series association into a parallel association of said resistors between two programming terminals intended to receive a supply voltage.

Abstract: A method of protecting a thick film resistor, including the steps of: providing a substrate having a plurality of conductive elements thereon; applying an electrically resistive material to a surface of the substrate, thereby forming the thick film resistor, the resistive material being electrically connected to at least one corresponding conductive element; curing the resistive material; and applying a coating over at least a substantial portion of the resistive material.

Abstract: A liquid crystal display (LCD) includes an LCD panel providing a surface. A flexible heating system of the invention includes a substantially transparent flexible sheet substrate disposed adjacent the surface of the LCD panel and a substantially transparent resistive heating element formed on the flexible sheet substrate. One or more serpentine shaped thermal sensors are formed in the resistive heating element. Control circuitry coupled to the serpentine shaped thermal sensors and to the substantially transparent resistive heating element and other heaters controls the heating element and other heaters based resistances of the serpentine shaped thermal sensors.

Abstract: A temperature compensating device comprises one or more columnar thermistors embedded within a substrate. Because the thermistors are substantially covered by the substrate, they are less susceptible to changes in air temperature and to temperature gradients. Moreover, within the substrate the thermistors can be made thicker and smaller in lateral area, permitting more compact, less expensive devices that exhibit improved high frequency performance. The devices can advantageously be fabricated using the low temperature co-fired ceramic (LTCC) process.

Abstract: An impedance network configuration in the form of a snake-like or ladder structure is provided. The ladder configuration enables the provision of tabs extending outwardly from the normal conducting path, the tabs providing a location for the provision of contact layers. Using such a configuration the contribution of the contact impedance can be minimized and also programming of the configuration may be effected.

Abstract: First and second resistors are given a common length L and arranged to have a constant equal resistance per unit length. A plurality of switch elements are made conductive between the resistors. A predetermined constant voltage V1 is applied to one terminal of the resistor through a wiring. The voltage value AD1 at the other terminal of the resistor is detected by a processing unit through a wiring. The voltage value AD2 at one terminal of the resistor is detected by the processing unit through a wiring. The other terminal of the resistor is connected with the ground through a wiring. On the basis of the voltage values AD1 and AD2 detected, the operating states of the individual switch elements are detected by the processing unit.

Abstract: Accurate models of the contact region of an integrated circuit resistor are created in a single function. The function incorporates many contact geometries into a single function that cannot otherwise be represented by a closed form solution. A method of creating the function uses regression over the simulation results for many combinations of input variables. The function may use the contact resistance, metal trace resistance, and resistive area resistance as inputs to calculate the resistor contact region resistance.

Abstract: A resistor-capacitor network for terminating transmission lines. The network includes a core of dielectric material. Capacitors are formed within the core from spaced apart electrode plates. Terminals extend from the electrode plates to a top surface of the core. The electrode plates are oriented perpendicular to the top surface. Ball pads are located on the top surface. Resistors are located on the top surface and are connected between the ball pads and terminals. Conductive spheres are attached to the ball pads.

Abstract: A termination resistor is mounted on a memory circuit and provides a termination resistance for the memory circuit. The termination resistor includes a node, a plurality of first termination resistors responsive to a corresponding control signal and connected between a power voltage and the node, and a plurality of second termination resistors responsive to a corresponding control signal and connected between a ground voltage and the node.

Abstract: An electrical current sensor and utility electricity meter, the current sensor comprising a &pgr; resistor shunt configuration, wherein the resistors comprise layered conductors at substantially equal temperatures to provide a zero temperature coefficient sensor. A fiscal electricity meter is described together with a four-layered current sensor fabricated using PCB techniques.

Abstract: The scribe line is constituted by a large number of depressed portions of desired depth formed by radiation of a laser beam in a surface of the raw substrate corresponding to a boundary line between adjacent insulating substrates so that the depressed portions are arranged in a line at fixed pitch intervals along the boundary line, and a portion where the pitch intervals of the depressed portions are reduced is provided over a desired length on the way of the scribe line, or a portion where the depth of the depressed portions is increased is provided over a desired length on the way of each of the scribe lines.

Abstract: A dry load test apparatus 40 comprises multi stage resistor bodies 57R, 57S and 57T for high voltage load tests. having a large number of flat shaped resistor assemblies Ri, Si and Ti consisting of numerous elongate resistor elements rj provided side by side in a flat shape with interval and serially connected at an end thereof, said large number of resistor assemblies Ri, Si and Ti being provided side by side with multi stages with interval in order that flat planes thereof become parallel so that numerous resistor element columns which are formed with corresponding said resistor elements rj of the multi stage resistor assemblies Ri, Si and Ti are provided.

Abstract: A method and apparatus provides resistor network packages with some of the resistor sub-package positions remain open, which may accommodate different circuit configurations with a common circuit assembly. Also, the present invention provides a packaging method using resistor network packages as connecting and disconnecting mechanisms for the signal lines on the package.

Abstract: A method and apparatus provides resistor networks with two or more resistance values, which may accommodate different circuit configurations with a common circuit assembly. Also, the present invention provides a packaging method using multiple-value resistor networks as connecting and disconnecting mechanisms for the signal lines on the package.

Abstract: A resistor for driving a motor for an air conditioner blower is provided, in which internal resistance bodies are stacked over one after another between insulation plates in the resistor, to accordingly reduce the volume of the entire of the resistor is reduced, and the resistance bodies are separated into a plurality of metal thin plates not a single plate and stacked over one after another, to thereby increase a line width. Also, a temperature fuse is disposed externally. The air conditioner fan blower motor driving resistor is obtained by stacking resistance bodies made of at least two metal thin plates over one after another. The resistance bodies are formed of an independent resistance body forming a second resistance body and a third resistance body on two separate thin plates, and another independent resistance body forming a first resistance body on another thin plate.

Abstract: A composite circuit protection device includes a laminar insulating member and first and second laminar circuit protection devices.

Abstract: A laminar sensor (1) for detecting changes on a laminar substrate (35). The sensor includes a laminar sheet (3) which has a first surface (5) and a second opposite surface (7), and is made from a conductive polymer composition which exhibits temperature dependent resistance behavior, preferably PTC behavior. A plurality of sensing elements (12) are electrically connected, preferably in series, on the sensor. Each sensing element is formed as an electrode pair containing a first electrode and a second electrode. The first and second electrodes (9, 11) may be on the same surface of the laminar sheet or on opposite surfaces of the sheet. Two electrical leads (17, 19) are present for connecting the sensing elements into a circuit, which may be used to detect changes in resistance which occur when a sensing element is exposed to an elevated temperature, a change in pressure, or a solvent.

Abstract: The present invention provides a composite material such as a passive element, a passive element composite component, a substrate with a built-in passive element and a composite wiring substrate which are free from, for example, a layer peeling problem and enables high density packaging with ease. In the present invention, a porous base material is divided into plural functional regions and a material having different electromagnetic characteristics is filled in a pore of the porous base material of each functional region, to form a passive element or a wiring substrate. Among the aforementioned plural functional regions, at least one functional region is a conductive material region filled with a conductive material and other regions are filled with a high-dielectric material, a high-permeability material or a low-dielectric material.

Abstract: An array resistor network that has a high density of resistors per unit area. The array resistor network includes a ceramic substrate having a top and bottom surface. Apertures extend through the substrate between the top and bottom surfaces. Recesses are located on opposite edges of the substrate. Resistors are located on the top surface. Each resistor is located between a recess and an apertures. Inner conductors are connected to one end of the resistors. The Inner conductors are located on the top surface and extend through the aperture onto the bottom surface. Outer conductors are connected to another end of the resistors. The outer conductors are located on the top surface and extend along the recess onto the second surface.

Abstract: An electrical device comprising a pair of electrodes, three substrates, and PTC elements inserted between the substrates, each PTC element having metal layers on both surfaces, in which each of the outer substrates has a metal layer on the inner surface, the two metal layers being electrically connected to one of the electrodes and in electrical contact with the respective metal layers of the PTC elements facing said metal layers of the outer substrates, and the center substrate has a metal layer on both surfaces, such metal layers being electrically connected to the other electrode and in electrical contact with the respective metal layers of the PTC elements facing said metal layers of the center substrate. This electrical device can increase the area of the PTC elements without increasing the projected area as a whole.

Abstract: An electrical device which contains a first electrode, a second electrode, a third electrode, a first resistor which is connected in series between the first and second electrodes, and a second resistor which (i) is thermally coupled to the first resistor, (ii) exhibits anomalous resistance/temperature behavior, and (iii) is connected in series between the first and third electrodes.

Abstract: Enhanced linearity, low switching perturbation resistor string matrices. The resistor strings are arranged in an array of a plurality of rows of resistive elements and electrically arranged with rows equally spaced above and below the physical centerline of the array being coupled together in an opposite sense. Preferably also physically adjacent rows are equally spaced from the center of the electrical order of rows. This connection prevents accumulation of errors due to vertical and horizontal resistance gradients over the array. Also node selection by controlling node select transistors coupled to column select lines to select one node in each row, and also controlling row select transistors to select the row of the desired node minimizes settling time after a tap change by inducing equal and opposite voltage changes at points close together along the resistor string, whether in the array of the present invention or in the snake configuration.