Abstract: An error correction encoding device includes an encoding unit to generate soft decision error correction frame information including a bit array of m rows and N columns obtained by combining first bit string group information and second bit string group information, the first bit string group information including a bit array of m rows and N1 columns in which it is enabled to perform pulse amplitude modulation of a combination of bit values of each column of the first bit string group information into a modulation symbol by using a first symbol mapping rule, the second bit string group information including a bit array of m rows and N2 columns in which it is enabled to perform pulse amplitude modulation of a combination of bit values of each column of the second bit string group information into a modulation symbol by using a second symbol mapping rule.

Abstract: Methods, systems, and devices for fixed weight codewords for ternary memory cells are described. A memory device may generate a codeword from a set of data bits and invert a portion of the codeword so that the codeword is associated with a target distribution of programmable states. After inverting the portion of the codeword, the memory device store the codeword in a set of ternary cells according to a coding scheme. The memory device may read the codeword from the set of ternary cells and select one or more reference voltages for the set of ternary cells based on the target distribution for the codeword and the states of the ternary cells.

Abstract: Methods, systems, and devices for wireless communication are described for polar coding with rate matching. A transmitter may construct input channels into a polar encoder to provide an information bit vector that does not include punctured or shortened bits. One or more transmission capacity factors may be used in identifying the information bit vector, which may be mapped to one or more of a codeword length of the polar code or a number of transmitted bits in each codeword. A number of different rate matching schemes may be available for transmissions, and may be selected based on one or more polar coding parameters. In some cases, mapping techniques may be used in two or more different rate matching schemes.

Abstract: A clock data recovery (CDR) mechanism qualifies symbols received from the data detector prior to using those symbols to compute a timing gradient. The disclosed CDR mechanism analyzes one or more recently received symbols to determine whether the current symbol should be used in computing the time gradient. When configured with a Mueller-Muller phase detector, the timing gradient for the received signal is set to zero if the current symbol is a ?2 or a +2 and the previous symbol is non-zero. Otherwise, the Mueller-Muller timing gradient is evaluated in the traditional manner. When configured with a minimum mean-squared error phase detector, the timing gradient for the received signal is set to zero if the previous symbol is non-zero. Otherwise, the minimum mean-squared error timing gradient is evaluated in the traditional manner.

Abstract: This application provides a polar code transmission method and apparatus. The method includes: transforming a to-be-processed bit sequence at two or more different granularities, where each specific manner at a first granularity is used to implicitly indicate one value in one level of time sequence information, and each specific manner at a second granularity is used to implicitly indicate one value in another level of time sequence information; and sending the transformed (processed) bit sequence, so that different encoded bit sequences can be obtained, and more versions of time sequence information can be implemented, thereby meeting a requirement of transmission in a plurality of levels of time sequences.

Abstract: Techniques are described herein to terminate a list decoding operation before its completion based on performing one or more error check processes. A transmitted codeword encoded using a polar code may include one or more error check vectors interspersed with one or more information vectors. Upon receiving the codeword, a decoder may perform a list decoding operation on the received codeword. Upon decoding one of the error check vectors, the decoder may determine whether at least one candidate path used in the successive cancellation list decoding operation passes an error check process based on the error check vector. If no candidate paths satisfy the error check process, the decoder may terminate the list decoding operation. In some examples, the decoder may recheck whether candidate paths satisfy the error check operation at intermediate positions between error check vectors. Such rechecking may occur while decoding information vectors.

Abstract: A system and method for controlling optical receiver operation in response to a received optic signal power level that includes providing an optic signal receiver having operation determined by one or more system settings. During operation, the optic signal is received and converted to an electrical signal. The electrical signal is evaluated to determine a power level of the electrical signal. Responsive to the power level of the electrical signal exceeding a first predetermined threshold, adjusting a first system setting and responsive to the power level of the received electrical signal decreasing below a second predetermined threshold, adjusting the first system setting. Then, responsive to the power level of the received electrical signal exceeding a third predetermined threshold, adjusting a second system setting and responsive to the power level of the received electrical signal decreasing below a fourth predetermined threshold, adjusting the second system setting.

Abstract: Disclosed are a transmitter capable of cancelling simultaneous switching noise while ensuring low costs and a small area and a data transmission method in the same. The transmitter includes an encoder configured to convert input data of two levels (1 and 0) into data of three levels (+1, 0, and ?1) and an output unit configured to output the data converted by the encoder. Here, the encoder adds 1 bit to the input data such that the number of bits corresponding to logic 1 becomes an even number. In addition, a specific correlation is established between currents or voltages corresponding to at least two levels of levels “+1”, “0”, and “?1” so that “+1” and “?1” corresponding to the logic 1 are alternately arranged and a current flowing through a power line or a ground line is constant regardless of the input data.

Abstract: According to certain embodiments, a transmit node in a wireless communications system includes a first universal rate-compatible polar encoder and a transmitter. The first universal rate-compatible polar encoder is configured for a family of two or more types of channels and encodes a plurality of information bits to provide a plurality of coded bits. The transmitter transmits the plurality of coded bits to a receive node.

Abstract: Systems and methods are disclosed that relate to performing rate matching when using polar codes. In one embodiment, a plurality of bits are received at a polar encoder. A value is obtained that corresponds to at least one of: a coding rate to be used to transmit the plurality of bits, and a number of coded bits to be used to transmit the plurality of bits. It is determined which range of values the value falls within, and an information sequence is obtained that corresponds to the range the value falls within. The plurality of bits are mapped to a subset of positions of an input vector according to the information sequence. The remaining positions of the input vector are set as frozen values that are known by a decoder. The input vector is then encoded in the polar encoder to generate a codeword.

Abstract: Sold-state intravascular ultrasound (IVUS) imaging devices, systems, and methods are provided. Some embodiments of the present disclosure are particularly directed to compact and efficient circuit architectures and electrical interfaces for an ultrasound transducer array used in a solid-state IVUS system. In one embodiment, an intravascular ultrasound (IVUS) device includes: a flexible elongate member; an ultrasound scanner assembly disposed at a distal portion of the flexible elongate member, the ultrasound scanner assembly including an ultrasound transducer array; an interface coupler disposed at a proximal portion of the flexible elongate member; and a cable disposed within and extending along a length of the flexible elongate member between the ultrasound scanner assembly and the interface coupler. The cable includes four conductors electrically coupling the ultrasound scanner assembly and the interface coupler.

Abstract: A re-sampler comprises a first CSD multiplier configured to receive input samples, a first accumulator coupled to the first CSD multiplier and configured to form a first MAC unit with the first CSD multiplier, a second CSD multiplier configured to receive the input samples, and a second accumulator coupled to the second CSD multiplier and configured to form a second MAC unit with the second CSD multiplier, wherein the re-sampler is configured to generate output samples based on the input samples. A method comprises receiving, by a first CSD multiplier, input samples, receiving, by a second CSD multiplier, the input samples, generating coefficients, scaling, using the first CSD multiplier and the second CSD multiplier, the input samples with coefficient vectors associated with the coefficients to form coefficient vector scaled input samples, and generating output samples based on the coefficient vector scaled input samples. The CSD multipliers may be MC-CSD multipliers.

Abstract: Described is an apparatus for converting binary data to ternary and back such that the apparatus comprises: a first look-up table (LUT) having a mapping of 19 binary bits to 12 ternary trits; and a first logic to receive a binary input and to convert the binary input to a ternary output according to the first LUT.

Abstract: In reduced-stage polar decoding, a received word that is based on an N-bit codeword of a polar code is decoded using fewer than log2N Log Likelihood Ratio (LLR) stages. Decoding uses a reduced stage decoding configuration. In an embodiment, such a configuration includes at least one higher-order LLR stage with nodes implementing functions that are based on a combination of lower-order polar code kernels.

Abstract: The invention provides a method and a communications device for transmitting information. The method includes: determining a quantity N of padding bits according to a quantity M of effective information bits included in a code block and a quantity L of effective input ports of a polar code encoder, where M and L are positive integers, and N is a difference between L and M; determining input bits that are to be input into the polar code encoder, where the input bits include the M effective information bits and the N padding bits; inputting, according to a mapping relationship between the L effective input ports and the input bits, the input bits into the polar code encoder through the L effective input ports to perform coding, so as to obtain coded bits; and transmitting the coded bits. This bit-padding manner has ensured successful information transmission.

Abstract: Methods, systems, and devices for outputting of codeword bits for transmission prior to loading all input bits. An example encoder may have multiple encoding branches. The encoder may divide the encoding branches into first and second encoding branch subsets, outputs of the first encoding branch subset being independent of inputs to the second encoding branch subset. The encoder may generate first and second subsets of output bits of a codeword in first and second encoding operations, the generating comprising inputting information bits of an information bit-vector and at least one frozen bit into respective encoding branches of the plurality of encoding branches and generating the first subset of output bits using the first encoding branch subset prior to generating the second subset of output bits using the second encoding branch subset. The encoder may output the first subset of output bits prior to outputting the second subset of output bits.

Abstract: A method of encoding a bitstream includes obtaining at least one current input word of the bitstream to encode, determining at least one nominal codeword associated with the at least one input word according to an error-control code, selecting one of the at least one nominal codeword or a substitute codeword in order to keep a current running digital sum and/or a running alternate sum bounded, and outputting an encoded word comprising the selected codeword. Embodiments make it possible to generate an encoded bitstream which is “DC free” and “Nyquist free” while providing error correction with a fixed coding rate.

Abstract: A method and system for direct memory transfers between memory modules are described that includes sending a request to a first memory module and storing the data sent on a memory bus by the first memory module into a second memory module. The direct transfer of data between the first and second memory modules reduces power consumption and increases performance.

Abstract: A method for increasing coding reliability includes generating a generator matrix for an extended polar code including a standard polar code part and an additional frozen part. The standard polar code part has N bit-channels, including K information bit-channels and N?K frozen bit-channels. The additional frozen part has q additional frozen bit-channels. Among the K information bit-channels, q information bit-channels are re-polarized using the q additional frozen bit-channels. The method further includes receiving an input vector including K information bits and N+q?K frozen bits, and transforming, using the generator matrix, the input vector to an output vector including N+q encoded bits. The K information bits are allocated to the K information bit-channels, and the N+q?K frozen bits are allocated to the N?K frozen bit-channels and the q additional frozen bit-channels.

Abstract: An optical communication apparatus includes an optical modulator having a Mach-Zehnder interferometer with a pair of waveguides and configured to modulate a phase of light emitted from a light source, a first controller configured to control a first substrate bias voltage or an amplitude of a first drive signal applied to a first waveguide of the waveguide pair of the optical modulator based upon an output of the optical modulator or a wavelength of the light source; and a second controller configured to control a second substrate bias voltage or an amplitude of a second drive signal applied to a second waveguide of the waveguide pair of the optical modulator independently from the first controller, based upon the output of the optical modulator or the wavelength of the light source.

Abstract: A system and method for accessing coherent data on a controller. The system and method include a first buffer and a second buffer that each may be read from or written to and an indicator that indicates which of the first or the second buffer is read from while the other of the first or second buffers is written to. The system and method also include a read synchronization protocol that allows the coherent data to be read from the buffer that the indicator indicates is the read buffer and a write synchronization protocol that allows the coherent data to be written to the buffer that the indicator indicates is the write buffer.

Abstract: A communication system comprises a packet stream transforming unit, a mapping unit and a transmission unit. The packet stream transforming unit is configured to receive a 4-bit packet stream and transform the 4-bit packet stream into a 6-bit packet stream. The mapping unit is configured to map the 6-bit packet stream into multiple ternary bit streams, and the mapping unit maps at least one idle symbol into the ternary bit streams according to at least one particular bit of the at least one idle symbol of the 6-bit packet stream. The transmission unit is configured to transmit the ternary bit streams to a remote communication device through a cable.

Abstract: A device is provided comprising a shared bus, a slave device, and a master device. The slave device may be coupled to the shared bus. The master device may be coupled to the control data bus and adapted to manage communications on the shared bus. Transmissions over the shared bus are a plurality of bits that are encoded into ternary numbers which are then transcoded into symbols for transmission, and either the 3 least significant bits or the least significant in the plurality of bits are used for error detection of the transmission.

Abstract: Systems and processes for analyzing audio input for efficient speech and music recognition are provided. In one example process, an audio input can be received. A determination can be made as to whether the audio input includes music. In addition, a determination can be made as to whether the audio input includes speech. In response to determining that the audio input includes music, an acoustic fingerprint representing a portion of the audio input that includes music is generated. In response to determining that the audio input includes speech rather than music, an end-point of a speech utterance of the audio input is identified.

Abstract: An apparatus and method of constructing a universal polar code is provided. The apparatus includes a first function block configured to polarize and degrade a class of channels Wj to determine a probability of error Pe,j of each bit-channel of Wj, wherein j?{1, 2, . . . , s}, in accordance with a bit-channel index i; a second function block configured to determine a probability of error Pe(i) for the universal polar code for each bit-channel index i; a third function block configured to sort the Pe(i); and a fourth function block configured to determine a largest number k of bit-channels such that a sum of corresponding k bit-channel error probabilities Pe(i) is less than or equal to a target frame error rate Pt for the universal polar code, wherein the indices corresponding to the k smallest Pe(i) are good bit-channels for the universal polar code.

Abstract: An apparatus relating generally to encoding is disclosed. This apparatus includes a bus interface for communicating information from a first die including the bus interface to a second die. A first portion of a bus associated with the bus interface is associated with data bits. A second portion of the bus associated with the bus interface is associated with encoding bits. The bus interface is configured to encode a data word to provide an encoded word. The encoded word is associated with a combinatorial number system.

Abstract: A circuit having versatility synthesizes one-bit digital signals to generate a ternary signal. The pulse synthesizing circuit synthesizes one-bit digital signals from two DFFs to generate a ternary signal. The pulse synthesizing circuit has a first NOR gate, a second NOR gate, a third NOR gate, and three switches. The first switch is connected to a first electric potential, the second switch is connected to a second electric potential, and the third switch is connected to a third electric potential. The first to third switches are turned on/off according to logical values of the signals from the two DFFs, and any of the first electric potential, the second electric potential, and the third electric potential is set as an output potential so that a ternary signal is generated.

Abstract: A circuit having versatility synthesizes one-bit digital signals to generate a ternary signal. The pulse synthesizing circuit synthesizes one-bit digital signals from two DFFs to generate a ternary signal. The pulse synthesizing circuit has a first NOR gate, a second NOR gate, a third NOR gate, and three switches. The first switch is connected to a first electric potential, the second switch is connected to a second electric potential, and the third switch is connected to a third electric potential. The first to third switches are turned on/off according to logical values of the signals from the two DFFs, and any of the first electric potential, the second electric potential, and the third electric potential is set as an output potential so that a ternary signal is generated.

Abstract: A system for processing a signal includes a detector configured to detect a two-level stream of bits; a converter configured to generate a three-level control signal based on two adjacent values within the two-level stream of bits; and a switch configured to determine which of three different paths to couple a current source to based on a value of the three-level control signal. Thus, based on adjacent values of the output stream a three-level control signal is generated which controls coupling of the current source to one of three different paths. This type of three-level digital-to-analog converter can be, for example, part of the feedback loop of an analog-to-digital converter. Similar techniques can also be utilized in a multi-segment digital-to-analog converter in which each segment of the DAC is controlled by a 3-level control signal and the DAC is implement using PMOS devices.

Abstract: A CODEC includes a transmission path between an encoder and a decoder. The encoder receives bits of data in a first form in which each bit of the data is represented by switching between first and second logic states and no voltage change between consecutive bits of the same logic state and serially transmits the bits in a second form in which the first logic state is maintained at a high voltage, the second logic state is maintained at a low voltage, and an intermediate voltage is maintained between consecutive bits. The decoder receives the bits in the second form and derives a clock from the occurrences of the intermediate voltage. The clock, repetitively, is maintained at a logic high, then switches directly from the logic high to a logic low, then is maintained at the logic low, and then switches directly between the logic low and the logic high.

Abstract: A method includes receiving multiple bits to be transmitted. The method also includes applying a first binary alphabet polar code to a first subset of the multiple bits to generate first encoded bits. The first encoded bits are associated with a first bit level of a multilevel coding scheme. The method further includes generating one or more symbols using the first encoded bits and bits associated with a second bit level of the multilevel coding scheme. The first binary alphabet polar code is associated with a first coding rate. In addition, the method could include applying a second binary alphabet polar code to a second subset of the multiple bits to generate second encoded bits. The second encoded bits are associated with the second bit level. The second binary alphabet polar code is associated with a second coding rate such that the bit levels have substantially equal error rates.

Abstract: A coding method, a decoding method, a coder, and a decoder are disclosed herein. A coding method includes: obtaining the pulse distribution, on a track, of the pulses to be encoded on the track; determining a distribution identifier for identifying the pulse distribution according to the pulse distribution; and generating a coding index that includes the distribution identifier. A decoding method includes: receiving a coding index; obtaining a distribution identifier from the coding index, wherein the distribution identifier is configured to identify the pulse distribution, on a track, of the pulses to be encoded on the track; determining the pulse distribution, on a track, of all the pulses to be encoded on the track according to the distribution identifier; and reconstructing the pulse order on the track according to the pulse distribution.

Abstract: Systems and methods for the matching of datasets, such as input audio segments, with known datasets in a database are disclosed. In an illustrative embodiment, the use of the presently disclosed systems and methods is described in conjunction with recognizing known network message recordings encountered during an outbound telephone call. The methodologies include creation of a ternary fingerprint bitmap to make the comparison process more efficient. Also disclosed are automated methodologies for creating the database of known datasets from a larger collection of datasets.

Abstract: In one aspect, methods and systems for variable-block length encoding of data, such as an inverted index for a file are disclosed. These methods and systems provide for relatively fast encoding and decoding, while also providing for compact storage. Other aspects include a nearly 1:1 inverted index comprising a position vector and a data store, wherein values that have a unique location mapping are represented directly in the position vector, while for 1:n values (n>1), the position vector can include a pointer, and potentially some portion of information that would typically be stored in the data area, in order to fully use fixed width portions of the position vector (where a maximum pointer size is smaller than a maximum location identifier size).

Abstract: An encoding device encoding binary signals using arithmetic-encoding. The encoding device includes a binarization unit binarizing multivalued syntax elements in order to generate the binary signals. The generated binary signals are stored on an intermediate buffer. Further, the encoding device includes an arithmetic-encoding unit performing the arithmetic-encoding on the binary signals stored on the intermediate buffer. Additionally, the generated binary signals are binary representations of values of the multivalued syntax elements.

Abstract: Provided is an information processing apparatus including a distributor that distributes input data in units of M bits and generates N M-bit bit sequences, an encoder that converts each of the N bit sequences distributed by the distributor into a binary symbol sequence of K symbols and generates N binary symbol sequences, a signal generator that generates N transmission signals Sj synchronized with a specific symbol clock and having, as an amplitude value, each symbol value included in the N binary symbol sequences, a signal delay unit that delays, with regard to j, the transmission signals Sj generated by the signal generator by a (j?1)/N-symbol period and generates delay signals Rj, a signal addition unit that adds the delay signals Rj generated by the signal delay unit and generates an added signal, and a signal transmitter that transmits the added signal generated by the signal addition unit.

Abstract: Systems, methods, and physical computer-readable storage media for performing geometric data compression and geometric data decompression and/or geometric data encryption and geometric data decryption. A virtual geometric compression object is generated within a computer system by defining a plurality of discrete elements arranged in a geometric shape and assigning one or more data bit values to each of the plurality of discrete elements. The virtual geometric compression object is used by the computer system to compress sequences of uncompressed data bits into compression definitions. A compression definition defines a path through the virtual geometric compression object corresponding to a sequence of uncompressed data bits. In a reverse manner, for data decompression, at least a portion of a virtual geometric compression object is generated and a compression definition is used to extract a corresponding sequence of uncompressed data bits from the portion of the virtual geometric compression object.

Abstract: A decoding-processing apparatus that decodes bitstreams using an intermediate format. The apparatus includes a context-calculating unit (2) calculating the probability of symbols contained in incoming bitstreams, a parameter-generating unit (3) generating parameters for use in the context-calculating unit (2), and an arithmetic decoding-calculating unit (4) decoding the incoming bitstreams in accordance with the probability, thereby providing decoded data.

Abstract: An apparatus and method are disclosed to encode binary data into trinary data. Applicants' method provides binary data, and encodes that binary data into trinary data. By “binary data,” Applicants mean a plurality of bits, wherein each of those bits comprises a value selected from the group consisting of a first value and a second value. By “trinary data,” Applicants mean a plurality of bits, wherein each of those bits comprises a value selected from the group consisting of a first value, a second value, and a third value. The trinary data may be stored in ROM optical disks, nano-sized indentations in a thin-film, or multi-level magnetic storage. The trinary data may be also transmitted via three light levels in an optical communications network.

Abstract: The invention relates to a method to efficiently transmit a digital message over a unidirectional optical link, such as the link between a computer screen and a security token equipped with photosensitive elements. It is an object of this invention to provide a source coding scheme that is optimized for transmissions of alphanumerical data containing frequent occurrences of numerals and less frequent occurrences of non-numerical data. This is achieved by using a modified Huffman code for source coding, consisting of a nibble-based prefix-free binary code. The output of the coder is efficiently mapped onto a 6B4T channel code, wherein unused ternary codewords can be used to signal data-link layer events. This efficient signalling of data-link layer events, in turn, allows for a synchronization scheme based on repeated transmissions of a finite-length message, combined with an out-of-band clock signal.

Abstract: A method for decompressing at least two two-valued symbol sequences into a three-valued communication sequence is described comprising converting a first two-valued symbol sequence into an intermediate symbol sequence and symbol-wise multiplying the intermediate symbol sequence with the second two-valued symbol sequence to generate the three-valued communication sequence.

Abstract: A decoding-processing apparatus that decodes bitstreams using an intermediate format. The apparatus includes a context-calculating unit (2) calculating the probability of symbols contained in incoming bitstreams, a parameter-generating unit (3) generating parameters for use in the context-calculating unit (2), and an arithmetic decoding-calculating unit (4) decoding the incoming bitstreams in accordance with the probability, thereby providing decoded data.

Abstract: The described embodiments provide a system that encodes a sequence of integers using a variable-length compression technique. During operation, the system scans the sequence of integers and observes the sizes of the integers to determine a threshold value, K, from the observed sizes. For a given integer of length N bits, if N?K is greater than zero, the system generates a tag for the encoded integer comprising a sequence of N?K zeros followed by a one, and generates a set of remaining bits for the encoded integer as a sequence of the N?1 least-significant bits which make up the integer. Otherwise, the system generates a tag for the encoded integer as a single one, and generates a set of remaining bits for the encoded integer by padding the N bits which make up the integer with zeros so that the set of remaining bits is K bits in length.

Abstract: A system and method for realizing a Wyner-Ziv encoder may involve the following steps: (a) apply nested quantization to input data from an information source in order to generate intermediate data; and (b) encode the intermediate data using an asymmetric Slepian-Wolf encoder in order to generate compressed output data representing the input data. Similarly, a Wyner-Ziv decoder may be realized by: (1) applying an asymmetric Slepian-Wolf decoder to compressed input data using side information to generate intermediate values, and (b) jointly decoding the intermediate values using the side information to generate decompressed output data.

Abstract: A method for decompressing at least two two-valued symbol sequences into a three-valued communication sequence is described comprising converting a first two-valued symbol sequence into an intermediate symbol sequence and symbol-wise multiplying the intermediate symbol sequence with the second two-valued symbol sequence to generate the three-valued communication sequence.

Abstract: A system that encodes a sequence of integers using a variable-length compression technique is described. During operation, the system scans the sequence of integers and observes the sizes of the integers to determine a threshold value K from the observed sizes. For a given integer which is N bits in length, if N?K is greater than or equal to zero, the system generates a tag for the encoded integer which comprises a sequence of N?K zeros followed by a one, and generates a set of remaining bits for the encoded integer as a sequence of the N bits which make up the integer. Otherwise, if N?K is less than zero, the system generates a tag for the encoded integer as a single one, and generates a set of remaining bits for the encoded integer by padding the N bits which make up the integer with zeros so that the set of remaining bits is K bits in length.

Abstract: A system and method for realizing a Wyner-Ziv encoder may involve the following steps: (a) apply nested quantization to input data from an information source in order to generate intermediate data; and (b) encode the intermediate data using an asymmetric Slepian-Wolf encoder in order to generate compressed output data representing the input data. Similarly, a Wyner-Ziv decoder may be realized by: (1) applying an asymmetric Slepian-Wolf decoder to compressed input data using side information to generate intermediate values, and (b) jointly decoding the intermediate values using the side information to generate decompressed output data.

Abstract: A data processing circuit comprises an encoder circuit for encoding a data word, wherein each digit may have any one of three or more digit values. The data word is encoded so that digit counts in the data word satisfy predetermined criteria (the digit counts are counts of the numbers of the digits in the encoded data word that assume respective digit values). The encoder defines at least two digit maps, each digit map defining assignments of each of the available digit values to a respective different output digit value. The encoder selects at least two groups of digits within the input data word. Each group is associated with a respective one of the digit maps, the groups being selected so that when each digit map has been applied selectively to the digits from its associated group, digit counts of the number of times respective digit values occur in the data word will satisfy predetermined criteria.

Abstract: Method and apparatus for generating ternary and multi-valued Gold sequences, are disclosed. Also methods to detect ternary and multi-valued sequences are disclosed. The detection can be performed by a ternary or multi-valued LFSR descrambler when the sequences are generated by an LFSR based sequence generator. A wireless system which can assign additional sequences to designated users is also disclosed. The wireless system can also transfer information to user equipment that enables methods for sequence generation and sequence detection.

Abstract: Ternary data as corresponds to a movable barrier operator is provided (21) and converted (22) into corresponding binary information. In a preferred approach this comprises converting each ternary trit into a corresponding binary pair. Pursuant to a preferred approach binary bits as correspond to, for example, fixed and/or non-fixed information (32 and 33) are provided (31) and then converted (34) into the aforementioned ternary data.