Abstract: A display device including: a display panel including a plurality of pixels; and a data driver configured to arrange the display panel into a plurality of pixel blocks, and to output a data voltage with different slew rates to the plurality of pixel blocks, wherein the slew rates are based on distances of the plurality of pixel blocks from the data driver, wherein a boundary between adjacent pixel blocks with different slew rates is changeable.

Abstract: A sensor panel is overlaid on a display apparatus and connected to an integrated circuit that detects a position of an active pen in an active region of the display apparatus. The sensor panel includes first electrodes that extend in a first direction. The sensor panel also includes second electrodes that extend in a second direction. The first electrodes include first and second outer electrodes that are located at the outermost edges of the first electrodes and first inner electrodes disposed between the first and second outer electrodes. A width of at least one of the first and second outer electrodes in the second direction is smaller than a width of each of the first inner electrodes in the second direction.

Abstract: The present disclosure provides a driving circuit and a liquid crystal display panel, including an input module, a first control module, a second control module, a third control module, an output module and a reset module, which can simplify structure of the driving circuit while ensuring the liquid crystal display panel works well.

Abstract: A buffer circuit, a display module, and a display driving method are disclosed. The buffer circuit comprises a first polarity buffer, a negative polarity buffer. The first polarity buffer receives a first supply voltage and a second supply voltage to output a first reference voltage to a first resistance string. The second supply voltage is less than the first supply voltage. The negative polarity buffer receives the second supply voltage and a third supply voltage to output a negative reference voltage to a negative resistance string. The third supply voltage is less than the second supply voltage.

Abstract: The embodiments of the disclosure provide a source drive IC, a display device and a drive method therefor. The source drive IC comprises: a control selection module, a solid color grayscale control module and a non-solid color grayscale control module. The control selection module may be configured to receive a timing control signal inputted by a timing controller, and determine according thereto whether a current drive image is a solid color grayscale image, in response to determining that the current drive image is a solid color grayscale image, send the timing control signal to the solid color grayscale control module, and in response to determining that the current drive image is a non-solid color grayscale image, send the timing control signal to the non-solid color grayscale control module. The non-solid color grayscale control module may, according to the received timing control signal, obtain multiple sets of data voltages.

Abstract: A method for driving an LCD device includes displaying each picture with two frame images sequentially; the two frame images includes a first frame image and a second frame image; driving voltages for two adjacent sub-pixels in each of the frame images are different, and driving voltages in the first frame image and the second frame image for each of the sub-pixels are different; determining backlight brightness regulation signals for each of the backlight subareas; the backlight regulation signals are grouped signals, the number of the groups is identical to the number of types of the color sub-pixels; calculating an average color purity of a current picture area corresponding to each backlight subarea; determining whether the average color purity of each of the backlight subareas is within a preset range; if yes, performing a brightness regulation to a backlight source of the backlight subarea in each of the frame images of a next picture according to the backlight brightness regulation signal of the backli

Abstract: Disclosed is a gate driving circuit and a display device, which belongs to the technical field of displaying, and resolves a technical problem that a signal transmitted between cascaded gate driving circuits is easily attenuated in the prior art. The gate driving circuit includes a precharging unit circuit, an output unit circuit, and a compensation charging unit circuit; the output unit circuit includes a first reference point and a first clock signal line; and the precharging unit circuit is configured to input a high level to the first reference point before an output period.

Abstract: A method and system for operating a pixel array having at least one pixel circuit is provided. The method includes repeating an operation cycle defining a frame period for a pixel circuit, including at each frame period, programming the pixel circuit, driving the pixel circuit, and relaxing a stress effect on the pixel circuit, prior to a next frame period. The system includes a pixel array including a plurality of pixel circuits and a plurality of lines for operation of the plurality of pixel circuits. Each of the pixel circuits includes a light emitting device, a storage capacitor, and a drive circuit connected to the light emitting device and the storage capacitor. The system includes a drive for operating the plurality of lines to repeat an operation cycle having a frame period so that each of the operation cycle comprises a programming cycle, a driving cycle and a relaxing cycle for relaxing a stress on a pixel circuit, prior to a next frame period.

Abstract: A signal routing circuit is disclosed which employs resistive combiners to reduce signal jitter. A signal routing circuit configured according to an embodiment comprises an input stage including a plurality of buffer circuits. Each of the buffer circuits is controlled by a selection signal to enable an input signal at an input port of the buffer circuit to generate an output signal at an output port of the buffer circuit. The signal routing circuit also includes a plurality of resistors to couple the output port of each of the buffer circuits of the input stage to a summing junction. The signal routing circuit further includes an output stage including an additional buffer circuit. The input port of the additional buffer circuit is coupled to the summing junction, and the output port of the additional buffer circuit is configured to provide the routed output signal based on the selection signals.

Abstract: A display includes: a frame-rate conversion section being configured to be capable of changing a frame-rate conversion ratio having a value of 1 or more, the frame-rate conversion section converting a frame rate of an image signal at the frame-rate conversion ratio being set; and a display section displaying an image having undergone frame rate conversion.

Abstract: A k-th driving stage includes a first pull-down transistor. The first pull-down transistor includes a first control electrode receiving a second control signal activated after the k-th gate signal is output, a second control electrode receiving the switching signal synchronized with a clock signal, an input electrode receiving a first discharge voltage, and an output electrode connected to the output electrode of the first output transistor.

Abstract: An organic light emitting display device and a driving method thereof are provided. The organic light emitting display device comprising a display panel including a plurality of pixels, each pixel including an organic light emitting element, a data driver supplying a data signal to the organic light emitting element through a data line, a gate driver supplying a gate signal to the organic light emitting element through a gate line, and a timing controller controlling an operation timing of the data driver and an operation timing of the gate driver, and generating a conversion control signal controlling a conversion timing of a refresh rate of the display panel in response to an external input signal of the display panel.

Abstract: A stage includes first, second, and third outputs and first and second signal processors. The first output supplies a scan signal to a first output terminal based on signals to first and second input terminals and the voltage of a first node. The second output is connected to a first power source and supplies an emission control signal to a second output terminal based on signals to the first input terminal, the first output terminal, and a third input terminal. The third output is connected to the first power source and supplies an inverted emission control signal to a third output terminal based on signals to the first input terminal and second output terminal. The first signal processor controls the first node voltage based on a signal to a fourth input terminal. The second signal processor controls the first node voltage based on the signal to the second input terminal.

Abstract: The invention provides an array substrate, each sub-pixel comprising: a control TFT and a pixel electrode connected to control TFT; the pixel electrode comprising: a main region pixel electrode and a secondary region pixel electrode, layout with a gap in-between, and a first connection electrode electrically connected to the main region pixel electrode and the secondary region pixel electrode; the main and secondary region pixel electrodes being of special shape slit structure, the main region branch electrodes having a width smaller than width of the secondary region branch electrodes, the main region slit having a width smaller than width of the secondary region slit. The structural difference in the main and secondary region pixel electrodes is used to improve color shift, leading to reducing the number of TFTs in each pixel, improving pixel aperture ratio, reduces difficulty in balance control of best common voltage between main and secondary regions.

Abstract: A display device may include a display having a plurality of pixels. The display device may also include a replica pixel circuit having a switching device configured to output a first current based on a received voltage, a light-emitting diode (LED) configured to illuminate to a first gray level based on the first current output by the switching device, and current mirror circuitry configured to generate a second current that mirrors the first current. In addition, the replica pixel circuit may include a current source configured to output a reference current based on a voltage value that corresponds to the received voltage, comparator circuitry configured to determine a difference between the second current and the reference current, and voltage adjustment circuitry configured to adjust a source voltage output provided to the plurality of pixels based on the difference.

Abstract: This application provides an over-driving apparatus, a storage method thereof, and a display device using same.

Abstract: A common voltage generating circuit is applied to a liquid crystal display circuit and includes M common voltage generating sub-circuits. The liquid crystal display circuit includes a data-driving chip, a row-driving chip, a thin film transistor (TFT) array, and a liquid crystal unit array corresponding to the TFT array. The row-driving chip is used to for opening the TFT array row-by-row through scanning lines. The data-driving chip is used for charging one row of the liquid crystal unit corresponding one row of TFT through data lines. N input terminals of a first common voltage generating sub-circuit respectively connect with adjacent N data lines output from the data-driving chip, an output terminal of the first common voltage generating sub-circuit connects with a common terminal of the liquid crystal unit corresponding to the N data lines, N is an even number.

Abstract: A scan driver may include a first stage, a second stage, and a third stage. The first stage may include a first output transistor. The first output transistor may have a first buffer value. The second stage may be electrically connected to the first output transistor and may include a second output transistor. The second output transistor may have a second buffer value. The third stage may be electrically connected to the second output transistor and may include a third output transistor. The third output transistor may have a third buffer value. At least one of the second buffer value and the third buffer value may be unequal to the first buffer value.

Abstract: A display device and a data compensating method thereof are disclosed. The display device includes: a liquid crystal display panel having a plurality of pixels; a color temperature compensation unit configured to determine a color temperature at each position of a light guide plate using a thermal conductivity of the light guide plate and a color temperature at a reference position of the light guide plate, and determine a color temperature compensation value at positions of the light guide plate using the color temperature; and a timing controller configured to correct at least one of an R gain value and a B gain value of the image data using the color temperature compensation value.

Abstract: A display device may include the following elements: a first color filter, which has a first color; a first pixel electrode, which overlaps the first color filter and includes a first stem electrode and a first branch electrode, wherein the first branch electrode is oriented at an acute angle with respect to the first stem electrode; a second color filter, which has a second color different from the first color; and a second pixel electrode, which overlaps the second color filter, immediately neighbors the first pixel electrode, and includes a second stem electrode and a second branch electrode, wherein the second stem electrode is aligned with the first stem electrode, and wherein a shape of a combination of the second stem electrode and the second branch electrode is a mirror image of a shape of a combination of the first stem electrode and the first branch electrode.

Abstract: A technique of suppressing variations in property changes of switching elements in drive circuits provided for each gate line to reduce display performance degradation is provided. An active-matrix substrate includes: a plurality of drive circuits (11) provided in a display region for each gate line, for switching the gate line to a selected state; and a signal supply unit (12g) for supplying control signals (GCK1, GCK2, CLR, VSS) to each of the plurality of drive circuits for each gate line. The drive circuits (11) each include a plurality of switching elements that are turned on or off in response to the control signals.

Abstract: An apparatus for detecting an afterimage candidate region includes: a comparison unit which compares gradation data of an n-th frame with integrated gradation data of an (n?1)-th frame and generates integrated gradation data of the n-th frame, where n is a natural number; a memory which provides the integrated gradation data of the (n?1)-th frame to the comparison unit and stores the integrated gradation data of the n-th frame; and an afterimage candidate region detection unit which detects an afterimage candidate region based on the integrated gradation data of the n-th frame, where each of the integrated gradation data of the n-th frame and the integrated gradation data of the (n?1)-th frame comprises a comparison region and a gradation region.

Abstract: A scanning circuit, a display device and a method for driving a scanning circuit are disclosed. The scanning circuit includes: a shading module, a control terminal of the shading module being electrically connected to a control signal output terminal of a control module and the shading module being configured to generate a shading voltage signal according to a clock control signal inputted to its control module; and a scanning module, a control terminal of the scanning module being electrically connected to the control signal output terminal of the control module and an input terminal of the scanning module being electrically connected to an output terminal of the shading module. The scanning module is configured to output a scanning signal with shading according to the clock control signal and the shading voltage signal.

Abstract: A display panel driving unit can include: a timing controller to supply a power on reset signal for starting a sensing operation for pixel compensation during a sensing period before displaying an image; a power management integrated circuit (PMIC) to supply a high level reference voltage reset signal to the timing controller, and generate a control signal; and a control circuit to receive the high level reference voltage reset signal and the PMIC, in response to the high level reference voltage reset signal transitioning from a high to low logic level and then from the low logic level back to the high logic level, shift the power on reset signal to transition from a high to low logic level and then from the low logic level back to high, to follow the high level reference voltage reset signal, and supply the power on reset signal to the timing controller.

Abstract: A fault-tolerant display system includes a TFT panel, a first driver couplet including a first gate driver and a first source driver, and a second driver couplet including a second gate driver and a second source driver. The first gate driver and the second gate driver feed into the LCD panel from opposite directions and the first source driver and the second source driver feed into the LCD panel from opposite directions. The first driver couplet and the second driver couplet each have their own independent power supplies, independent from one another. In this way, individual pixels of the LCD panel are driven simultaneously by two pairs of source drivers and gate drivers, such that if one of the driver pairs fails due to some fault, the other driver pair can continue to drive the LCD panel without loss of information despite the failure of the one driver pair.

Abstract: A method of driving a display panel includes providing a positive polarity data signal to a first data line during an odd-numbered frame, and providing a negative polarity data signal to the first data line during an even-numbered frame. The positive polarity data signal has a first polarity. The negative polarity data signal has a second polarity. Output timing of the positive polarity data signal is different from output timing of the negative polarity data signal.

Abstract: Electric power that a display device consumes in reversal of polarity is reduced. A display control section (3) includes: a refresh rate detecting section (31) which detects a refresh rate of a display device (100 or 200); and a polarity reversal control section (32 or 33) which controls reversal of polarity so as to be carried out at a frequency lower than the refresh rate.

Abstract: Embodiments of this disclosure provide a gate driving circuit, a driving method thereof, a display panel and a display device. The gate driving circuit comprises: a corner cutting circuit and a scanning circuit. The corner cutting circuit is configured to output a corner cut voltage signal, wherein the corner cut voltage signal comprises a pulse whose edge is smoothed. The scanning circuit is configured to output a corner cut scanning signal based on the corner cut voltage signal, wherein the corner cut scanning signal comprises a pulse whose edge is smoothed.

Abstract: An electronic device may generate content that is to be displayed on a display. The display may have an array of pixels each of which includes subpixels of different colors. The content that is to be displayed on the display may include an object such as a black object that is moved across a background. Due to differences in subpixel values in the background for subpixels of different colors, there is a potential for color motion blur to develop along a trailing edge portion of the object as the object is moved across the background. The electronic device may have a blur abatement image processor that processes the content to reduce color motion blur. The blur abatement image processor may identify which pixels are located in the trailing edge and may adjust subpixel values for pixels in the trailing edge.

Abstract: A microscope includes: a stage on which a specimen is placed; an illumination optical system that includes a monochromatic light LED chip and a phosphor filter, which is arranged to be insertable and removable on and from an illumination optical path and is excited by light having a specific wavelength band irradiated from the monochromatic light LED chip to emit fluorescence having a longer wavelength relative to the light, the illumination optical system being configured to irradiate the specimen with illumination light; and an observation optical system that includes an absorption filter which is insertable and removable on and from an observation optical path and selectively takes fluorescence having a predetermined wavelength from the fluorescence emitted from the specimen.

Abstract: The display driving circuit according to an embodiment of the present disclosure includes a characteristic collector, a comparator, a timing controller and a gate driver.

Abstract: A vehicle display device includes an image display device and a frame member. The image display device is disposed in front of a driver in a vehicle and displays an image. The frame member is disposed on a driver side of the image display device and surrounds a part of an image display region in the image display device. When displaying a new image in a surrounding of the frame member, the image display device displays the new image from an edge of the frame member in a slide-in manner.

Abstract: A k-th driving stage includes a first pull-down transistor. The first pull-down transistor includes a first control electrode receiving a second control signal activated after the k-th gate signal is output, a second control electrode receiving the switching signal synchronized with a clock signal, an input electrode receiving a first discharge voltage, and an output electrode connected to the output electrode of the first output transistor.

Abstract: The invention provides a circuit for processing a gate voltage signal supplied for a liquid crystal display device. The circuit includes an input-output circuit and a control circuit. The input-output circuit receives the gate voltage signal. The control circuit receives a control signal and is subjected to the control of the control signal to make the input-output circuit to output first through fourth output signals in first through fourth time segments respectively during each period based on the gate voltage signal. In the circuit for processing a gate voltage signal supplied for a liquid crystal display device according to any one exemplary embodiment of the invention, the gate voltage signal can be changed to be different values in different time segments of each period so as to decrease voltage dropping speed of the gate voltage signal, impact on a reference voltage of the liquid crystal display device is reduced.

Abstract: The present disclosure relates to a driving circuit and a driving method of liquid crystal panels. The driving circuit includes a timing control chip receiving video signals and analyzing frame turn-on signals and column data voltage signals corresponding to a needed grayscale, calculating a pre-charge time period needed for the subpixels to be displayed in a real-time manner and obtaining pre-charge control signals in accordance with the pre-charge time period. The driving circuit also includes a scanning driving circuit receiving the frame turn-on signals and generating the row-scanning-driving voltage signals, overlapping the pre-charge control signals and the row-scanning-driving voltage signals to obtain the row-scanning-driving signals, and transforming the row-scanning-driving signals into row-scanning-driving voltage, then transmitting the row-scanning-driving voltage to a corresponding scanning line.

Abstract: According to one embodiment, a display device includes a first substrate including a first insulative substrate, an outer peripheral wiring formed above the first insulative substrate, an insulation film disposed on the outer peripheral wiring, a pixel electrode formed on the insulation film in an active area for displaying an image, and a first bank formed in a line shape on the insulation film in a peripheral area surrounding the active area, a second substrate including at least a second insulative substrate, and a sealant which is provided in a manner to envelop the first bank, and which attaches the first substrate and the second substrate.

Abstract: Provided is a display device causing less noise on a signal. A display device (10) includes a plurality of signal lines (SL), a plurality of gate lines (GL), and a driving unit. The plurality of gate lines crosses the plurality of signal lines. The driving unit is connected to the plurality of gate lines and controls a potential of each of the gate lines. The driving unit includes a plurality of gate drivers (11) and a plurality of lines. The gate drivers are disposed in a display region, and at least one of the gate drivers is connected to each of the gate lines. The lines are each provided with a potential for operation of one of the gate drivers. Each of the lines crosses one of the signal lines. The plurality of lines includes a first line (17A) and a second line (17B). The driving unit switches a potential of the first line at predetermined timing.

Abstract: To reduce the parasitic capacitance of a driving circuit and definitely switches a gate line to a selection state, an active matrix substrate is provided. The active matrix substrate includes a driving circuit that switches a gate line (13G) to a selection state in a pixel region defined by a source line (15S) and the gate line (13G). The driving circuit includes: a plurality of switching elements including an output switching element (TFT-F) that supplies a selection voltage to the gate line; and an internal line (netA) to which a gate terminal of the output switching element (TFT-F) and at least a first switching element of the switching elements other than the output switching element are connected. The active matrix substrate includes a reduction part (C1 and C2) that reduce the parasitic capacitance of the driving circuit in the pixel region in which at least one of the internal line and the first switching element is located.

Abstract: A variable Vcom level generator circuit generates a variable Vcom voltage level. A variable Vcom voltage can be used for variable refresh rate display technology to prevent flicker on a display panel. The Vcom level can be changed based on the vertical frequency being used or can be changed based on external control signals.

Abstract: A buffer circuit, a display module, and a display driving method are disclosed. The buffer circuit comprises a positive polarity buffer, a negative polarity buffer. The positive polarity buffer receives a first supply voltage and a second supply voltage to output a positive reference voltage to a positive resistance string. The second supply voltage is less than the first supply voltage. The negative polarity buffer receives the second supply voltage and a third supply voltage to output a negative reference voltage to a negative resistance string. The third supply voltage is less than the second supply voltage.

Abstract: A frequency controlled electro-optical device includes a substrate having transparent conductive control sections patterned thereon to selectively control the optical state of an electro-optical layer. Each of the control sections are partially electrically isolated from each other by crack lines, which allows for electrical communication between adjacent/proximate control sections to occur. As such, an electrical control signal applied directly to one control section forms an electric field in that control section, and also induces an electrical field in adjacent control sections that are not in direct receipt of the control signal. Therefore, the number of electrical connections required for coupling to a driving circuit to operate the device is minimized, thereby allowing the device to be fabricated with reduced complexity and cost.

Abstract: An integrated circuit device includes: a timing information storage section that stores phase length information in correspondence with an index number; a waveform information storage section that stores waveform information related to a plurality of drive waveforms used in response to at least one display state; a timing control section that reads an index number included for each phase in the waveform information, reads phase length information corresponding to the index number from the timing information storage section, and sequentially generates a selection signal during a drive voltage application period corresponding to a plurality of phases; and a drive waveform selection section that selects a waveform value representing a drive voltage, out of a plurality of units of waveform information stored in the waveform information storage section, in accordance with the selection signal.

Abstract: A method for digital driving of an active matrix display with a predetermined frame rate is described. The display contains a plurality of pixels organized in a plurality of rows and a plurality of columns. The method includes representing each of the plurality of pixels of an image to be displayed within a frame by an n-bit digital image code. The method also includes dividing the image frame into sub-frames, which may be of substantially equal duration. Within each sub-frame, the method includes sequentially selecting at least one of the plurality of rows twice. Upon a first selection, a first digital code is written to the selected row and upon a second selection a second digital code is written to the selected row. There is a predetermined time delay between the second selection and the first selection. Digital driving circuitry is also described.

Abstract: An emission driver and a display device having the same are disclosed. In one aspect, the emission driver includes a plurality of stages each configured to output an emission control signal, wherein each of the stages includes first and second driving blocks and a buffer block. The buffer block is configured to selectively output an emission control signal so as to operate in a sequential emission mode or in a simultaneous emission mode, the stages being configured to sequentially output a plurality of the emission control signals in the sequential emission mode and substantially simultaneously output the emission control signals in the simultaneous emission mode. The buffer block is further configured to determine a duration in which the emission control signal has a first voltage level based on an interval between time points when first and second intermediate signals have low voltage levels.

Abstract: An object of the present invention is to provide a display device which suppresses power consumption as well as displaying an image with excellent quality. A display device (1) in accordance with one aspect of the present invention includes a polarity determining section (35) for determining whether or not a first polarity in a drive vertical period immediately preceding a first term in which an image is not rewritten is the same as a second polarity in a pause vertical period which is a last pause vertical period before the second vertical period, and a refresh control section (34) for providing an additional vertical period in the first term in a case where the first polarity is the same as the second polarity.

Abstract: Embodiments of the present disclosure relate to a technical field of display technology, and provide a driving method for a pixel circuit and a driving device thereof. A problem of cost increase can be solved which is caused by an increase in a number of storages when adjustment is made by way of Gamma curve and table lookup, by means of the technical solutions according to embodiments of the present disclosure. The driving method of the pixel circuit includes acquiring brightness information of a display screen in a light-emitting phase (S101); determining a duty cycle of a pulse signal according to the brightness information (S102); inputting a high level to the first voltage terminal, and inputting the pulse signal with the duty cycle to a gate of the first switching transistor by the first gate line (S103).

Abstract: An image display control unit in a three-dimensional image display apparatus is configured to drive gate lines and the data lines so as to provide the display panel with a left eye image signal during a first frame in which a right eye image signal is displayed on the display panel, and with the right eye image signal during a second frame in which the left eye image signal is displayed on the display panel. During the first frame, each of the pixels provides a second capacitor with the right eye image signal, and a first capacitor with the left eye image signal. During the second frame, each of the pixels provides the first capacitor with the right eye image signal, and the second capacitor with the left eye image signal. A backlight unit maintains a turn-on state during the first and second frames.

Abstract: A display device is disclosed. In one aspect, the display device includes a display panel divided into first and second display parts. The display device also includes a first driving circuit configured to receive a driving voltage, generate a first gamma reference voltage based on the driving voltage, generate a first data signal based on the first gamma reference voltage, and apply the first data signal to the first display part. The display device further includes a second driving circuit configured to apply a second data signal to the second display part and a first share line disposed on the display panel. The first share line is configured to receive the first gamma reference voltage. The second driving circuit is further configured to receive the first gamma reference voltage from the first share line and generate the second data signal based on the first gamma reference voltage.

Abstract: A scanning line drive unit selects a plurality of scanning lines in order, and controls the operation of a thin-film transistors. A timing control unit controls the scanning line drive unit on the basis of a display signal that includes a horizontal synchronization signal, a vertical synchronization signal, and an image signal. The timing control unit is provided with: a first terminal to which the display signal is input; a second terminal to which a sub-synchronization signal, which is a signal other than the horizontal synchronization signal and the vertical synchronization signal, is input; and a notification unit that outputs a notification signal in a case where a period while only the sub-synchronization signal, among the horizontal synchronization signal, the vertical synchronization signal, and the sub-synchronization signal, is input is longer than a prescribed period.

Abstract: Embodiments of the invention provide a gate drive apparatus and a display apparatus. With the gate drive apparatus, a clock signal is used in place of a forward scan signal and/or a clock signal is used in place of a backward scan signal and/or a reset signal and a first initial trigger signal (or a second initial trigger signal) are used in place of a low level signal and/or the same signal is used as a first initial trigger signal and a second initial trigger signal to thereby reduce the number of transmission lines for signals driving the gate drive apparatus.