Abstract: In a display driver, image data are assembled with synchronization information to form a stream of digital data. The stream of digital data is transmitted from a timing controller to a data driver along with a timing signal having phase-delayed pulses obtained from an external clock received by the timing controller. In response to the timing signal, the data driver can extract a synchronizing signal from the synchronization information embedded in the stream of digital data, and use the synchronizing signal for generating an internal clock signal. Encoded image data in the stream of digital data then can be retrieved according to the internal clock signal.

Abstract: A system and method for driving a three-dimensional liquid crystal display (3D LCD) device, uses a target frequency, where the target frequency is double of a monocular frequency of an input picture of the 3D LCD device, and the monocular frequency is in the range of 62-118 Hz. The system and method converts a frame rate of the input picture of the 3D LCD device into (62 Hz-118 Hz)×2, and monocular frequency through the 3D glasses is in the range of 62 Hz-118 Hz.

Abstract: A gate driving circuit and a display, the gate driving circuit comprises a plurality of shift register connected in cascade. The shift register comprises: a signal outputting circuit (32), a signal inputting circuit (31), an inverting circuit (33) and a logic circuit (33). The signal outputting circuit (32) receives a forward direction clock signal from an external circuit and comprises a clock transistor and a level transistor. The signal outputting circuit outputs the forward direction clock signal when the clock transistor is turned on and outputs a constant-low level signal when the level transistor is turned on. The signal inputting circuit (31) receives an output signal from a previous shift register, and turns on the clock transistor when the received output signal of the previous shift register is valid.

Abstract: A method of driving a display device includes sub-sampling an original image signal. The method further includes generating a sub-image signal, generating a sub-interpolated image signal from the sub-image signal, and generating an interpolated frame by realigning the sub-interpolated image signal. An image having the interpolated frame is then displayed.

Abstract: An LCD monitor capable of automatically switching display mode, the corresponding control method and the controller for controlling the LCD monitor are provided. The LCD monitor includes a digital signal receiver, a signal certification unit, an image processor, and an LCD panel. The digital signal receiver receives a digital image signal. The signal certification unit which is coupled to the digital signal receiver determines if the digital image signal conforms to a protocol and generates a control signal. The image processor which is coupled to the digital signal receiver and the signal certification unit determines the display mode of the LCD monitor according to the control signal and processes the digital image signal according to the display mode to generate an output image signal. The LCD panel which is coupled to the image processor displays the image contents of the output image signal.

Abstract: A shift register unit, a gate driving circuit and a display apparatus are disclosed. The shift register unit includes a first TFT (T1) having a first electrode connected to an input terminal and a gate connected to a second clock signal input terminal; a second TFT (T2); a third TFT (T3) having a second electrode connected to an output terminal, a first electrode connected to a first clock signal input terminal, and a gate connected to the second electrode of the first TFT; a fourth TFT (T4); a fifth TFT (T5) having a gate connected to the second clock signal input terminal, a first electrode connected to the output terminal and a second electrode connected to the low potential connecting terminal; a capacitor (C1), and thus the burrs and miscellaneous spikes in a gate driving waveform outputted by the circuit can be suppressed well.

Abstract: An embodiment of the present invention provides a display device which prevents effective voltages applied to liquid crystal from differing between positive and negative polarities, even when a generation timing of a timing signal is shifted. In at least one example embodiment, a driving signal has an electric potential waveform where one frame period is made up of first period, second period, third period, and fourth period. In first frame, each of a Low level in the first period and a Low level in the third period is lower in electric potential than a Low level in the second period. In second frame, each of a High level in the first period and a High level in the third period is higher in electric potential than a High level in the second period.

Abstract: This disclosure relates to a method for driving an AC type plasma display panel. According to this disclosure, an elapse time period between an end time point of ramp-down and a time when a first scan pulse is applied is maintained to be uniform even when a ramp-down slope is different in such a manner that a comparator of a scan electrode driving circuit compares an output voltage with a reference voltage and a logic control circuit outputs a control signal to a logic control circuit when the output voltage is equal to the reference voltage. Accordingly, the method for driving the AC type plasma display panel is capable of improving an address characteristic and a driving margin.

Abstract: In one aspect of the invention, a method of driving an OLED display includes providing scan signals and data signals and applying the scan signals to scan lines and the data signals to the data lines, respectively. Each scan signal is characterized with a waveform having a compensation duration and a scan duration immediately following the compensation duration. The waveform has a first voltage and a second voltage periodically and alternately varied from one another defining a period in the compensation duration, and has the first voltage in the scan duration. The period is equal to the scan duration but shorter than the compensation duration. As such, during the compensation duration of a scan signal, pixels of a corresponding pixel row are charged for compensation, and during the scan duration, the data signals are written into the pixels of the corresponding pixel row for driving the OLEDs thereof.

Abstract: An exemplary image displaying method for a display device includes steps of: providing display data to pixels of the display device for displaying images; taking a special amount of frame of images as an image group, making polarities of a same pixel being of adjacent two frame of images in the image group and using a same polarity inversion in the adjacent two frame of images be different from each other, and making polarities of a same pixel being of the last frame of image in a former one of adjacent two image groups and of the first frame of image in a latter one of the adjacent two image groups and using the same polarity inversion in the last and first frame of images be the same with each other.

Abstract: The method comprises, in addition to emission periods, depolarization periods during which a predetermined depolarization voltage, which exhibits a polarity opposite to the polarity opposite to the voltage applied during the emission periods, is applied and sustained at the control terminal of said driver circuits of the panel, and a reference depolarization voltage, which is different from the reference emission voltage, is applied to the reference electrodes to which reference terminals of the driver circuits are linked. This method makes it possible to use conventional and inexpensive column control means.

Abstract: An LC barrier panel of a stereoscopic image display device has a substrate on which first barrier pixels and second barrier pixels are alternately arranged in a vertical direction and on which the first barrier pixels and third barrier pixels are alternately arranged in a horizontal direction. On a counter substrate, a counter electrode is formed to cover the entire surface of the display region. The third barrier pixels and the counter electrode are supplied with the same drive signal while an effective voltage is applied between the counter electrode and the first and second barrier pixels to perform vertical stripe display. Alternatively, the second barrier pixels and the counter electrode are supplied with the same drive signal while an effective voltage is applied between the counter electrode and the first and third barrier pixels to perform horizontal stripe display.

Abstract: In a plasma display apparatus, the address discharge is stabilized, the contrast is sharpened, and the image display quality is improved. A first up-ramp waveform voltage is applied to the scan electrode, and then a voltage causing no discharge to the scan electrode is applied to the scan electrode, in the sustain period of a weak-discharge sustain operation subfield in a discharge cell that is to be subjected to a forced initializing operation in the initializing period of the subfield immediately after the weak-discharge sustain operation subfield. A second up-ramp waveform voltage is applied to the scan electrode after generation of the first up-ramp waveform voltage, in the sustain period of the weak-discharge sustain-operation subfield in a discharge cell that is to be subjected to a selective initializing operation in the initializing period of the subfield immediately after the weak-discharge sustain-operation subfield.

Abstract: A display device including a voltage generator is disclosed. The voltage generator includes an analog driving voltage generator to convert a source voltage from an external source to an analog driving voltage and to output the analog driving voltage through an output terminal, a capacitor connected between the output terminal and a ground voltage node, and a discharge circuit connected between the output terminal and the ground voltage node to discharge a current at the output terminal in response to a blank synchronization signal.

Abstract: Disclosed is a display apparatus including two scanning circuits of the same configuration and layout, arranged on either sides of the display part. As long as one of the scanning circuits is in operation, the other scanning circuit is in a state in which no output signal is output.

Abstract: A gate driver includes: a scan signal output circuit for performing alternately scanning whereby either odd-numbered scan signal lines or even-numbered scan signal lines are sequentially driven and scanning whereby the remaining scan signal lines are sequentially driven; a rise counter circuit for sensing the rise count for a clock signal in a HIGH level period of an externally supplied start signal; a scan sequence setup circuit for setting up a scan sequence to be followed by the scan signal output circuit according to the rise count; and a start signal generating circuit for generating a start signal to be supplied to a next scan signal line driver circuit. Hence, the resultant scan signal line driver circuit and method thereof is capable of producing high quality images at low cost while restricting power consumption and heat generation by a data signal line driver circuit.

Abstract: The present invention discloses a method of driving a 3D LCD. The 3D LCD includes N data lines and 2M scan lines. The driving method includes that scanning two adjacent scan lines of 2M scan lines once a time in order in a first scanning period while outputting data correspondent to a first frame to the N data lines, and turning even number of the 2M scanning lines on in order in a second scanning period while outputting data of a second frame to the N data lines, wherein the first frame is for user's one eye, and the second frame is for user's the other eye.

Abstract: The present disclosure provides a polarity inversion signal converting method, a polarity inversion signal converting apparatus and a display, the polarity inversion signal converting method comprises: judging whether a polarity inversion signal is required to be converted currently and generating a judgment result; changing the polarity inversion signal currently output to a data driver, if the judgment result indicates that the polarity inversion signal is required to be converted currently. With the present disclosure, the polarity inversion signal output to the data driver may be changed according to different situations, so that the driving manners of the data driver may vary flexibly.

Abstract: Disclosed is a system and method for correcting a gamma for shortening a gamma correction time period and improving gamma correction efficiency and reliability thereof, and simplifying a gamma correction device for reducing a production cost of image display devices.

Abstract: In a display device, a line inversion driving chip inverts an image data to a data voltage having a positive polarity and a data voltage having a negative polarity based on positive and negative gammas alternately applied at every period, and alternately outputs a first data voltage having a first polarity and a second data voltage having a second polarity at a period less than or equal to a 1H period. A display panel includes a plurality of pixels receiving the first and second data voltages from the line inversion driving chip to display an image. Each pixel row includes first and second pixel groups receiving the first and second data voltages, respectively, and the first and second pixel groups are alternately arranged in each pixel row. Thus, the display device may be driven in a dot inversion method.

Abstract: A method is provided for driving a plasma display panel having parallel first and second electrodes, third electrodes crossing the first and second electrodes, and discharge cells with electrodes crossing mutually in the form of a matrix. The method includes a reset period during which distribution of wall charges in the discharge cells is uniformed, an addressing period during which wall charges are produced in the discharge cells according to display data, and a sustain discharge period during which sustain discharge is induced in discharge cells in which wall charges are produced during the addressing period. The driving method includes during the reset period, in lines defined by the first and second electrodes, applying a first pulse, in which an applied voltage varies with time to induce first discharge, and applying a second pulse in which an applied voltage varies with time to induce second discharge as an erase discharge.

Abstract: A level shifting device is disclosed. The device includes an input unit, a control unit, a high level generating unit, a low level generating unit and an output unit. The input unit generates a level selection signal and a plurality of output selection signals by sampling serial input data. The control unit selectively generates a high level activation signal or a low level activation signal based on the input data, and generates a switching signal based on the input data. The high level generating unit generates a high level output signal in response to the high level activation signal, and the low level generating unit generates a low level output signal in response to the low level activation signal. The output unit outputs one of the high level output signal and the low level output signal to each of a plurality of output signals in response to the switching signal.

Abstract: A method is provided of driving an electronic device comprising an array of device elements, each device element comprising particles which are moved to control a device element state, and each device element comprising a collector electrode, and an output electrode. The method comprises: in a reset phase, applying a first set of control signals to control the device to move the particles to the a reset electrode; and in an addressing phase, applying a second set of control signals to control the device to move the particles from the reset electrode such that a desired number of particles are at the output electrode.

Abstract: A display control device includes an image data generating section and a control section. The image data generating section is configured to perform generation processing for generating image data in a predetermined processing sequence for each of a plurality of predetermined data units of the image data. The control section is configured to control a display unit to execute display processing based on the image data in the processing sequence for each of the predetermined data units. The control section is configured to control the display unit so that the longer a first time relating to the generation processing for one of the predetermined data units of the image data is, the longer a second time until the display processing starts for the one of the predetermined data units of the image data is.

Abstract: A pixel circuit and an organic light-emitting diode (OLED) display using the pixel circuit is provided. The pixel circuit includes: an OLED; a third N-channel metal-oxide semiconductor (NMOS) transistor coupled to a data line and a first scan line and configured to apply a data signal to a first node; a storage capacitor having one terminal coupled to the first node and the other terminal coupled to a second node; a fourth NMOS transistor coupled between a first power and the second node and configured to apply a voltage of the first power to the second node; a first NMOS transistor having a first electrode, a second electrode, and a gate electrode coupled to the second node; and a second NMOS transistor coupled between the second node and the first electrode of the first NMOS transistor and configured to diode-connect the first NMOS transistor.

Abstract: A liquid crystal display device (1) according to one embodiment of the present invention includes a timing controller (4) which, (i) in a first display mode, in which a number of tones that each pixel is capable of displaying is smaller than a predetermined number, controls a scanning signal and a data signal by an interlace driving method, by which a single frame includes a plurality of fields, and (ii) in a second display mode, in which the number of tones that each pixel is capable of displaying is equal to or greater than the predetermined number, controls the scanning signal and the data signal by a progressive driving method.

Abstract: A gate driver of on embodiment of the present invention includes: a scan signal output circuit for performing alternately scanning whereby either odd-numbered scan signal lines or even-numbered scan signal lines are sequentially driven and scanning whereby the remaining scan signal lines are sequentially driven; a rise counter circuit for sensing the rise count for a clock signal in a HIGH level period of an externally supplied start signal; a scan sequence setup circuit for setting up a scan sequence to be followed by the scan signal output circuit according to the rise count; and a start signal generating circuit for generating a start signal to be supplied to a next scan signal line driver circuit. Hence, the resultant scan signal line driver circuit and method of driving a display device is capable of producing high quality images at low cost while restricting power consumption and heat generation by a data signal line driver circuit.

Abstract: Disclosed herein is a semiconductor integrated circuit including a power supply line drive circuit configured to drive power supply lines connected to pixels that are arranged in a matrix on a self-luminous display panel.

Abstract: The invention relates to a method of driving an electrowetting display which includes a plurality of electrowetting elements, the display comprising at least one first fluid and a second fluid immiscible with each other, each of the electrowetting elements comprising at least one surface area. In a first, relatively low voltage, driving state of an electrowetting element the second fluid tends to cover the at least one surface area, and in a second, relatively high voltage, driving state of an electrowetting element the first fluid tends to cover the at least one surface area.

Abstract: A power control system includes a display module for displaying an image in accordance with image data, a DC-DC converter being external to the display module and for applying power to the display module, a host for generating a control signal for controlling the display module and outputting the control signal through a signal output pin of signal input/output pins of the host, and a connector connected to the signal input/output pins and for applying the control signal to the DC-DC converter and the display module. The DC-DC converter is adapted to apply power to the display module according to the control signal. Accordingly, the number of signal input/output pins of the connector can be reduced.

Abstract: This disclosure provides systems, methods and apparatus for driving a display array with a waveform having a plurality of voltage levels, wherein a first subset of the plurality of voltages is different from a second subset of the plurality of voltages by a defined amount. In one aspect, a display driver circuit comprises a power supply configured to generate the first subset of said plurality of voltages, and a charge pump having the first subset of the plurality of voltages as inputs and the second subset of the plurality of voltages as outputs. The charge pump may not include a switch between each output voltage and a corresponding capacitor.

Abstract: A method for making an electrowetting device includes: (a) forming a surrounding wall on an upper surface of a substrate to surround a microchamber, the surrounding wall having an inner surface surrounding the microchamber and a top surface above the inner surface, the upper surface of the substrate being non-hydrophobic; (b) coating the surrounding wall and the upper surface of the substrate with a hydrophobic coating material; (c) removing a portion of the hydrophobic coating material formed on the top surface of the surrounding wall, thereby exposing the top surface of the surrounding wall; and (d) disposing a liquid into the microchamber.

Abstract: A method of driving a display panel includes generating a gate on voltage, generating first and second gate off voltages based on an external voltage in a first operating mode, and first and second gate off voltages based on the gate on voltage in a second operating mode, generating a clock signal based on the gate on voltage and the second gate off voltage and outputting a gate voltage generated based on the clock signal and the first and second gate off voltages to a gate line of the display panel.

Abstract: A liquid crystal display device includes a liquid crystal panel, gate and data drivers providing the liquid crystal panel with gate and data signals, and a timing controller receiving input signals that include an image signal, a sync signal, a data enable signal and a clock signal, wherein the timing controller includes a gate control signal generator controlling the gate driver, a data control signal generator controlling the data driver, a data processor supplying the image signal to the data driver, and a vertical enable signal generator generating a vertical enable signal according to the data enable signal and controlling the gate control signal generator and the data control signal generator.

Abstract: A display apparatus employs a pixel array section including pixel circuits forming a matrix, signal lines as columns, scan lines as rows and power-supply lines, and driving sections. The driving sections are a signal selector, a write scanner and a drive scanner. The signal selector provides an electric potential representing a gradation or a predetermined reference electric potential. The write scanner provides a control signal. The drive scanner provides a power-supply voltage changing the electric potential from high to low. The drive scanner drives adjacent power-supply lines as a group. The number of lines as a group is determined in advance. The drive scanner switches a power-supply voltage from high to low and vice versa, and applies the voltage to groups by shifting the phase from group to group. The voltage is supplied to a group at the same phase and switched the electric potential.

Abstract: Waveforms for driving electro-optic displays, especially bistable electro-optic displays, are modified by one or more of insertion of at least one balanced pulse pair into a base waveform; excision of at least one balanced pulse pair from the base waveform; and insertion of at least one period of zero voltage into the base waveform. Such modifications permit fine control of gray levels.

Abstract: A stable address operation is performed also when a plasma display panel having a high definition and large screen is driven. For this purpose, a driving method of a plasma display panel is provided. The panel is driven by forming one field using a plurality of subfields each of which has an address period and a sustain period in which sustain pulses varying from a base potential to a voltage at which a sustain discharge is caused in the discharge cell having undergone the address discharge are applied to the display electrode pairs. In the driving method, after generation of the final sustain pulse in the sustain period, an up-ramp waveform voltage which increases from the base potential to a predetermined voltage is applied to the scan electrodes. The predetermined voltage is set lower than the voltage of the sustain pulses.

Abstract: A circuit that transfers data between a first clock domain using a first clock and a second clock domain using a second clock synchronized with the first clock. The circuit comprises a data holding circuit operating at the first clock, an enable signal generation circuit connected to the data holding circuit. Preferably, the data transfer circuit includes an edge signal generation circuit connected to the data holding circuit, the edge signal generation circuit generating an edge signal allowing the data holding circuit to receive and send the data when edges of the first clock and the second clock align, and applying the edge signal to the data holding circuit.

Abstract: A liquid crystal display apparatus includes a first group of pixel electrodes having a first parasitic capacitance, a second group of pixel electrodes having a second parasitic capacitance, a common electrode, liquid crystal interposed between the common electrode and the first and second groups of pixel electrodes, respectively, and a driver circuit determining a first common voltage in accordance with the first parasitic capacitance and supplying the first common voltage to the common electrode during a writing period of the first group of pixel electrodes so as to substantially offset a voltage drop in the second group of pixel electrodes due to the first parasitic capacitance, the driver circuit determining a second common voltage in accordance with the second parasitic capacitance and supplying the second common voltage to the common electrode during a writing period of the second group of pixel electrodes so as to substantially offset a voltage drop in the second group of pixel electrodes due to the sec

Abstract: An auxiliary capacitor line driving circuit (5), provided in a surrounding region located around a display region (R1) in a liquid crystal display panel, generates auxiliary capacitor driving signals, and includes: first and second voltage trunk lines (VCS1, VCS2) which carry two different voltages, respectively; at least one control signal line (VCTRL1, VCTRL2) carrying one control signal; and a plurality of TFTs (T1, T2, T3, T4) each alternately supplying, to the respective auxiliary capacitor lines (CSn, CSn+1, and the like) in a given cycle, the two different voltages supplied to the auxiliary capacitor line driving circuit (5). Therefore, a liquid crystal display device employing multi-picture element drive method can be provided as a liquid crystal display device that achieves narrowing of a picture frame region as a non-display region and an external circuit board.

Abstract: A voltage of sustain electrodes is lowered from Ve1 to a ground potential at a time point immediately before a first SF (sub-field). Then, a pulsed positive voltage is applied to data electrodes at a starting time point of a setup period of the first SF. Immediately before this, a large amount of negative wall charges is stored on the sustain electrodes and positive wall charges are stored on the data electrodes, and therefore application of the pulsed positive voltage to the data electrodes generates strong discharges between the sustain electrodes and the data electrodes. After that, application of a ramp voltage to scan electrodes is started at a time point, generating setup discharges between the scan electrodes and the sustain electrodes.

Abstract: An emissive type display device includes: a pixel array section having pixels ready for an active matrix driving system; a circuit for setting a peak luminance level of each display frame; and a driving circuit for variably controlling a total application period length of a driving voltage applied to a power supply line connected to each pixel and amplitude of the driving voltage so as to obtain a set peak luminance level, when the set peak luminance level is lower than a set value, the driving circuit dividing the driving voltage into a plurality of times of pulse waveform, and variably controlling the amplitude of the driving voltage at each output time according to the peak luminance level such that the amplitude of the driving voltage at least one output time is lower than a maximum driving voltage in a non-emission period.

Abstract: The general field of the invention is that of display devices including a liquid-crystal matrix screen composed of elementary pixels, said screen including at least a first electrode used as voltage reference and called the “backplane,” a second electrode in the form of a matrix electronic network delivering the drive voltages for controlling the pixels and control electronics for said electrodes, said screen being used in the so-called “normally black” mode, that is to say that in the absence of applied voltages, the optical transmission of the pixels is substantially zero. In the device according to the invention, the “backplane” drive voltage is a variable periodic voltage, the amplitude of variation of this voltage being sufficient so that in the absence of voltage on the second electrode, the optical transmission of the pixels is sufficient to be detected by an observer.

Abstract: A driving circuit of an electrooptic device comprises: a plurality of scanning lines; a plurality of data lines; first and second capacitor lines; a common electrode; pixels, the pixels each including: a pixel switching element; a pixel capacitor; and a storage capacitor; a scanning-line driving circuit; and a capacitor-line driving circuit that shifts the voltage of a first (or second) capacitor line corresponding one scanning line to a predetermined voltage when said one scanning line is selected, and when a scanning line apart from said one scanning line by predetermined number of lines is selected, changes the predetermined voltage by a predetermined value or holds the predetermined voltage; and when said one scanning line is selected; and a data-line driving circuit.

Abstract: A gate modulation circuit is provided. A comparator compares a triangular wave voltage of a capacitor with a second reference voltage. If the triangular wave voltage of the capacitor exceeds the second reference voltage, a conduction path is turned off. A comparator controls desired discharge to a capacitor through a discharge resistor. Based on the discharge, power voltage (high level power voltage of the scanning driver) provided to the scanning driver is modulated, and outputted from the gate modulation circuit to the scanning driver as high level power voltage of the scanning driver.

Abstract: A display device includes a plurality of pixel circuits arranged in a plurality of rows and columns, a plurality of scan lines, a plurality of data lines, a scan driver operable to drive the rows of the pixel circuits in sequence via the scan lines, and a data driver coupled to the columns of the pixel circuits via the data lines. The scan lines include first and second sets of scan lines alternately disposed with each other. For each of the first and second sets of the scan lines, adjacent scan lines have different circuit properties. The scan driver activates each of the scan lines for a respective activation time period according to the circuit property thereof.

Abstract: An emission control line driver includes even-numbered stages that are connected to even-numbered emission control lines, respectively, and are driven by a first clock signal, and odd-numbered stages that are connected to odd-numbered emission control lines, respectively, and are driven by a second clock signal, wherein each of the stages includes an input unit adapted to receive a control signal and an inverted control signal output from a previous one of the even and odd numbered stages or from an external source, the input unit being adapted to control voltages of a first node and a second node, a first output unit adapted to generate an emission control signal based on the voltages of the first node and the second node, and a second output unit adapted to generate an inverted emission control signal based on the voltages of the first node and the second node.

Abstract: A display clip system and a timing clip control method thereof are provided. The clip system is connected to a gate driver circuit, and includes a timing controller and a clip module. According to a system input signal and its frame rates, the timing controller generates an enable signal, a clip trigger signal, and a base working signal. The clip module adjusts the base working signal by using the enable signal and the clip trigger signal. Then, the base working signal carries a first clip voltage to output to the gate driver circuit. When the frame rate changes, the timing controller adjusts trigger points and trigger time lengths of the enable signal and the clip trigger signal, and the clip module adjusts the base working signal. Then, the base working signal carries a second clip voltage equal to the first clip voltage to output to the gate driver circuit.

Abstract: A timing controller includes a control unit, an error signal generating unit, and an operation detecting unit. The control unit transfers a plurality of input data and outputs a plurality of completion signals according to transfer states of the respective data. The error signal generating unit generates a plurality of error signals with different waveforms, and the operation detecting unit selectively outputs one of the plurality of error signals in response to the plurality of completion signals.

Abstract: The present invention comprises: a display unit having a plurality of pixels arranged therein, each pixel including an organic EL element 24, a switching TFT, and a drive TFT; a data signal drive circuit for receiving image data for each frame period and outputting an image signal based on the image data; a scanning signal drive circuit for outputting a scanning signal for controlling a timing at which the switching element of each of the plurality of pixels receives the image signal; and a current source (a light emission power supply unit and a cathode potential control circuit together) for outputting a current supplied to the light emitting unit of each of the plurality of pixels through its drive element; wherein the current source modulates the value of the output current within each frame period.