Abstract: A technique for executing commands for an accelerated processing device is provided. The technique includes obtaining an iteration number and predication data from metadata for an iterative indirect command buffer; for each iteration indicated by the iteration number, performing commands of the iterative indirect command buffer as specified by the predication data; and ending processing of the iterative indirect command buffer in response to processing a number of iterations equal to the iteration number.

Abstract: A dynamic link library loading method includes: when an identifier of a first dynamic link library is not in a list of loaded dynamic link libraries, allocating a handle to the first dynamic link library, and adding the identifier of the first dynamic link library and the handle allocated to the first dynamic link library to the list of the loaded dynamic link libraries; and when the first dynamic link library is an integrated dynamic link library, adding identifiers of one or more dynamic link libraries for integration and the handle allocated to the first dynamic link library to the list of loaded dynamic link libraries; and based on the handle allocated to the first dynamic link library, loading the first dynamic link library into a running memory of an electronic device.

Abstract: Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.

Abstract: Methods and graphics processing systems render items of geometry using a rendering space which is subdivided into a plurality of first regions. Each of the first regions is sub-divided into a plurality of second regions. Each of a plurality of items of geometry is processed by identifying which of the first regions the item of geometry is present within, and for each identified first region determining an indication of the spatial coverage, within the identified first region, of the item of geometry, and using the determined indication of the spatial coverage within the identified first region to determine whether to add the item of geometry to a first control list for the identified first region or to add the item of geometry to one or more second control lists for a respective one or more of the second regions within the identified first region.

Abstract: Aspects presented herein relate to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a plurality of primitives associated with one or more frames in a scene, a portion of the scene being associated with an upscaled sample space and/or a downscaled sample space. The apparatus may also perform a binning pass for the plurality of primitives, the binning pass being associated with an unscaled sample space, where the binning pass sorts each of the primitives into one or more bins associated with each of the one or more frames. Further, the apparatus may perform one of one or more rendering passes for each of the one or more bins. The apparatus may also rasterize each of the plurality of primitives based on at least one of the upscaled sample space or the downscaled sample space.

Abstract: A device for time-based multiplexing of a projection of a three-dimensional FIG. 1 image to increase its resolution includes a two-dimensional display comprising an array of pixels. An array of optical elements is placed in front of the pixels. The optical elements are structured to refract and configure into multiple parallel light beams, in a plurality of angles, light emitted from the pixels. An array of adjustable light deflecting devices is mounted in front of the pixels. Each of the adjustable light deflecting devices is structured to deflect the light emitted by the pixels. At least one controller is configured to (1) vary at least one of the intensity or color of light emitted by each of the pixels according to three-dimensional information set for display of a three dimensional image; and (2) change a deflection angle of the light deflecting devices during a period of image integration of the human visual system.

Abstract: Managing volumetric data, including: defining a view volume in a volume of space, wherein the volumetric data has multiple points in the volume of space and at least one point is in the view volume and at least one point is not in the view volume; defining a grid in the volume of space, the grid having multiple cells and dividing the volume of space into respective cells, wherein each point has a corresponding cell in the grid, and each cell in the grid has zero or more corresponding points; and reducing the number of points for a cell in the grid where that cell is outside the view volume.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes a normal display region and a special-shaped display region. A plurality of second pixel groups and second scan lines are sequentially disposed in the special-shaped display region. Each of the plurality of second pixel groups includes a plurality of rows of sub-pixels disposed along a first direction. The sub-pixels in each row are connected to the second scan lines in a corresponding row. The first scan lines are connected to the second scan lines to reduce a size of sub-pixels in each of the plurality of second pixel groups, increase a pixel density, and increase a display quality.

Abstract: The present disclosure is directed to a method to correct for visual artifacts in a virtual reality (VR) video image where there is significant motion of the video image as a result of user actions. A user may request that the video image be moved, such as a through motion detected through a VR device, i.e., turning the head, or through a request to an application, i.e., joystick feedback to a gaming application. The video image motion can cause stutter and jitter visual artifacts, when the video frame buffer uses a synchronization constraint, such as vertical synchronization (VSync). When the VSync is disabled, a tearing visual artifact can be present. This disclosure presents a frame buffer handling process that operates with VSync disabled. The process allows the display refresh rates to operate at higher frequencies, while correcting for significant motion of the video image, i.e., tearing, through shifting back certain pixels within the scanout frame buffer.

Abstract: When transparency information (T) is externally inputted along with RGB image data (DV1), the RGB image data (DV1) is converted to YUV image data (DV2) in YUV422 formal, and the transparency information (T) is added to information about a color-difference component U or V therein, thereby generating YUV image data (DV3) to be inputted to a signal processing portion (20). The signal processing portion 20 extracts the transparency information (T) and converts the YUV image data (DV2) to RGB image data (DV1). When the RGB image data (DV1) and the transparency information (T) are inputted to an LCD timing controller (30), the LCD timing controller 30 renders a liquid crystal display panel (90) transparent on the basis of the transparency information (T), thereby allowing background light to be transmitted therethrough, or when only the RGB image data (DV1) is inputted, the liquid crystal display panel (90) displays an image.

Abstract: In various implementations, a method includes obtaining a first frame that is characterized by a first resolution associated with a first memory allocation. In some implementations, the method includes down-converting the first frame from the first resolution to a second resolution that is lower than the first resolution initially defining the first frame in order to produce a reference frame. In some implementations, the second resolution is associated with a second memory allocation that is less than a target memory allocation derived from the first memory allocation. In some implementations, the method includes storing the reference frame in a non-transitory memory. In some implementations, the method includes obtaining a second frame that is characterized by the first resolution. In some implementations, the method includes performing an error correction operation on the second frame based on the reference frame stored in the non-transitory memory.

Abstract: A graphics system has a rendering space divided into a plurality of rectangular areas, each being sub-divided into a plurality of smaller rectangular areas of a plurality of pixels. Data is received representing a tiled set of polygons to be rendered in a selected one of the rectangular areas. For each polygon, a determination is made whether that polygon is located at least partially inside a selected one of the smaller rectangular areas in the selected rectangular area. If so, which pixels of the plurality of pixels in the selected smaller rectangular area are inside the polygon are identified. Or, if that polygon is not located at least partially inside the selected smaller rectangular area, no further processing of the polygon is performed at one or more of the plurality of pixels in the smaller rectangular area.

Abstract: An example system includes a first computing device comprising a first graphics processing unit (GPU) implemented in circuitry, and a second computing device comprising a second GPU implemented in circuitry. The first GPU is configured to perform a first portion of an image rendering process to generate intermediate graphics data and send the intermediate graphics data to the second computing device. The second GPU is configured to perform a second portion of the image rendering process to render an image from the intermediate graphics data. The first computing device may be a video game console, and the second computing device may be a virtual reality (VR) headset that warps the rendered image to produce a stereoscopic image pair.

Abstract: A method of processing an image includes tracking a gaze point of a user on a screen of a display device; determining sampling patterns for primitives forming a frame, respectively, based on a distances between the gaze point and the primitives; and rendering the primitives according to the sampling patterns determined for the primitives, respectively.

Abstract: An apparatus and method are described for providing low-latency invocation of accelerators. For example, a processor according to one embodiment comprises execution logic to execute a plurality of instructions including an accelerator invocation instruction to invoke one or more accelerator commands. The accelerator invocation instruction stores command data specifying the command within a command register. One or more accelerators read the command data from the command register and responsively attempt to execute the command identified by the command data. Upon a switch from a first context to a second context, an accelerator context save/restore pointer identifies a region within system memory where the accelerator is to save its state and later the accelerator context save/restore pointer aids in restoring its state upon returning to the first context.

Abstract: The introduction of an “out-of-memory” marker in the sorted tile geometry sequence for a tile may aid in handling out-of-memory frames. This marker allows hardware to continue rendering using the original data stream instead of the sorted data stream. This enables use of the original data stream allows the system to continue rendering without requiring any driver intervention. During the visibility generation/sorting phase, the number of memory pages required for storing the data for a rendering pass is continuously tracked. This tracking includes tracking the pages that are required even if the hardware had not run out-of-memory. This information can be monitored by a graphics driver and the driver can provide more memory pages for the system to work at full efficiency.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for optimizing a display list. Graphics processing commands are identified for generation of one or more graphical images on a computer device. During an initial recording of a graphics display list to include the graphics processing commands, if a sub-list of the display list is determined to not include any drawing commands, the display list is recorded so that commands on the sub-list are not executed when the display list is executed.

Abstract: A system, method, and computer program product are provided for evaluating an integral utilizing a low discrepancy sequence and a block size. In use, a low discrepancy sequence and a block size are determined. Additionally, an integral is evaluated, utilizing the low discrepancy sequence and the block size.

Abstract: A technique for enabling scenario files and image files for supply to a scenario generating device to be created easily is provided. The scenario creating device creates a scenario file supplied to a scenario reproducing device capable of reproducing only image files of a predetermined format. The scenario creating device comprises: an input section including a pointing device; a display section; and a scenario creating section for creating the scenario file. The scenario creating section provides a display of an execution icon on the display screen for causing the scenario creating section to execute a process. When a file icon for a source file of a predetermined format including pagewise scenario information and image information is dragged and dropped on the execution icon by means of operation of the pointing device, a scenario file is created on the basis of the scenario information, and an image file of the predetermined format is generated on the basis of the image information.

Abstract: A video encoder (70) for coding moving pictures comprising a buffer (16c) with a plurality of memory areas capable of storing frames composed of top fields and bottom fields, a motion estimation unit (19) operable to code, field by field, inputted pictures performing moving estimation and moving compensation by referring, field by field, to the picture data stored in a memory area, a motion compensation unit (16d), a subtractor (11), a transformation unit (13) and a quantization unit (14), a memory management unit (71) operable to manage, frame by frame, a plurality of memory areas, an inverse quantization unit (16a) and inverse discrete cosine transform unit (16b) operable to decode picture data in coded fields and store the picture data in the decoded field in any of the plurality of memory areas under the management by the memory management unit (71).

Abstract: A video encoder (70) for coding moving pictures comprising a buffer (16c) with a plurality of memory areas capable of storing frames composed of top fields and bottom fields, a motion estimation unit (19) operable to code, field by field, inputted pictures performing moving estimation and moving compensation by referring, field by field, to the picture data stored in a memory area, a motion compensation unit (16d), a subtractor (11), a transformation unit (13) and a quantization unit (14), a memory management unit (71) operable to manage, frame by frame, a plurality of memory areas, an inverse quantization unit (16a) and inverse discrete cosine transform unit (16b) operable to decode picture data in coded fields and store the picture data in the decoded field in any of the plurality of memory areas under the management by the memory management unit (71).

Abstract: A method and device are provided for performing tile based rendering. The method and device analyze past and current commands to determine when tiles are renderable independently of other tiles. In such cases, all rendering passes are performed successively without rendering other tiles in between.

Abstract: A system may include a memory that stores instructions and a processor to execute the instructions to create a first set of objects, describing a graphical scene, in a first data structure based on data relating to the graphical scene. The processor may create a second set of objects in a second data structure based on the first set of objects in the first data structure, where at least one object of the first set of objects is associated with at least one object of the second set of objects and one or more properties for an object of the second set of objects is based on information associated with the first data structure. The processor may modify the second set of objects and provide the modified second set of objects to a browser for rendering the graphical scene.

Abstract: Remote desktop servers include a display encoder that maintains a secondary framebuffer that contains display data to be encoded and transmitted to a remote client display and a list of display primitives effectuating updated display data in the secondary framebuffer. The display encoder submits requests to receive the list of drawing primitives to a video adapter driver that receives and tracks drawing primitives that, when executed, update a primary framebuffer.

Abstract: A system may include a processor and memory that stores instructions to cause the processor to create a first set of objects in a first structure based on first data, where the first set of objects describes a graphical scene specified by the first data. The processor may add a command for at least one object, of the first set of objects, to a composite command that includes commands for the graphical scene and create a second set of objects in a second structure based on the first set of objects in the first structure and the composite command. The processor may receive second data, change one or more objects of the first set of objects based on the second data, and change one or more objects of the second set of objects based on the changes to the one or more objects of the first set of objects. The processor may further provide the changed second set of objects to a browser for rendering a new graphical scene.

Abstract: There is provided a method and apparatus for managing memory in a system for generating 3-dimensional computer images. The image is subdivided into a plurality of rectangular areas. A memory is provided and a page of the memory is allocated for storing object data for objects in the image. Object data for objects in the image are then written to the allocated page of memory. Finally, a bit mask for the allocated page of memory is compiled, the bit mask indicating the rectangular areas having object data stored in the allocated page of memory. A rectangular area of the image can then be rendered by deriving data for display from the object data stored in the memory, for objects in that rectangular area. Once the rectangular area has been rendered, the bit mask for each page of memory which stored, before the step of rendering, object data for that rectangular area, is updated so that the bit mask no longer indicates that rectangular area.

Abstract: An apparatus configured to match an input frame rate of a video stream with an output frame rate of an output stream, the apparatus comprising, at least one memory buffer, an output frame generator, and a threshold measurement unit, the threshold measurement unit configured to generate a control feedback, wherein the box is configured to analyze the control feedback to monitor a state of the at least one memory buffer, the threshold measurement unit further configured analyze the control feedback to regulate between two or more different settings, wherein the two or more different settings include slowing down or speeding up the output frame, wherein the two or more different settings further include slowing down or speeding up of the line rate of the output stream.

Abstract: An information processing apparatus comprising: a reception unit adapted to receive a packet containing first data to be stored in a storage unit, a first address indicating an address of second data held in the storage unit, and a second address indicating an address at which the first data is to be written in the storage unit; an access unit adapted to read out the second data from the storage unit based on the first address, and write the first data in the storage unit based on the second address; and a transmission unit adapted to replace the first data of the packet received by the reception unit with the second data read out by the access unit, and transmit the packet.

Abstract: One embodiment of the present invention sets forth a technique for parallel distribution of primitives to multiple rasterizers. Multiple, independent geometry units perform geometry processing concurrently on different graphics primitives. A primitive distribution scheme delivers primitives from the multiple geometry units concurrently to multiple rasterizers at rates of multiple primitives per clock. The multiple, independent rasterizer units perform rasterization concurrently on one or more graphics primitives, enabling the rendering of multiple primitives per system clock.

Abstract: Memory management system and method for use with systems for generating 3-dimensional computer generated images are provided.

Abstract: A system includes a memory, a specialized processing unit and a processor. The processor receives data from a user and creates a first set of objects in a first structure based on the data. The system further creates, contemporaneously with the creation of the first set of objects and based on the first set of objects in the first structure, a second set of objects in a second structure, where the second set of objects is optimized for use by the specialized processing unit, and stores the first and second sets of objects in the memory. The specialized processing unit executes an algorithm based on the second set of objects.

Abstract: A communication apparatus includes a first reception unit which receives an instruction from a server, a second reception unit which receives an instruction from a path other than the server, an executing unit which executes a function when the first reception unit receives a first execution instruction from the server or when the second reception unit receives a second execution instruction from the path other than the server, and a display control unit which displays a display instruction correspondence screen when the first reception unit receives a display instruction from the server, and which displays an execution correspondence screen when the executing unit executes the function. During a time period while the display instruction correspondence screen is being displayed, the display control unit displays the execution correspondence screen when receiving the first execution instruction, but doesn't display the execution correspondence screen when receiving the second execution instruction.

Abstract: A display apparatus for use in a wireless terminal is provided. A memory stores user interface (UI) data for cases mapped to events occurring in the wireless terminal. A controller collects the events occurring in the wireless terminal. The controller selects at least one executable case for the collected events. The controller selects UI data including a character image for the at least one selected executable case from the memory and outputs the selected UI data. A display unit displays the UI data.

Abstract: A method and an apparatus for mirroring a frame are provided. The method is suitable for a display device having a first storage unit and a second storage unit. In the present method, pixel values of a pixel row of the frame are read from the first storage unit and written into the second storage unit. Then, the pixel values of the pixel row of the frame are read from the second storage unit and written back to the first storage unit. When performing one of foregoing reading and writing steps, the pixel values of the pixel row are read or written in a reverse direction to mirror the pixel row. Finally, foregoing steps are repeated to mirror each pixel row of the frame, so as to mirror the entire frame.

Abstract: A system includes a memory, a specialized processing unit and a processor. The processor receives data from a user and creates a first set of objects in a first structure based on the data. The system further creates, contemporaneously with the creation of the first set of objects and based on the first set of objects in the first structure, a second set of objects in a second structure, where the second set of objects is optimized for use by the specialized processing unit, and stores the first and second sets of objects in the memory. The specialized processing unit executes an algorithm based on the second set of objects.

Abstract: An electronic device is disclosed. The electronic device comprises a transmitter, a converter, and a receiver. The transmitter transmits data and a control signal. The converter receives the control signal from the transmitter and converts the control signal. The receiver receives the data from the transmitter via a data bus isolated from the converter and receives the converted control signal from the converter. The data transmitted from the transmitter is directly electrically connected to the receiver.

Abstract: A video encoder (70) for coding moving pictures comprising a buffer (16c) with a plurality of memory areas capable of storing frames composed of top fields and bottom fields, a motion estimation unit (19) operable to code, field by field, inputted pictures performing moving estimation and moving compensation by referring, field by field, to the picture data stored in a memory area, a motion compensation unit (16d), a subtractor (11), a transformation unit (13) and a quantization unit (14), a memory management unit (71) operable to manage, frame by frame, a plurality of memory areas, an inverse quantization unit (16a) and inverse discrete cosine transform unit (16b) operable to decode picture data in coded fields and store the picture data in the decoded field in any of the plurality of memory areas under the management by the memory management unit (71).

Abstract: A system stores a first object tree that describes a graphical scene in memory and creates a second object tree based on the first object tree, where the second object tree is optimized for use by a graphics processing unit (GPU) to render a graphical scene. The system receives indications of one or more changes associated with the first object tree and traverses the first object tree to make the one or more changes to the first object tree and to generate a composite command for use in making corresponding changes in the second object tree. The system executes the composite command to make the corresponding changes in the second object tree.

Abstract: A method and apparatus for displaying image data is disclosed. The method includes receiving one of a plurality of sets of stored image update data to be displayed on a display device, wherein each set corresponds to one image in a sequence of images and wherein the plurality of sets of image update data comprise information identifying pixels that change from a previous image in the sequence of images, wherein the display device comprises an array of bi-stable display elements. The method further includes updating a portion of the display device, the portion containing the pixels identified in the received set of stored image update data.

Abstract: A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A processing system for performing graphics processing is also provided. A first processor is of a first processor type and a number of second processors are of a second processor type. One of the second processors can perform graphics processing on a first set of graphics data to generate a second set of graphics data, and another of the second processors can perform graphics processing on the second set to generate a third set of graphics data.

Abstract: Embodiments of a system and method for providing a preview of the content of messages (e.g. electronic mail messages) to users of mobile devices. A portion of the message body of a message associated with a user-identified list entry of a message list is shown in an area of a display screen (e.g. in a window) that overlaps the area in which one or more list entries of the message list is displayed.

Abstract: A graphics processing subsystem defines a bounding area as the portion of the display buffer and other memory buffers occupied by one or more rendered objects. When clearing the memory buffers, only the portions of the buffers corresponding to the bounding area need to be cleared. A graphics pipeline includes a bounding area memory to store bounding area values. The bounding area values are modified during rendering so that each rendered primitive falls within the bounding area values. The graphics processing subsystem clears a portion of the memory buffer in response to a clear command specifying a bounding area. The clear command may include a set of bounding area values defining the bounding area, or alternatively a reference to the bounding area memory. For applications that draw objects in isolation, the bounding area will be smaller than the window, resulting in a decreased time requirement for clearing the memory buffer.

Abstract: A method and system for patching instructions in a 3-D graphics pipeline. Specifically, in one embodiment, instructions to be executed within a scheduling process for a shader pipeline of the 3-D graphics pipeline are patchable. A scheduler includes a decode table, an expansion table, and a resource table that are each patchable. The decode table translates high level instructions to an appropriate microcode sequence. The patchable expansion table expands a high level instruction to a program of microcode if the high level instruction is complex. The resource table assigns the units for executing the microcode. Addresses within each of the tables can be patched to modify existing instructions and create new instructions. That is, contents in each address in the tables that are tagged can be replaced with a patch value of a corresponding register.

Abstract: A system, method and computer program product are provided for retrieving instructions from memory utilizing a texture module in a graphics pipeline. During use, an instruction request is sent to memory utilizing a texture module in a graphics pipeline. In response thereto, instructions are received from the memory in response to the instruction request utilizing the texture module in the graphics pipeline.

Abstract: A method and apparatus for selective control of display data sequencing in a mobile computing device is disclosed. The method may include storing a plurality of display data sequencing instruction sets in a memory of the mobile computing device, each of the display data sequencing instruction sets being usable for transferring data in accordance with a different sequencing of display data than other ones of the display data sequencing instruction sets, receiving an indication of a particular type of display data sequencing to be used, selecting one of the display data sequencing instruction sets based on the received indication of the particular type of display data sequencing to be used, transferring data for display based on the selected one of the display data sequencing instruction sets, and controlling the transfer of data to the display device in order to synchronize the data transfer with the data and timing requirements of the display device.

Abstract: A video encoder (70) for coding moving pictures comprising a buffer (16c) with a plurality of memory areas capable of storing frames composed of top fields and bottom fields, a motion estimation unit (19) operable to code, field by field, inputted pictures performing moving estimation and moving compensation by referring, field by field, to the picture data stored in a memory area, a motion compensation unit (16d), a subtractor (11), a transformation unit (13) and a quantization unit (14), a memory management unit (71) operable to manage, frame by frame, a plurality of memory areas, an inverse quantization unit (16a) and inverse discrete cosine transform unit (16b) operable to decode picture data in coded fields and store the picture data in the decoded field in any of the plurality of memory areas under the management by the memory management unit (71).

Abstract: In a tile-based graphics processor, primitive lists (bins) are prepared for 2×2 blocks of tiles 40. The processor also determines and stores for each primitive in a bin, distribution information indicating the distribution of the primitive within the set of tiles that the bin corresponds to. Thus a primitive 42 that is found by its bounding box 43 to reside in two of the four tiles that make up the set of 2×2 tiles 40 is also associated with a tile coverage bitmap of the form “0101” to indicate that it lies in tiles “1” and “3” of the 2×2 group of tiles 40. The graphics processor uses the coverage bitmap (information) to determine whether a primitive should be processed for the tile currently being processed.

Abstract: A display module for displaying information on a screen, using a display data structure, wherein the display data structure is a doubly linked list. A display space in defined in video memory and the display space is filled by sequentially copying at least a portion of a set of characters from the display data structure into the video memory.

Abstract: A 3-dimensional computer generated image is generated by subdividing the image into a plurality of rectangular areas. Object data for each rectangular area is loaded into a display list memory until that memory is substantially full. Image data and shading data for each picture element of each rectangular area are derived by an image synthesis processor from the object data. The image data is then stored in a local memory. Additional object data is loaded into the display list memory and replaces existing contents. Then, the stored image data and the shading data are retrieved, and additional image data and shading data are derived for each picture element by the image synthesis processor using the additional object data and the previously derived image and shading data. When there is no further object data to load to the display list memory, the shading data is provided for display for the rectangular areas by a frame buffer.

Abstract: A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. The system includes a graphics and audio processor including a 3D graphics pipeline and an audio digital signal processor. Techniques for efficiently buffering graphics data between a producer and a consumer within a low-cost graphics systems such as a 3D home video game overcome the problem that a small-sized FIFO buffer in the graphics hardware may not adequately load balance a producer and consumer—causing the producer to stall when the consumer renders bit primitives. One aspect of the invention solves this invention by allocating part of main memory to provide a variable number of variable sized graphics commands buffers. Applications can specify the number of buffers and the size of each. All writes to the graphics FIFO can be routed a buffer in main memory. The producer and consumer independently maintain their own read and write pointers, decoupling the producer from the consumer.